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* sh: multiple vectors per irq - sh7619.Paul Mundt2009-03-061-22/+12
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: migrate to arch/sh/include/Paul Mundt2008-07-291-1/+1
| | | | | | | | | | | | | This follows the sparc changes a439fe51a1f8eb087c22dd24d69cebae4a3addac. Most of the moving about was done with Sam's directions at: http://marc.info/?l=linux-sh&m=121724823706062&w=2 with subsequent hacking and fixups entirely my fault. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh2(A) exception handler updateYoshinori Sato2008-07-282-89/+59
| | | | | | | | | | | | | | | | This patch is By sh2 - Remove duplicate code - Reduce stack usage - Cleanup and little optimize By sh2a - Add missing handler(256 to 511) - Use sh2a instructions handler Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* SH7619 add ethernet controler supportYoshinori Sato2008-07-281-0/+24
| | | | | | | - Add EtherC + PHY resource define. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix up the address error exception handler for SH-2.Kieran Bingham2008-03-131-1/+0
| | | | | | | | | | Presently the SH-2/SH-2A address error exception dispatch copies off the register state from the stack and skips over the first register, skewing the rest. Fix up the math here so that the proper register state is handed down to the exception handler itself. Signed-off-by: Kieran Bingham <kbingham@mpc-data.co.uk> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* serial: Move asm-sh/sci.h to linux/serial_sci.h.Paul Mundt2008-02-261-1/+1
| | | | | | | | | | | | This header is needed on other architectures as well (namely h8300), which currently fails to build without this in place. Rather than duplicating the port definition completely there, just move this to a common location instead. This should get h8300 working again for 2.6.25, in addition to the changes already pushed by Sato-san in -rc2. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: intc - remove default interrupt priority tablesMagnus Damm2008-01-281-1/+1
| | | | | | | | | | | | | This patch removes interrupt priority tables from the intc code. Optimal priority assignment varies with embedded application anyway, so keeping the interrupt priority tables together with cpu-specific code doesn't make sense. The function intc_set_priority() should be used instead to set the desired interrupt priority level. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: SH-2A FPU support.Paul Mundt2008-01-281-1/+16
| | | | | Signed-off-by: Kieran Bingham <kbingham@mpc-data.co.uk> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Share bug/debug traps across _32 and _64.Paul Mundt2008-01-281-1/+1
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Use boot_cpu_data for CPU probe.Paul Mundt2007-09-271-10/+9
| | | | | | | | | | This moves off of smp_processor_id() and only sets the probe information for the boot CPU directly. This will be copied out for the secondaries, so there's no reason to do this each time. This also allows for some header tidying. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: intc - add support for sh7619Magnus Damm2007-09-211-37/+56
| | | | | | | | | This patch converts the cpu specific interrupt setup code for sh7619 from ipr to intc. New vectors are also added to match the information provided by the datasheet. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: IPR/INTC2 IRQ setup consolidation.Magnus Damm2007-07-201-1/+1
| | | | | | | | | | This patch unifies the cpu specific interrupt setup functions for interrupt controller blocks such as ipr, intc2 and intc. There is no point in having separate functions for each interrupt controller, so let's clean this up. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: rework ipr codeMagnus Damm2007-06-151-10/+14
| | | | | | | | | | | | | | | | | This patch reworks the ipr code by grouping the offset array together with the ipr_data structure in a new data structure called ipr_desc. This new structure also contains the name of the controller in struct irq_chip. The idea behind putting struct irq_chip in there is that we can use offsetof() to locate the base addresses in the irq_chip callbacks. This strategy has much in common with the recently merged intc2 code. One logic change has been made - the original ipr code enabled the interrupts by default but with this patch they are all disabled by default. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fixup misaligned data for sh2 lockdep.Paul Mundt2007-06-111-0/+1
| | | | | | | lockdep/irqflags tracing on SH-2 ends up with a misaligned branch, fix it. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Tidy up dependencies for SH-2 build.Paul Mundt2007-06-111-2/+1
| | | | | | | | | | | | SH-2 can presently get in to some pretty bogus states, so we tidy up the dependencies a bit and get it all building again. This gets us a bit closer to a functional allyesconfig and allmodconfig, though there are still a few things to fix up. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Kill off dead SH7604 support.Paul Mundt2007-06-081-9/+1
| | | | | | | | This was added during 2.5.x, but was never moved along. This can easily be resurrected if someone has one they wish to work with, but it's not worth keeping around in its current form. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix bogus regs pointer in do_IRQ().Paul Mundt2007-03-141-0/+1
| | | | | | | | SH-3 and SH-4 were trampling the register, and SH-2 wasn't even setting it in the first place. This ended up with some rather broken behaviour in the sysrq show_regs(). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* Storage class should be before const qualifierTobias Klauser2007-02-171-2/+2
| | | | | | | | | | | The C99 specification states in section 6.11.5: The placement of a storage-class specifier other than at the beginning of the declaration specifiers in a declaration is an obsolescent feature. Signed-off-by: Tobias Klauser <tklauser@distanz.ch> Signed-off-by: Adrian Bunk <bunk@stusta.de>
* sh: Fixup cpu_data references for the non-boot CPUs.Paul Mundt2007-02-131-16/+16
| | | | | | | There are a lot of bogus cpu_data-> references that only end up working for the boot CPU, convert these to current_cpu_data to fixup SMP. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: sh7619 / sh7206 IPR initialize updateYoshinori Sato2007-02-131-33/+29
| | | | | | | IPR initialize proceduere update. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Update SH-2 to use the debug trap jump table.Yoshinori Sato2007-02-131-6/+4
| | | | | Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Use a jump call table for debug trap handlers.Paul Mundt2007-02-131-1/+1
| | | | | | | | | | | | | | | | | This rips out most of the needlessly complicated sh_bios and kgdb trap handling, and forces it all through a common fast dispatch path. As more debug traps are inserted, it's important to keep them in sync for all of the parts, not just SH-3/4. As the SH-2 parts are unable to do traps in the >= 0x40 range, we restrict the debug traps to the 0x30-0x3f range on all parts, and also bump the kgdb breakpoint trap down in to this range (from 0xff to 0x3c) so it's possible to use for nommu. Optionally, this table can be padded out to catch spurious traps for SH-3/4, but we don't do that yet.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fixup SH-2 BUG() trap handling.Yoshinori Sato2006-12-121-18/+14
| | | | | | | This adds in support for the BUG() trap on SH-2. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: IPR IRQ updates for SH7619/SH7206.Yoshinori Sato2006-12-121-0/+41
| | | | | | | This updates the SH7619 and SH7206 code for the IPR IRQ changes. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: stacktrace/lockdep/irqflags tracing support.Paul Mundt2006-12-061-0/+16
| | | | | | Wire up all of the essentials for lockdep.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Exception vector rework and SH-2/SH-2A support.Yoshinori Sato2006-12-062-0/+371
| | | | | | | | | This splits out common bits from the existing exception handler for use between SH-2/SH-2A and SH-3/4, and adds support for the SH-2/2A exceptions. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Add support for SH7206 and SH7619 CPU subtypes.Yoshinori Sato2006-12-064-6/+147
| | | | | | | | This implements initial support for the SH7206 (SH-2A) and SH7619 (SH-2) MMU-less CPUs. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* Linux-2.6.12-rc2Linus Torvalds2005-04-162-0/+45
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
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