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* omap: rpres: skip the creation of already created devicesMiguel Vadillo2011-07-201-0/+1
| | | | | | | | | | | | | | | | | | Some devices like: - iva - dsp - fdif are being created for pm purposes and create them again is not recommended. For these devices the pm framework is exporting api's to get them. If a resource is already created use the api to get the device and add the platform data and information needed for rpres to control such device. Change-Id: I6640883f911f4c21d204c20ded1ced104af5ed7c Signed-off-by: Miguel Vadillo <vadillo@ti.com>
* OMAP4: Print wakeup IRQ on resumeTodd Poynor2011-07-203-0/+41
| | | | | | | | | | | | | OMAP4 wakeup reason detection part 1: Read the CPU GIC GICC_HPPIR Highest Priority Pending Interrupt Register on resume and map that to a Linux IRQ number for printing to dmesg. Following patches will further determine specific GPIO pins with pending wakeup interrupts, and potentially other IP blocks that aggregate interrupts to a single GIC line. Change-Id: I5b7ee5a173b572978bc0646909a914dc6acf4d63 Signed-off-by: Todd Poynor <toddpoynor@google.com>
* ARM: omap4: wakeupgen: unmask based on node, not affinityColin Cross2011-07-181-8/+2
| | | | | | | | | | | | | | | | | | The irq affinity mask is not kept up to date by the ARM irq code. In particular, migrate_one_irq is not called when the irq node does not match the cpu going offline, and when it is called, it doesn't update the irq affinity mask before calling the irq chip's set_affinity function. This causes the use of the affinity mask in the mask and unmask functions to be unreliable, possibly unmasking an interrupt on a cpu that is offline. The gic driver only supports directing an irq to a single cpu at a time, selected by the node field in the irq_data, so use that to mask and unmask interrupts in the wakeupgen. Change-Id: I1da9ed4cb2ebddacebce51f6f2f8fa054181a259 Signed-off-by: Colin Cross <ccross@android.com>
* OMAP4: DVFS: attempt floor before giving up scaleGirish S Ghongdemath2011-07-151-0/+3
| | | | | | | | | | | | Make DVFS to try the next available frequency if the higher match is not available. This will probably be the max available for the device. If we cannot match any thing at all, fail. This modifies the behavior of device scale to guarenteeing _atleast_ the frequency requested into _if possible_, the frequency requested. Change-Id: Id85382990d9717648a2466047bb966a089b72089 Signed-off-by: Girish S G <girishsg@ti.com>
* Merge branch 'omap-pm-integration' of ↵Colin Cross2011-07-1532-1462/+1712
|\ | | | | | | git://github.com/nmenon/linux-omap-ti-pm into linux-omap-pm-3.0
| * OMAP4: PM: enable wakeup irq for PRCM and SYS_1NAxel Haslam2011-07-141-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | Wake-up enable bits need to be set by each driver, but some specific irq's do not have a driver as such, and still have to be set as wakeup enable. This is the case of PRCM and SYS_1N. For these irq's, we handle wakeup enable bits on the suspend path. Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Axel Haslam <axelhaslam@ti.com> Signed-off-by: Deepak K<deepak.k@ti.com>
| * OMAP4: Serial: Set TX_FIFO_THRESHOLD if uart in dma mode for es2.0Govindraj.R2011-07-142-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | From OMAP4430 ES2.0 onwards if uart is configured in dma mode we need to set uart tx threshold value using the new register UART_TX_DMA_THRESHOLD, this register can used if UART_MDR3 bit(2) is set. We have to ensure tx_threshold + tx_trigger <= 63 from es2.0 onwards. By default we are using tx_trigger of 1 so we can set threshold to 62 to satisfy above criteria. Without the threshold setting we hit dma_sync lost errors on tx channel leading to data loss on rx side Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
| * OMAP: Serial: Use resume call from prcm to enable uartGovindraj.R2011-07-146-1/+32
| | | | | | | | | | | | | | | | | | | | | | Use resume idle call from prcm_irq to enable uart_port from low power states. Add api to check pad wakeup status which will we used from uart_resume func. to enable back uart port if a wakeup event occurred. UART_Resume func. can be removed once we have irq_chaining functionality available. Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
| * OMAP3: Serial: Remove uart pads from 3430/4430/panda board file.Govindraj.R2011-07-143-215/+4
| | | | | | | | | | | | | | | | The pad values here are same as the default pad values updated in serial.c file. Avoid structure duplication and use default pads. Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
| * Serial: OMAP2+: Make the RX_TIMEOUT for DMA configurable for each UARTJon Hunter2011-07-142-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When using DMA there are two timeouts defined. The first timeout, rx_timeout, is really a polling rate in which software polls the DMA status to see if the DMA has finished. This is necessary for the RX side because we do not know how much data we will receive. The secound timeout, RX_TIMEOUT, is a timeout after which the DMA will be stopped if no more data is received. To make this clearer, rename rx_timeout as rx_poll_rate and rename the function serial_omap_rx_timeout() to serial_omap_rxdma_poll(). The OMAP-Serial driver defines an RX_TIMEOUT of 3 seconds that is used to indicate when the DMA for UART can be stopped if no more data is received. The value is a global definition that is applied to all instances of the UART. Each UART may be used for a different purpose and so the timeout required may differ. Make this value configurable for each UART so that this value can be optimised for power savings. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
| * OMAP: Serial: Allow UART parameters to be configured from board file.Govindraj.R2011-07-145-14/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following UART parameters are defined within the UART driver: 1). Whether the UART uses DMA (dma_enabled), by default set to 0 2). The size of dma buffer (set to 4096 bytes) 3). The time after which the dma should stop if no more data is received. 4). The auto suspend delay that will be passed for pm_runtime_autosuspend where uart will be disabled after timeout Different UARTs may be used for different purpose such as the console, for interfacing bluetooth chip, for interfacing to a modem chip, etc. Therefore, it is necessary to be able to customize the above settings for a given board on a per UART basis. This change allows these parameters to be configured from the board file and allows the parameters to be configured for each UART independently. If a board does not define its own custom parameters for the UARTs, then use the default parameters in the structure "omap_serial_default_info". The default parameters are defined to be the same as the current settings in the UART driver to avoid breaking the UART for any board. By default, make all boards use the default UART parameters. Signed-off-by: Deepak K <deepak.k@ti.com> Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
| * Serial: OMAP: Add runtime pm support for omap-serial driverGovindraj.R2011-07-142-2/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | Adapts omap-serial driver to use pm_runtime api's. 1.) Populate reg values to uart port which can be used for context restore. 2.) Moving context_restore func to driver from serial.c 3.) Adding port_enable/disable func to enable/disable given uart port. enable port using get_sync and disable using autosuspend. 4.) using runtime irq safe api to make get_sync be called from irq context. Acked-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
| * OMAP2+: Serial: Add default mux for all uarts.Govindraj.R2011-07-141-0/+132
| | | | | | | | | | | | | | Add default mux data for all uarts if mux info is not passed from board file to avoid breaking any board support. Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
| * OMAP2+: UART: Remove uart clock handling code from serial.cGovindraj.R2011-07-142-694/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cleanup serial.c file in preparation to addition of runtime api's in omap-serial file. Remove all clock handling mechanism as this will be taken care with pm runtime api's in omap-serial.c file itself. 1.) Remove omap-device enable and disable. We can can use get_sync/put_sync api's 2.) Remove context save/restore can be done with runtime_resume callback for get_sync call. No need to save context as all reg details available in uart_port structure can be used for restore, so add missing regs in uart port struct. 3.) Add func to identify console uart. 4.) Erratum handling informed as flag to driver and func to handle erratum can be moved to omap-serial driver itself. Acked-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
| * OMAP2+: UART: Remove certain uart calls from sram_idleGovindraj.R2011-07-143-50/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation to UART runtime conversion. Remove certain uart specific calls from sram_idle path in pm24xx/34xx/44xx files. These func calls will no more be used with upcoming uart runtime design. 1.) Removing console lock holding :- Now can be handled with omap-serial file itself. 2.) omap_uart_can_sleep :- not needed driver can autosuspend based on usage_count and autosuspend delay. 3.) omap_uart_prepare_suspend :- omap-serial can be taken care with driver suspend/resume hooks. 4.) Also remove individual uart_prepare/resume calls. Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
| * OMAP4: serial: remove hacks done prior to runtime PMNishanth Menon2011-07-143-38/+4
| | | | | | | | | | | | This removes the hacks we introduced for runtime PM. Signed-off-by: Nishanth Menon <nm@ti.com>
| * OMAP4: PM: remove hacks that were needed for serialNishanth Menon2011-07-143-53/+3
| | | | | | | | | | | | | | Since runtime PM is active for serial, we dont need the hacks we added in PM layer for handling runtime PM. Signed-off-by: Nishanth Menon <nm@ti.com>
| * OMAP4: Panda/SDP: Enable MMC power savingMadhusudhan Chikkature2011-07-142-0/+3
| | | | | | | | | | | | Enable the MMC idle power saving feature for OMAP4 SDP. Signed-off-by: Madhusudhan Chikkature <madhu.cr@ti.com>
| * MMC: OMAP4: HWMOD: disable smart wakeupBalaji T K2011-07-141-1/+1
| | | | | | | | | | | | | | Disable smart standby smart wakeup for mmc, until smart wakeup is fully supported for OMAP4 Signed-off-by: Balaji T K <balajitk@ti.com>
| * GPIO: OMAP: Fix bankwidth for OMAP7xx MPUIOCharulatha V2011-07-141-1/+1
| | | | | | | | | | | | | | In all OMAP1 SoCs, the MPUIO bank width is 16 bits. But, in OMAP7xx, it is wrongly initialised to 32. Fix this. Signed-off-by: Charulatha V <charu@ti.com>
| * GPIO: OMAP: Remove bank->method & METHOD_* macrosCharulatha V2011-07-145-24/+4
| | | | | | | | | | | | | | | | The only bank->type (method) used in the OMAP GPIO driver is MPUIO type as they need to be handled separately. Identify the same using a flag and remove all METHOD_* macros. Signed-off-by: Charulatha V <charu@ti.com>
| * GPIO: OMAP15xx: Use pinctrl offset instead of macroCharulatha V2011-07-142-0/+2
| | | | | | | | | | | | Use regs->pinctrl field instead of using the macro OMAP1510_GPIO_PIN_CONTROL Signed-off-by: Charulatha V <charu@ti.com>
| * GPIO: OMAP: Clean omap_gpio_mod_init functionCharulatha V2011-07-142-0/+3
| | | | | | | | | | | | | | | | | | With register offsets now defined for respective OMAP versions we can get rid of cpu_class_* checks. In addition, organized common initialization for the different OMAP silicon versions. Signed-off-by: Charulatha V <charu@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
| * GPIO: OMAP: Clean set_gpio_triggering functionTarun Kanti DebBarma2011-07-145-0/+14
| | | | | | | | | | | | | | | | Getting rid of ifdefs within the function by adding register offset intctrl and associating OMAPXXXX_GPIO_INT_CONTROL in respective SoC specific files. Signed-off-by: Charulatha V <charu@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
| * GPIO: OMAP: Remove hardcoded offsets in ctxt save/restoreTarun Kanti DebBarma2011-07-142-0/+3
| | | | | | | | | | | | | | | | | | It is not required to use hard-coded offsets any more in context save and restore functions and instead use the generic offsets which have been correctly initialized during device registration. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Charulatha V <charu@ti.com>
| * GPIO: OMAP: Use level/edge detect reg offsetsTarun Kanti DebBarma2011-07-142-0/+12
| | | | | | | | | | | | | | | | | | By adding level and edge detection register offsets and then initializing them correctly according to OMAP versions during device registrations we can now remove lot of revision checks in these functions. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Charulatha V <charu@ti.com>
| * GPIO: OMAP: Use wkup regs off/suspend support flagTarun Kanti DebBarma2011-07-143-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Wakeup register offsets are initialized according to OMAP versions during device registration. These explicit checks are no longer needed. mpuio_init() function is defined under #ifdefs. It is required only in case of MPUIO bank type and only when PM operations are supported by it. This is applicable only in case of OMAP16xx SoC's MPUIO GPIO bank type. For all the other cases it is a dummy function. Hence clean up the same and remove all the OMAP SoC specific #ifdefs. bank_is_mpuio() is defined as a check to identify if the bank type is MPUIO. It is not required to define it separately as zero for OMAP2plus. Remove this. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Charulatha V <charu@ti.com>
| * GPIO: OMAP: Avoid cpu checks during module ena/disableCharulatha V2011-07-142-0/+3
| | | | | | | | | | | | | | Remove cpu-is checks while enabling/disabling OMAP GPIO module during a gpio request/free. Signed-off-by: Charulatha V <charu@ti.com>
| * GPIO: OMAP2+: Make non-wakeup GPIO part of pdataCharulatha V2011-07-142-0/+9
| | | | | | | | | | | | | | Non-wakeup GPIOs are available only in OMAP2. Avoid cpu_is checks by making non_wakeup_gpios as part of pdata. Signed-off-by: Charulatha V <charu@ti.com>
| * GPIO: OMAP: Handle save/restore ctx in GPIO driverCharulatha V2011-07-143-16/+15
| | | | | | | | | | | | | | | | | | | | | | Modify omap_gpio_prepare_for_idle() & omap_gpio_resume_after_idle() functions to handle save context & restore context respectively in the OMAP GPIO driver itself instead of calling these functions from pm specific files. For this, in gpio_prepare_for_idle(), call *_get_context_loss_count() and in gpio_resume_after_idle() call it again. If the count is different, do restore context. The workaround_enabled flag is no more required and is removed. Signed-off-by: Charulatha V <charu@ti.com>
| * GPIO: OMAP: Fix pwrdm_post_transition call sequenceCharulatha V2011-07-141-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | The context lost count is modified in omap_sram_idle() path when pwrdm_post_transition() is called. But pwrdm_post_transition() is called only after omap_gpio_resume_after_idle() is called. Correct this so that context lost count is modified before calling omap_gpio_resume_after_idle(). This would be useful when OMAP GPIO save/restore context is called by the OMAP GPIO driver itself. Signed-off-by: Charulatha V <charu@ti.com>
| * GPIO: OMAP2+: Use flag to identify wakeup domainCharulatha V2011-07-142-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In omap3, save/restore context is implemented for GPIO banks 2-6 as GPIO bank1 is in wakeup domain. Instead of identifying bank's power domain by bank id, use 'loses_context' flag which is filled by pwrdm_can_ever_lose_context() during dev_init. For getting the powerdomain pointer, omap_hwmod_get_pwrdm() is used. omap_device_get_pwrdm() could not be used as the pwrdm information needs to be filled in pdata, whereas omap_device_get_pwrdm() could be used only after omap_device_build() call. Signed-off-by: Charulatha V <charu@ti.com>
| * GPIO: OMAP: Remove dependency on gpio_bank_countTarun Kanti DebBarma2011-07-145-9/+0
| | | | | | | | | | | | | | | | The gpio_bank_count is the count of number of GPIO devices in a SoC. Remove this dependency from the driver by using list. Also remove the dependency on array of pointers to gpio_bank struct of all GPIO devices. Signed-off-by: Charulatha V <charu@ti.com>
| * GPIO: OMAP: cleanup show revision, remove cpu_is checks, display only onceKevin Hilman2011-07-145-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove cpu_is_* checks from gpio_show_revision() by passing in the revision address offset from platform data. SoCs with no revision register (15xx, 7xx, and all MPUIOs) use -1 (actually, USHRT_MAX) to signify no register. While here, all GPIO banks are assumed to be the same revision, so fix show_revision() to only show the revision for the first bank it finds. This removes duplicate GPIO revision prints during boot. Thanks to Charulatha V <charu@ti.com> for finding/fixing a few -1s that were missed in the original patch. Signed-off-by: Kevin Hilman <khilman@ti.com>
| * GPIO: OMAP: debounce remove SoC specific registers, use pdataKevin Hilman2011-07-142-0/+6
| | | | | | | | | | | | Use register offsets passed in from pdata for accessing debounce registers. Signed-off-by: Kevin Hilman <khilman@ti.com>
| * GPIO: OMAP: conslidate enable/disable of GPIO IRQs, remove ifdefsKevin Hilman2011-07-145-0/+24
| | | | | | | | | | | | | | | | | | | | Cleanup GPIO IRQ enable/disable handling by removing SoC-specific Also split enable/disable IRQ into separate functions for better readability and also facilitate potentially moving to generic irq_chip in the future. Signed-off-by: Kevin Hilman <khilman@ti.com>
| * GPIO: OMAP: consolidate IRQ status handling, remove #ifdefsKevin Hilman2011-07-145-0/+12
| | | | | | | | | | | | | | | | | | Cleanup IRQ status handling by passing IRQ status register offsets via platform data. Cleans up clearing of GPIO IRQ status and GPIO ISR handler. Signed-off-by: Kevin Hilman <khilman@ti.com>
| * GPIO: OMAP: consolidate direction, input, output, remove #ifdefsKevin Hilman2011-07-145-0/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add register offset fields to GPIO platform_data for registers. This patch adds registers that control direction, input and output data. Using these register offsets in the common driver allows removal of #ifdefs and greatly improves readability. Also create dedicated data out functions: one for banks with dedicated set/clear registers, and another for banks with a single mask register. Signed-off-by: Kevin Hilman <khilman@ti.com>
| * OMAP: dmtimer: Off mode supportTarun Kanti DebBarma2011-07-143-29/+188
| | | | | | | | | | | | | | | | | | | | | | | | | | Clock is enabled only when timer is started and disabled when the the timer is stopped. Therefore before accessing registers in functions clock is enabled and then disabled back at the end of access. Context save and restore functions are called as needed. Change-Id: I307fa54925f16e61491decb7101879dade211b7e [girishsg@ti.com: Fixed review comments and rebased] Signed-off-by: Girish S G <girishsg@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
| * OMAP: dmtimer: use mutex instead of spinlockTarun Kanti DebBarma2011-07-141-16/+11
| | | | | | | | | | | | | | | | | | | | Since the spinlock is not used in any interrupt context we can replace it with mutex instead. Change-Id: Ic0c6adc2c8ba6054621f0f1452848dec08fa3d8d [girishsg@ti.com: Rebased] Signed-off-by: Girish S G <girishsg@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
| * OMAP: dmtimer: add timeout to low-level routinesTarun Kanti DebBarma2011-07-141-8/+27
| | | | | | | | | | | | | | | | | | | | | | The low-level read and write access routines wait on write-pending register in posted mode to make sure that previous write is complete on respective registers. This waiting is done in an infinite while loop. Now it is being modified to use timeout instead. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Varadarajan, Charulatha <charu@ti.com> Acked-by: Cousson, Benoit <b-cousson@ti.com>
| * OMAP: dmtimer: pm_runtime supportTarun Kanti DebBarma2011-07-141-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add pm_runtime feature to dmtimer whereby _get_sync() is called within omap_dm_timer_enable(), _put_sync() is called in omap_dm_timer_disable(). As part of this, I am getting rid of the 'enabled' flag since this is no longer needed. This has been replaced by pm_runtime_suspended() check. Change-Id: I11a9b9deb1fab12542ade20575758a53b669ada9 [girishsg@ti.com: Rebased] Signed-off-by: Girish S G <girishsg@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> [p-basak2@ti.com: added pm_runtime logic in probe()] Signed-off-by: Partha Basak <p-basak2@ti.com> Reviewed-by: Varadarajan, Charulatha <charu@ti.com> Acked-by: Cousson, Benoit <b-cousson@ti.com>
| * dmtimer: switch-over to platform device driverTarun Kanti DebBarma2011-07-148-255/+197
| | | | | | | | | | | | | | | | | | | | | | switch-over to platform device driver through following changes: (a) initiate dmtimer early initialization from omap2_gp_timer_init() in timer-gp.c. This is equivalent of timer_init()->timer->init(). (b) modify plat-omap/dmtimer routines to use new register map and platform data. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Acked-by: Cousson, Benoit <b-cousson@ti.com>
| * OMAP: dmtimer: platform driverTarun Kanti DebBarma2011-07-142-6/+152
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add dmtimer platform driver functions which include: (1) platform driver initialization (2) driver probe function (3) driver remove function Change-Id: I9685739df2c630bf49bdaa88d858886d917b5ac8 [girishsg@ti.com: Fixed review comments] Signed-off-by: Girish S G <girishsg@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Thara Gopinath <thara@ti.com> Acked-by: Cousson, Benoit <b-cousson@ti.com>
| * OMAP2+: dmtimer: convert to platform devicesTarun Kanti DebBarma2011-07-145-1/+231
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add routines to converts dmtimers to platform devices. The device data is obtained from hwmod database of respective platform and is registered to device model after successful binding to driver. It also provides provision to access timers during early boot when pm_runtime framework is not completely up and running. Change-Id: I228ffa3f91f54b6f7f185565cbb4357823723c4a [girishsg@ti.com: Fixed review comments] Signed-off-by: Girish S G <girishsg@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Thara Gopinath <thara@ti.com> Acked-by: Cousson, Benoit <b-cousson@ti.com>
| * OMAP1: dmtimer: conversion to platform devicesTarun Kanti DebBarma2011-07-145-62/+206
| | | | | | | | | | | | | | | | | | Convert OMAP1 dmtimers into a platform devices and then registers with device model framework so that it can be bound to corresponding driver. Signed-off-by: Thara Gopinath <thara@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Acked-by: Cousson, Benoit <b-cousson@ti.com>
| * OMAP4: hwmod data: add dmtimer version informationTarun Kanti DebBarma2011-07-142-0/+5
| | | | | | | | | | | | | | | | | | | | | | OMAP4 has two groups of timers: version 1 timers are 1, 2, 10, while the rest of the timers, 3-9, 11 are version 2 timers. The version information is required by the driver so that they could be handled correctly by it. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Acked-by: Cousson, Benoit <b-cousson@ti.com> Cc: Cousson, Benoit <b-cousson@ti.com>
| * OMAP2+: dmtimer: add device names to flck nodesTarun Kanti DebBarma2011-07-144-43/+173
| | | | | | | | | | | | | | | | | | | | | | | | | | Add device name to OMAP2 dmtimer fclk nodes so that the fclk nodes can be retrieved by doing a clk_get with the corresponding device pointers or device names. NOTE: gpt1_fck is modified in patch-10 when we switch to platform device driver. This is to make sure that each patch compiles and boots. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com Signed-off-by: Thara Gopinath <thara@ti.com> Acked-by: Cousson, Benoit <b-cousson@ti.com>
* | Merge branch 'linux-omap-audio-3.0' into linux-omap-3.0Simon Wilson2011-07-141-3/+3
|\ \ | |/ |/| | | Signed-off-by: Simon Wilson <simonwilson@google.com>
| * OMAP4: McBSP: Set clks_prcm_src based on instance idMisael Lopez Cruz2011-07-141-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | When McBSP FCLK is sourced from internal clock, the source name is based on the instance id, e.g. "mcbsp<ID>_sync_mux_ck". Source name is constructed based on the id received from omap_hwmod name. Additionally, McBSP FCLK source names for OMAP3 are fixed. Change-Id: I4524c8b356d19dff56fdbf8c00dce3bd64d16b09 Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com> Signed-off-by: Chris Kelly <c-kelly@ti.com>
generated by cgit v1.1 at 2025-02-15 18:48:53 +0000