From 57aabac7b49b629faf023a2bc0e43181050d4da6 Mon Sep 17 00:00:00 2001 From: Girish S G Date: Wed, 22 Aug 2012 21:01:33 -0500 Subject: GPIO: OMAP: Fix the sequence to clear the IRQ status The recommended way to clear the GPIO IRQ status is to: - Enable the IRQ - clear the status If this above sequence is not followed, i.e., if the status is cleared after disabling the IRQ then sWAKEUP will not be cleared and gates the module transition. Change-Id: I8bd1b820ac8be70530cd6430f26ce541bfd3f9d9 Signed-off-by: Huzefa Kankroliwala Signed-off-by: Girish S G Signed-off-by: Andrii Anisov --- drivers/gpio/gpio-omap.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) (limited to 'drivers/gpio') diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index f28609d..2eac45b 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -777,14 +777,16 @@ static void gpio_unmask_irq(struct irq_data *d) if (trigger) _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), trigger); - /* For level-triggered GPIOs, the clearing must be done after - * the HW source is cleared, thus after the handler has run */ - if (bank->level_mask & irq_mask) { - _set_gpio_irqenable(bank, gpio, 0); + _set_gpio_irqenable(bank, gpio, 1); + /* + * For level-triggered GPIOs, the clearing must be done after + * the HW source is cleared, thus after the handler has run. + * Also, make sure to clear the status _after_ enabling the irq + * so that pending event will be cleared. + */ + if (bank->level_mask & irq_mask) _clear_gpio_irqstatus(bank, gpio); - } - _set_gpio_irqenable(bank, gpio, 1); spin_unlock_irqrestore(&bank->lock, flags); } -- cgit v1.1