diff options
Diffstat (limited to '9/platforms/android-18/arch-mips/usr/include/machine/endian.h')
| -rw-r--r-- | 9/platforms/android-18/arch-mips/usr/include/machine/endian.h | 70 |
1 files changed, 70 insertions, 0 deletions
diff --git a/9/platforms/android-18/arch-mips/usr/include/machine/endian.h b/9/platforms/android-18/arch-mips/usr/include/machine/endian.h new file mode 100644 index 0000000..41a9004 --- /dev/null +++ b/9/platforms/android-18/arch-mips/usr/include/machine/endian.h @@ -0,0 +1,70 @@ +/* $OpenBSD: endian.h,v 1.5 2006/02/27 23:35:59 miod Exp $ */ + +/* + * Copyright (c) 2001-2002 Opsycon AB (www.opsycon.se / www.opsycon.com) + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + */ + +#ifndef _MIPS64_ENDIAN_H_ +#define _MIPS64_ENDIAN_H_ + +#ifdef __GNUC__ + +#if defined(__mips_isa_rev) && (__mips_isa_rev >= 2) +#define __swap16md(x) ({ \ + register uint16_t _x = (x); \ + register uint16_t _r; \ + __asm volatile ("wsbh %0, %1" : "=r" (_r) : "r" (_x)); \ + _r; \ +}) + +#define __swap32md(x) ({ \ + register uint32_t _x = (x); \ + register uint32_t _r; \ + __asm volatile ("wsbh %0, %1; rotr %0, %0, 16" : "=r" (_r) : "r" (_x)); \ + _r; \ +}) + +#define __swap64md(x) ({ \ + uint64_t _swap64md_x = (x); \ + (uint64_t) __swap32md(_swap64md_x >> 32) | \ + (uint64_t) __swap32md(_swap64md_x & 0xffffffff) << 32; \ +}) + +/* Tell sys/endian.h we have MD variants of the swap macros. */ +#define MD_SWAP + +#endif /* __mips32r2__ */ +#endif /* __GNUC__ */ + +#if defined(__MIPSEB__) +#define _BYTE_ORDER _BIG_ENDIAN +#else +#define _BYTE_ORDER _LITTLE_ENDIAN +#endif +#define __STRICT_ALIGNMENT +#include <sys/types.h> +#include <sys/endian.h> + +#endif /* _MIPS64_ENDIAN_H_ */ |