From 6986c6e7f06bb3bdedfc3bb08694da9b1227048c Mon Sep 17 00:00:00 2001 From: Andrew Hsieh Date: Fri, 6 Sep 2013 18:37:46 +0800 Subject: Add NDK r9 part 1/2: platforms/ Change-Id: Ie572e90ffda7f982d931dda1a9f5a0c68953a762 --- .../arch-x86/usr/include/asm/byteorder.h | 58 ++++++++++++++++++++++ 1 file changed, 58 insertions(+) create mode 100644 9/platforms/android-18/arch-x86/usr/include/asm/byteorder.h (limited to '9/platforms/android-18/arch-x86/usr/include/asm/byteorder.h') diff --git a/9/platforms/android-18/arch-x86/usr/include/asm/byteorder.h b/9/platforms/android-18/arch-x86/usr/include/asm/byteorder.h new file mode 100644 index 0000000..74dc9d6 --- /dev/null +++ b/9/platforms/android-18/arch-x86/usr/include/asm/byteorder.h @@ -0,0 +1,58 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_X86_BYTEORDER_H +#define _ASM_X86_BYTEORDER_H +#include +#include +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#ifdef __GNUC__ +static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x) +{ + __asm__("xchgb %b0,%h0\n\t" +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + "rorl $16,%0\n\t" + "xchgb %b0,%h0" + :"=q" (x) + : "0" (x)); +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + return x; +} +static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 val) +{ +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + union { + struct { __u32 a,b; } s; + __u64 u; + } v; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + v.u = val; + v.s.a = ___arch__swab32(v.s.a); + v.s.b = ___arch__swab32(v.s.b); + __asm__("xchgl %0,%1" : "=r" (v.s.a), "=r" (v.s.b) : "0" (v.s.a), "1" (v.s.b)); +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + return v.u; +} +#define __arch__swab64(x) ___arch__swab64(x) +#define __arch__swab32(x) ___arch__swab32(x) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __BYTEORDER_HAS_U64__ +#endif +#include +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ -- cgit v1.1