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-rw-r--r--libpixelflinger/codeflinger/Arm64Assembler.cpp64
-rw-r--r--libpixelflinger/codeflinger/CodeCache.cpp12
-rw-r--r--libpixelflinger/codeflinger/GGLAssembler.cpp4
-rw-r--r--libpixelflinger/codeflinger/disassem.c15
-rw-r--r--libpixelflinger/codeflinger/disassem.h4
-rw-r--r--libpixelflinger/codeflinger/texturing.cpp16
6 files changed, 53 insertions, 62 deletions
diff --git a/libpixelflinger/codeflinger/Arm64Assembler.cpp b/libpixelflinger/codeflinger/Arm64Assembler.cpp
index f37072a..bd11818 100644
--- a/libpixelflinger/codeflinger/Arm64Assembler.cpp
+++ b/libpixelflinger/codeflinger/Arm64Assembler.cpp
@@ -273,7 +273,7 @@ void ArmToArm64Assembler::B(int cc, const char* label)
*mPC++ = (0x54 << 24) | cc;
}
-void ArmToArm64Assembler::BL(int cc, const char* label)
+void ArmToArm64Assembler::BL(int /*cc*/, const char* /*label*/)
{
NOT_IMPLEMENTED(); //Not Required
}
@@ -289,7 +289,7 @@ void ArmToArm64Assembler::prolog()
*mPC++ = A64_MOVZ_X(mZeroReg,0,0);
}
-void ArmToArm64Assembler::epilog(uint32_t touched)
+void ArmToArm64Assembler::epilog(uint32_t /*touched*/)
{
// write epilog code
static const int XLR = 30;
@@ -530,23 +530,23 @@ void ArmToArm64Assembler::MUL(int cc, int s, int Rd, int Rm, int Rs)
if(s != 0) { NOT_IMPLEMENTED(); return;} //Not required
*mPC++ = A64_MADD_W(Rd, Rm, Rs, mZeroReg);
}
-void ArmToArm64Assembler::UMULL(int cc, int s,
- int RdLo, int RdHi, int Rm, int Rs)
+void ArmToArm64Assembler::UMULL(int /*cc*/, int /*s*/,
+ int /*RdLo*/, int /*RdHi*/, int /*Rm*/, int /*Rs*/)
{
NOT_IMPLEMENTED(); //Not required
}
-void ArmToArm64Assembler::UMUAL(int cc, int s,
- int RdLo, int RdHi, int Rm, int Rs)
+void ArmToArm64Assembler::UMUAL(int /*cc*/, int /*s*/,
+ int /*RdLo*/, int /*RdHi*/, int /*Rm*/, int /*Rs*/)
{
NOT_IMPLEMENTED(); //Not required
}
-void ArmToArm64Assembler::SMULL(int cc, int s,
- int RdLo, int RdHi, int Rm, int Rs)
+void ArmToArm64Assembler::SMULL(int /*cc*/, int /*s*/,
+ int /*RdLo*/, int /*RdHi*/, int /*Rm*/, int /*Rs*/)
{
NOT_IMPLEMENTED(); //Not required
}
-void ArmToArm64Assembler::SMUAL(int cc, int s,
- int RdLo, int RdHi, int Rm, int Rs)
+void ArmToArm64Assembler::SMUAL(int /*cc*/, int /*s*/,
+ int /*RdLo*/, int /*RdHi*/, int /*Rm*/, int /*Rs*/)
{
NOT_IMPLEMENTED(); //Not required
}
@@ -554,15 +554,15 @@ void ArmToArm64Assembler::SMUAL(int cc, int s,
// ----------------------------------------------------------------------------
// branches relative to PC...
// ----------------------------------------------------------------------------
-void ArmToArm64Assembler::B(int cc, uint32_t* pc){
+void ArmToArm64Assembler::B(int /*cc*/, uint32_t* /*pc*/){
NOT_IMPLEMENTED(); //Not required
}
-void ArmToArm64Assembler::BL(int cc, uint32_t* pc){
+void ArmToArm64Assembler::BL(int /*cc*/, uint32_t* /*pc*/){
NOT_IMPLEMENTED(); //Not required
}
-void ArmToArm64Assembler::BX(int cc, int Rn){
+void ArmToArm64Assembler::BX(int /*cc*/, int /*Rn*/){
NOT_IMPLEMENTED(); //Not required
}
@@ -661,11 +661,11 @@ void ArmToArm64Assembler::LDRH(int cc, int Rd, int Rn, uint32_t op_type)
{
return dataTransfer(opLDRH, cc, Rd, Rn, op_type);
}
-void ArmToArm64Assembler::LDRSB(int cc, int Rd, int Rn, uint32_t offset)
+void ArmToArm64Assembler::LDRSB(int /*cc*/, int /*Rd*/, int /*Rn*/, uint32_t /*offset*/)
{
NOT_IMPLEMENTED(); //Not required
}
-void ArmToArm64Assembler::LDRSH(int cc, int Rd, int Rn, uint32_t offset)
+void ArmToArm64Assembler::LDRSH(int /*cc*/, int /*Rd*/, int /*Rn*/, uint32_t /*offset*/)
{
NOT_IMPLEMENTED(); //Not required
}
@@ -723,15 +723,15 @@ void ArmToArm64Assembler::STM(int cc, int dir,
// ----------------------------------------------------------------------------
// special...
// ----------------------------------------------------------------------------
-void ArmToArm64Assembler::SWP(int cc, int Rn, int Rd, int Rm)
+void ArmToArm64Assembler::SWP(int /*cc*/, int /*Rn*/, int /*Rd*/, int /*Rm*/)
{
NOT_IMPLEMENTED(); //Not required
}
-void ArmToArm64Assembler::SWPB(int cc, int Rn, int Rd, int Rm)
+void ArmToArm64Assembler::SWPB(int /*cc*/, int /*Rn*/, int /*Rd*/, int /*Rm*/)
{
NOT_IMPLEMENTED(); //Not required
}
-void ArmToArm64Assembler::SWI(int cc, uint32_t comment)
+void ArmToArm64Assembler::SWI(int /*cc*/, uint32_t /*comment*/)
{
NOT_IMPLEMENTED(); //Not required
}
@@ -739,31 +739,31 @@ void ArmToArm64Assembler::SWI(int cc, uint32_t comment)
// ----------------------------------------------------------------------------
// DSP instructions...
// ----------------------------------------------------------------------------
-void ArmToArm64Assembler::PLD(int Rn, uint32_t offset) {
+void ArmToArm64Assembler::PLD(int /*Rn*/, uint32_t /*offset*/) {
NOT_IMPLEMENTED(); //Not required
}
-void ArmToArm64Assembler::CLZ(int cc, int Rd, int Rm)
+void ArmToArm64Assembler::CLZ(int /*cc*/, int /*Rd*/, int /*Rm*/)
{
NOT_IMPLEMENTED(); //Not required
}
-void ArmToArm64Assembler::QADD(int cc, int Rd, int Rm, int Rn)
+void ArmToArm64Assembler::QADD(int /*cc*/, int /*Rd*/, int /*Rm*/, int /*Rn*/)
{
NOT_IMPLEMENTED(); //Not required
}
-void ArmToArm64Assembler::QDADD(int cc, int Rd, int Rm, int Rn)
+void ArmToArm64Assembler::QDADD(int /*cc*/, int /*Rd*/, int /*Rm*/, int /*Rn*/)
{
NOT_IMPLEMENTED(); //Not required
}
-void ArmToArm64Assembler::QSUB(int cc, int Rd, int Rm, int Rn)
+void ArmToArm64Assembler::QSUB(int /*cc*/, int /*Rd*/, int /*Rm*/, int /*Rn*/)
{
NOT_IMPLEMENTED(); //Not required
}
-void ArmToArm64Assembler::QDSUB(int cc, int Rd, int Rm, int Rn)
+void ArmToArm64Assembler::QDSUB(int /*cc*/, int /*Rd*/, int /*Rm*/, int /*Rn*/)
{
NOT_IMPLEMENTED(); //Not required
}
@@ -817,15 +817,15 @@ void ArmToArm64Assembler::SMLA(int cc, int xy, int Rd, int Rm, int Rs, int Rn)
*mPC++ = A64_MADD_W(Rd, mTmpReg1, mTmpReg2, Rn);
}
-void ArmToArm64Assembler::SMLAL(int cc, int xy,
- int RdHi, int RdLo, int Rs, int Rm)
+void ArmToArm64Assembler::SMLAL(int /*cc*/, int /*xy*/,
+ int /*RdHi*/, int /*RdLo*/, int /*Rs*/, int /*Rm*/)
{
NOT_IMPLEMENTED(); //Not required
return;
}
-void ArmToArm64Assembler::SMLAW(int cc, int y,
- int Rd, int Rm, int Rs, int Rn)
+void ArmToArm64Assembler::SMLAW(int /*cc*/, int /*y*/,
+ int /*Rd*/, int /*Rm*/, int /*Rs*/, int /*Rn*/)
{
NOT_IMPLEMENTED(); //Not required
return;
@@ -890,13 +890,13 @@ uint32_t ArmToArm64Assembler::reg_imm(int Rm, int type, uint32_t shift)
return OPERAND_REG_IMM;
}
-uint32_t ArmToArm64Assembler::reg_rrx(int Rm)
+uint32_t ArmToArm64Assembler::reg_rrx(int /*Rm*/)
{
NOT_IMPLEMENTED();
return OPERAND_UNSUPPORTED;
}
-uint32_t ArmToArm64Assembler::reg_reg(int Rm, int type, int Rs)
+uint32_t ArmToArm64Assembler::reg_reg(int /*Rm*/, int /*type*/, int /*Rs*/)
{
NOT_IMPLEMENTED(); //Not required
return OPERAND_UNSUPPORTED;
@@ -937,7 +937,7 @@ uint32_t ArmToArm64Assembler::reg_scale_pre(int Rm, int type,
}
}
-uint32_t ArmToArm64Assembler::reg_scale_post(int Rm, int type, uint32_t shift)
+uint32_t ArmToArm64Assembler::reg_scale_post(int /*Rm*/, int /*type*/, uint32_t /*shift*/)
{
NOT_IMPLEMENTED(); //Not required
return OPERAND_UNSUPPORTED;
@@ -975,7 +975,7 @@ uint32_t ArmToArm64Assembler::reg_pre(int Rm, int W)
}
}
-uint32_t ArmToArm64Assembler::reg_post(int Rm)
+uint32_t ArmToArm64Assembler::reg_post(int /*Rm*/)
{
NOT_IMPLEMENTED(); //Not required
return OPERAND_UNSUPPORTED;
diff --git a/libpixelflinger/codeflinger/CodeCache.cpp b/libpixelflinger/codeflinger/CodeCache.cpp
index 4fe30d9..cfd2b37 100644
--- a/libpixelflinger/codeflinger/CodeCache.cpp
+++ b/libpixelflinger/codeflinger/CodeCache.cpp
@@ -89,7 +89,7 @@ static mspace getMspace()
gExecutableStore = mmap(NULL, kMaxCodeCacheCapacity,
PROT_READ | PROT_WRITE | PROT_EXEC,
MAP_PRIVATE, fd, 0);
- LOG_ALWAYS_FATAL_IF(gExecutableStore == NULL,
+ LOG_ALWAYS_FATAL_IF(gExecutableStore == MAP_FAILED,
"Creating code cache, mmap failed with error "
"'%s'", strerror(errno));
close(fd);
@@ -201,13 +201,9 @@ int CodeCache::cache( const AssemblyKeyBase& keyBase,
mCacheInUse += assemblySize;
mWhen++;
// synchronize caches...
-#if defined(__arm__) || defined(__mips__) || defined(__aarch64__)
- const long base = long(assembly->base());
- const long curr = base + long(assembly->size());
- err = cacheflush(base, curr, 0);
- ALOGE_IF(err, "cacheflush error %s\n",
- strerror(errno));
-#endif
+ void* base = assembly->base();
+ void* curr = (uint8_t*)base + assembly->size();
+ __builtin___clear_cache(base, curr);
}
pthread_mutex_unlock(&mLock);
diff --git a/libpixelflinger/codeflinger/GGLAssembler.cpp b/libpixelflinger/codeflinger/GGLAssembler.cpp
index 2422d7b..325caba 100644
--- a/libpixelflinger/codeflinger/GGLAssembler.cpp
+++ b/libpixelflinger/codeflinger/GGLAssembler.cpp
@@ -694,7 +694,7 @@ void GGLAssembler::build_coverage_application(component_t& fragment,
// ---------------------------------------------------------------------------
void GGLAssembler::build_alpha_test(component_t& fragment,
- const fragment_parts_t& parts)
+ const fragment_parts_t& /*parts*/)
{
if (mAlphaTest != GGL_ALWAYS) {
comment("Alpha Test");
@@ -796,7 +796,7 @@ void GGLAssembler::build_iterate_z(const fragment_parts_t& parts)
}
}
-void GGLAssembler::build_iterate_f(const fragment_parts_t& parts)
+void GGLAssembler::build_iterate_f(const fragment_parts_t& /*parts*/)
{
const needs_t& needs = mBuilderContext.needs;
if (GGL_READ_NEEDS(P_FOG, needs.p)) {
diff --git a/libpixelflinger/codeflinger/disassem.c b/libpixelflinger/codeflinger/disassem.c
index aeb8034..39dd614 100644
--- a/libpixelflinger/codeflinger/disassem.c
+++ b/libpixelflinger/codeflinger/disassem.c
@@ -301,19 +301,14 @@ static u_int disassemble_readword(u_int address);
static void disassemble_printaddr(u_int address);
u_int
-disasm(const disasm_interface_t *di, u_int loc, int altfmt)
+disasm(const disasm_interface_t *di, u_int loc, int __unused altfmt)
{
const struct arm32_insn *i_ptr = &arm32_i[0];
-
- u_int insn;
- int matchp;
+ u_int insn = di->di_readword(loc);
+ int matchp = 0;
int branch;
char* f_ptr;
- int fmt;
-
- fmt = 0;
- matchp = 0;
- insn = di->di_readword(loc);
+ int fmt = 0;
/* di->di_printf("loc=%08x insn=%08x : ", loc, insn);*/
@@ -670,7 +665,7 @@ disasm_insn_ldrhstrh(const disasm_interface_t *di, u_int insn, u_int loc)
}
static void
-disasm_insn_ldcstc(const disasm_interface_t *di, u_int insn, u_int loc)
+disasm_insn_ldcstc(const disasm_interface_t *di, u_int insn, u_int __unused loc)
{
if (((insn >> 8) & 0xf) == 1)
di->di_printf("f%d, ", (insn >> 12) & 0x07);
diff --git a/libpixelflinger/codeflinger/disassem.h b/libpixelflinger/codeflinger/disassem.h
index 02747cd..c7c60b6 100644
--- a/libpixelflinger/codeflinger/disassem.h
+++ b/libpixelflinger/codeflinger/disassem.h
@@ -49,8 +49,8 @@ extern "C" {
typedef struct {
u_int (*di_readword)(u_int);
- void (*di_printaddr)(u_int);
- void (*di_printf)(const char *, ...);
+ void (*di_printaddr)(u_int);
+ int (*di_printf)(const char *, ...);
} disasm_interface_t;
/* Prototypes for callable functions */
diff --git a/libpixelflinger/codeflinger/texturing.cpp b/libpixelflinger/codeflinger/texturing.cpp
index b2cfbb3..81950bf 100644
--- a/libpixelflinger/codeflinger/texturing.cpp
+++ b/libpixelflinger/codeflinger/texturing.cpp
@@ -694,7 +694,7 @@ void GGLAssembler::build_iterate_texture_coordinates(
}
void GGLAssembler::filter8(
- const fragment_parts_t& parts,
+ const fragment_parts_t& /*parts*/,
pixel_t& texel, const texture_unit_t& tmu,
int U, int V, pointer_t& txPtr,
int FRAC_BITS)
@@ -761,7 +761,7 @@ void GGLAssembler::filter8(
}
void GGLAssembler::filter16(
- const fragment_parts_t& parts,
+ const fragment_parts_t& /*parts*/,
pixel_t& texel, const texture_unit_t& tmu,
int U, int V, pointer_t& txPtr,
int FRAC_BITS)
@@ -879,10 +879,10 @@ void GGLAssembler::filter16(
}
void GGLAssembler::filter24(
- const fragment_parts_t& parts,
- pixel_t& texel, const texture_unit_t& tmu,
- int U, int V, pointer_t& txPtr,
- int FRAC_BITS)
+ const fragment_parts_t& /*parts*/,
+ pixel_t& texel, const texture_unit_t& /*tmu*/,
+ int /*U*/, int /*V*/, pointer_t& txPtr,
+ int /*FRAC_BITS*/)
{
// not supported yet (currently disabled)
load(txPtr, texel, 0);
@@ -989,8 +989,8 @@ void GGLAssembler::filter32(
}
#else
void GGLAssembler::filter32(
- const fragment_parts_t& parts,
- pixel_t& texel, const texture_unit_t& tmu,
+ const fragment_parts_t& /*parts*/,
+ pixel_t& texel, const texture_unit_t& /*tmu*/,
int U, int V, pointer_t& txPtr,
int FRAC_BITS)
{
generated by cgit v1.1 at 2025-08-15 18:07:38 +0000