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* Remove dead code.Elliott Hughes2014-12-031-105/+0
| | | | | | | | | | Intel accidentally made this dead code in 2010 with commit 2bef93cc20155c3a59cdbb22c564c4b385b2c160, and no one's ever noticed. Since no one noticing for so long implies that it doesn't matter, let's just kill the supposedly optimized code. Change-Id: Id5b37056cb8884c20bfe2db362e19b46f02e337d
* Fix compiler warnings in libpixelflingerAshok Bhat2014-02-201-8/+8
| | | | | Change-Id: I6a5708ae6bc934b196d59d81a6cd550b05ed704f Signed-off-by: Ashok Bhat <ashok.bhat@arm.com>
* Pixelflinger: Support for handling 64-bit addresses in GGL AssemblerAshok Bhat2013-12-121-2/+2
| | | | | | | | | | | | | | | | | | | | | | GGLAssembler assumes addresses to be 32-bit and uses ARM 32-bit instructions to load/store/manipulate addresses. To support, 64-bit architectures, following changes has been done 1. ARMAssemblerInterface has been extended to support four new operations ADDR_LDR, ADDR_STR, ADDR_SUB, ADDR_ADD. Base class implements these virtual functions to use 32bit equivalent function. This avoids existing 32-bit Assembler backend implementations like ARMAssembler and MIPSAssembler from mapping the new functions to existing equivalent routines. This also allows 64-bit Architectures like AArch64 to override the function in their assembler backend implementations. 2. GGLAssembler code (spread over GGLAssembler.cpp, GGLAssembler.h and texturing.cpp) has been changed to use the new operations for address operations. Change-Id: I3d7eace4691e3e47cef737d97ac67ce6ef4fb18d Signed-off-by: Ashok Bhat <ashok.bhat@arm.com>
* move tinyutils into its own namespaceMathias Agopian2013-04-011-1/+1
| | | | | | | | | I was fed-up with the constant conflicts in Eclipse with the "libutils" version. Also fix a few copyright notices. Change-Id: I8ffcb845af4b5d0d178f5565f64dfcfbfa27fcd6
* Add MIPS support to pixelflinger.Paul Lind2012-08-131-0/+18
| | | | | | | See the comment-block at the top of MIPSAssembler.cpp for implementation overview. Change-Id: Id492c10610574af8c89c38d19e12fafc3652c28a
* Rename (IF_)LOGE(_IF) to (IF_)ALOGE(_IF) DO NOT MERGESteve Block2012-01-081-1/+1
| | | | | Bug: 5449033 Change-Id: Ibcffdcf620ebae1c389446ce8e9d908f11ac039c
* cpu-features.h is only available for ARMBruce Beare2010-05-041-1/+1
| | | | Change-Id: I1e8001a1875bfd9cebfe18dfd757556b55c8213c
* fix sim buildJean-Baptiste Queru2010-05-031-0/+2
| | | | Change-Id: Ide300eafbcbbc6dfae25fe86188302c6676c4a3b
* Adds UXTB16 support to PixelflingerMartyn Capewell2009-12-071-1/+103
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Add support for UXTB16 to the disassembler * Add encoding of the UXTB16 instruction to the Pixelflinger JIT. Introducing the UXTB16 instruction allows removal of some masking code, and is beneficial from a pipeline point of view - lots of UXTB16 followed by MUL sequences. Also, further rescheduling and use of SMULWB brings extra performance improvements. * Use UXTB16 in bilinear filtered texturing Uses UXTB16 to extract channels for SIMD operations, rather than creating and ANDing with masks. Saves a register and is faster on A8, as UXTB16 result can feed into first stage of multiply, unlike AND. Also, used SMULWB rather than SMULBB, which allows removal of MOVs used to rescale results. Code has been scheduled for A8 pipeline, specifically aiming to allow multiplies to issue in pipeline 0, for efficient dual issue operation. Testing on SpriteMethodTest (http://code.google.com/p/apps-for-android/) gives 8% improvement (12.7 vs. 13.7 fps.) SMULBB to SMULWB trick could be used in <v6 code path, but this hasn't been implemented.
* Code drop from //branches/cupcake/...@124589The Android Open Source Project2008-12-171-0/+43
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* Initial ContributionThe Android Open Source Project2008-10-211-0/+1208
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