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author | Jing Yu <jingyu@google.com> | 2011-12-20 10:27:58 -0800 |
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committer | Jing Yu <jingyu@google.com> | 2011-12-20 10:27:58 -0800 |
commit | cf3cdbf8b3cda61a619299e7966a83df66244036 (patch) | |
tree | 201e2bcfc955f16802d3257112d29736cb3a3ce8 /binutils-2.21/ld/testsuite/ld-frv/fdpic-shared-2.d | |
parent | e4df3e0a5bb640ccfa2f30ee67fe9b3146b152d6 (diff) | |
download | toolchain_binutils-cf3cdbf8b3cda61a619299e7966a83df66244036.zip toolchain_binutils-cf3cdbf8b3cda61a619299e7966a83df66244036.tar.gz toolchain_binutils-cf3cdbf8b3cda61a619299e7966a83df66244036.tar.bz2 |
Add binutils-2.21.
Use --enable-gold=default for dual linker support.
Change-Id: Id1a744c7db58a0b5e7a3be174cdfa875f2f86e49
Diffstat (limited to 'binutils-2.21/ld/testsuite/ld-frv/fdpic-shared-2.d')
-rw-r--r-- | binutils-2.21/ld/testsuite/ld-frv/fdpic-shared-2.d | 80 |
1 files changed, 80 insertions, 0 deletions
diff --git a/binutils-2.21/ld/testsuite/ld-frv/fdpic-shared-2.d b/binutils-2.21/ld/testsuite/ld-frv/fdpic-shared-2.d new file mode 100644 index 0000000..cb4b68d --- /dev/null +++ b/binutils-2.21/ld/testsuite/ld-frv/fdpic-shared-2.d @@ -0,0 +1,80 @@ +#name: FRV uClinux PIC relocs to (mostly) global symbols, shared linking +#source: fdpic2.s +#objdump: -DR -j .text -j .data -j .got -j .plt +#ld: -shared --version-script fdpic2min.ldv + +.*: file format elf.*frv.* + +Disassembly of section \.plt: + +[0-9a-f ]+ <\.plt>: +[0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0 +[0-9a-f ]+: c0 1a 00 06 bra [0-9a-f]+ <F2-0x10> +[0-9a-f ]+: 00 00 00 10 add\.p gr0,gr16,gr0 +[0-9a-f ]+: c0 1a 00 04 bra [0-9a-f]+ <F2-0x10> +[0-9a-f ]+: 00 00 00 18 add\.p gr0,gr24,gr0 +[0-9a-f ]+: c0 1a 00 02 bra [0-9a-f]+ <F2-0x10> +[0-9a-f ]+: 00 00 00 08 add\.p gr0,gr8,gr0 +[0-9a-f ]+: 88 08 f1 40 ldd @\(gr15,gr0\),gr4 +[0-9a-f ]+: 80 30 40 00 jmpl @\(gr4,gr0\) +[0-9a-f ]+: 9c cc ff f8 lddi @\(gr15,-8\),gr14 +[0-9a-f ]+: 80 30 e0 00 jmpl @\(gr14,gr0\) +Disassembly of section \.text: + +[0-9a-f ]+<F2>: +[0-9a-f ]+: fe 3f ff fe call [0-9a-f]+ <F2-0x8> + +[0-9a-f ]+<GF0>: +[0-9a-f ]+: 80 40 f0 10 addi gr15,16,gr0 +[0-9a-f ]+: 80 fc 00 24 setlos 0x24,gr0 +[0-9a-f ]+: 80 f4 00 20 setlo 0x20,gr0 +[0-9a-f ]+: 80 f8 00 00 sethi hi\(0x0\),gr0 +[0-9a-f ]+: 80 40 f0 0c addi gr15,12,gr0 +[0-9a-f ]+: 80 fc 00 18 setlos 0x18,gr0 +[0-9a-f ]+: 80 f4 00 14 setlo 0x14,gr0 +[0-9a-f ]+: 80 f8 00 00 sethi hi\(0x0\),gr0 +[0-9a-f ]+: 80 40 ff f0 addi gr15,-16,gr0 +[0-9a-f ]+: 80 fc ff e8 setlos 0xf*ffffffe8,gr0 +[0-9a-f ]+: 80 f4 ff e0 setlo 0xffe0,gr0 +[0-9a-f ]+: 80 f8 ff ff sethi 0xffff,gr0 +[0-9a-f ]+: 80 40 ff d8 addi gr15,-40,gr0 +[0-9a-f ]+: 80 fc ff d8 setlos 0xf+fd8,gr0 +[0-9a-f ]+: 80 f4 ff d8 setlo 0xffd8,gr0 +[0-9a-f ]+: 80 f8 ff ff sethi 0xffff,gr0 +[0-9a-f ]+: 80 f4 00 1c setlo 0x1c,gr0 +[0-9a-f ]+: 80 f8 00 00 sethi hi\(0x0\),gr0 +Disassembly of section \.dat[0-9a-f ]+: + +[0-9a-f ]+<D2>: +[0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0 +[0-9a-f ]+: R_FRV_32 GD0 + +[0-9a-f ]+<GD0>: + \.\.\. +[0-9a-f ]+: R_FRV_FUNCDESC GFb +[0-9a-f ]+: R_FRV_32 GFb +[0-9A-F ]+isassembly of section \.got: + +[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x20>: +[0-9a-f ]+: 00 00 04 a4 .* +[0-9a-f ]+: R_FRV_FUNCDESC_VALUE GF9 +[0-9a-f ]+: 00 00 00 00 .* +[0-9a-f ]+: 00 00 04 9c .* +[0-9a-f ]+: R_FRV_FUNCDESC_VALUE GF8 +[0-9a-f ]+: 00 00 00 00 .* +[0-9a-f ]+: 00 00 04 ac .* +[0-9a-f ]+: R_FRV_FUNCDESC_VALUE GF7 +[0-9a-f ]+: 00 00 00 00 .* +[0-9a-f ]+: 00 00 04 94 .* +[0-9a-f ]+: R_FRV_FUNCDESC_VALUE GF0 +[0-9a-f ]+: 00 00 00 00 .* + +[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_>: + \.\.\. +[0-9a-f ]+: R_FRV_FUNCDESC GF4 +[0-9a-f ]+: R_FRV_32 GF1 +[0-9a-f ]+: R_FRV_FUNCDESC GF6 +[0-9a-f ]+: R_FRV_FUNCDESC GF5 +[0-9a-f ]+: R_FRV_32 GD4 +[0-9a-f ]+: R_FRV_32 GF3 +[0-9a-f ]+: R_FRV_32 GF2 |