diff options
| author | Ben Cheng <bccheng@google.com> | 2014-03-26 11:03:35 -0700 |
|---|---|---|
| committer | Ben Cheng <bccheng@google.com> | 2014-03-26 11:03:35 -0700 |
| commit | 09797ba54abf3683ea66eedddf6afbe7653f9cb9 (patch) | |
| tree | 8030b2ed79c7463c89d6da294782e9d503c84f50 /binutils-2.24/ld/testsuite/ld-arm | |
| parent | 5a2caf34e4995860baf405552163df288000b7bf (diff) | |
| download | toolchain_binutils-09797ba54abf3683ea66eedddf6afbe7653f9cb9.zip toolchain_binutils-09797ba54abf3683ea66eedddf6afbe7653f9cb9.tar.gz toolchain_binutils-09797ba54abf3683ea66eedddf6afbe7653f9cb9.tar.bz2 | |
Initial checkin of binutils 2.24.
Change-Id: I0dfcbae6608dded6c3586bf5f4ac27e9612e70a2
Diffstat (limited to 'binutils-2.24/ld/testsuite/ld-arm')
503 files changed, 19552 insertions, 0 deletions
diff --git a/binutils-2.24/ld/testsuite/ld-arm/abs-call-1.d b/binutils-2.24/ld/testsuite/ld-arm/abs-call-1.d new file mode 100644 index 0000000..7214e3a --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/abs-call-1.d @@ -0,0 +1,14 @@ +.*: file format elf32-.* + + +Disassembly of section .text: + +00008000 <arm>: + 8000: eb03dffe bl 100000 <foo> + 8004: ea03dffd b 100000 <foo> + 8008: fa03dffc blx 100000 <foo> + 800c: eb03dffb bl 100000 <foo> +00008010 <thumb>: + 8010: f0f7 fff6 bl 100000 <foo> + 8014: f0f7 bff4 b\.w 100000 <foo> + 8018: f0f7 eff2 blx 100000 <foo> diff --git a/binutils-2.24/ld/testsuite/ld-arm/abs-call-1.s b/binutils-2.24/ld/testsuite/ld-arm/abs-call-1.s new file mode 100644 index 0000000..ab1ac3d --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/abs-call-1.s @@ -0,0 +1,15 @@ + + .type foo, %function + .set foo, 0x100000 + +arm: bl 0x100000 + b 0x100000 + blx 0x100000 + bl foo + + .syntax unified + .thumb +thumb: bl 0x100000 + b 0x100000 + blx 0x100000 + @ bl foo is broken - gas fails to preserve the symbol reference diff --git a/binutils-2.24/ld/testsuite/ld-arm/arch-v6.s b/binutils-2.24/ld/testsuite/ld-arm/arch-v6.s new file mode 100644 index 0000000..88aef8d --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arch-v6.s @@ -0,0 +1,4 @@ + .cpu arm1136jfs + + @ Tag_CPU_raw_name + .eabi_attribute 4, "arch_v6" diff --git a/binutils-2.24/ld/testsuite/ld-arm/arch-v6k.s b/binutils-2.24/ld/testsuite/ld-arm/arch-v6k.s new file mode 100644 index 0000000..0bfec94 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arch-v6k.s @@ -0,0 +1,4 @@ + .cpu mpcore + + @ Tag_CPU_raw_name + .eabi_attribute 4, "arch_v6k" diff --git a/binutils-2.24/ld/testsuite/ld-arm/arch-v6t2.s b/binutils-2.24/ld/testsuite/ld-arm/arch-v6t2.s new file mode 100644 index 0000000..1148b20 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arch-v6t2.s @@ -0,0 +1,4 @@ + .cpu arm1156t2f-s + + @ Tag_CPU_raw_name + .eabi_attribute 4, "arch_v6t2" diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-app-abs32.d b/binutils-2.24/ld/testsuite/ld-arm/arm-app-abs32.d new file mode 100644 index 0000000..e6c4632 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-app-abs32.d @@ -0,0 +1,29 @@ + +tmpdir/arm-app-abs32: file format elf32-(little|big)arm.* +architecture: armv4t, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address .* + +Disassembly of section .plt: + +.* <.plt>: + +.*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) + +.*: e59fe004 ldr lr, \[pc, #4\] ; .* <_start-0x10> + +.*: e08fe00e add lr, pc, lr + +.*: e5bef008 ldr pc, \[lr, #8\]! + +.*: .* .* + +.*: e28fc6.* add ip, pc, #.* + +.*: e28cca.* add ip, ip, #.* ; .* + +.*: e5bcf.* ldr pc, \[ip, #.*\]!.* +Disassembly of section .text: + +.* <_start>: + +.*: e1a0c00d mov ip, sp + +.*: e92dd800 push {fp, ip, lr, pc} + +.*: e59f0004 ldr r0, \[pc, #4\] ; .* <_start\+0x14> + +.*: e89d6800 ldm sp, {fp, sp, lr} + +.*: e12fff1e bx lr + +.*: .* .* + +.* <app_func2>: + +.*: e12fff1e bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-app-abs32.r b/binutils-2.24/ld/testsuite/ld-arm/arm-app-abs32.r new file mode 100644 index 0000000..fd68a0c --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-app-abs32.r @@ -0,0 +1,8 @@ + +tmpdir/arm-app-abs32: file format elf32-(little|big)arm.* + +DYNAMIC RELOCATION RECORDS +OFFSET TYPE VALUE +.* R_ARM_JUMP_SLOT lib_func1 + + diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-app-abs32.s b/binutils-2.24/ld/testsuite/ld-arm/arm-app-abs32.s new file mode 100644 index 0000000..a1cf526 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-app-abs32.s @@ -0,0 +1,16 @@ + .text + .globl _start +_start: + mov ip, sp + stmdb sp!, {r11, ip, lr, pc} + ldr a1, .Lval + ldmia sp, {r11, sp, lr} + bx lr + +.Lval: + .long lib_func1 + + .globl app_func2 +app_func2: + bx lr + diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-app-movw.s b/binutils-2.24/ld/testsuite/ld-arm/arm-app-movw.s new file mode 100644 index 0000000..55ced97 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-app-movw.s @@ -0,0 +1,11 @@ + .text + .globl _start +_start: + movw r0, #:lower16:data_obj + movt r0, #:upper16:data_obj + movw r0, #:lower16:lib_func1 + movt r0, #:upper16:lib_func1 + + .globl app_func2 +app_func2: + bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-app.d b/binutils-2.24/ld/testsuite/ld-arm/arm-app.d new file mode 100644 index 0000000..88169af --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-app.d @@ -0,0 +1,35 @@ + +tmpdir/arm-app: file format elf32-(little|big)arm +architecture: armv4t, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x.* + +Disassembly of section .plt: + +.* <.plt>: + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) + .*: e59fe004 ldr lr, \[pc, #4\] ; .* <_start-0x10> + .*: e08fe00e add lr, pc, lr + .*: e5bef008 ldr pc, \[lr, #8\]! + .*: .* + .*: e28fc6.* add ip, pc, #.* + .*: e28cca.* add ip, ip, #.* ; 0x.* + .*: e5bcf.* ldr pc, \[ip, #.*\]!.* +Disassembly of section .text: + +.* <_start>: + .*: e1a0c00d mov ip, sp + .*: e92dd800 push {fp, ip, lr, pc} + .*: eb000001 bl .* <app_func> + .*: e89d6800 ldm sp, {fp, sp, lr} + .*: e12fff1e bx lr + +.* <app_func>: + .*: e1a0c00d mov ip, sp + .*: e92dd800 push {fp, ip, lr, pc} + .*: ebfffff4 bl .* <_start-0xc> + .*: e89d6800 ldm sp, {fp, sp, lr} + .*: e12fff1e bx lr + +.* <app_func2>: + .*: e12fff1e bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-app.r b/binutils-2.24/ld/testsuite/ld-arm/arm-app.r new file mode 100644 index 0000000..1b5cef2 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-app.r @@ -0,0 +1,9 @@ + +tmpdir/arm-app.*: file format elf32-(little|big)arm.* + +DYNAMIC RELOCATION RECORDS +OFFSET TYPE VALUE +.* R_ARM_COPY data_obj +.* R_ARM_JUMP_SLOT lib_func1 + + diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-app.s b/binutils-2.24/ld/testsuite/ld-arm/arm-app.s new file mode 100644 index 0000000..8f6d27c --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-app.s @@ -0,0 +1,23 @@ + .text + .globl _start +_start: + mov ip, sp + stmdb sp!, {r11, ip, lr, pc} + bl app_func + ldmia sp, {r11, sp, lr} + bx lr + + .globl app_func +app_func: + mov ip, sp + stmdb sp!, {r11, ip, lr, pc} + bl lib_func1 + ldmia sp, {r11, sp, lr} + bx lr + + .globl app_func2 +app_func2: + bx lr + + .data + .long data_obj diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-be8.d b/binutils-2.24/ld/testsuite/ld-arm/arm-be8.d new file mode 100644 index 0000000..16090b3 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-be8.d @@ -0,0 +1,16 @@ + +.*: file format.* + +Disassembly of section .text: + +00008000 <arm>: + 8000: e3a00000 mov r0, #0 + 8004: e12fff1e bx lr + +00008008 <thumb>: + 8008: 46c0 nop ; \(mov r8, r8\) + 800a: 4770 bx lr + 800c: f7ff fffc bl 8008 <thumb> + +00008010 <data>: + 8010: 12345678 .word 0x12345678 diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-be8.s b/binutils-2.24/ld/testsuite/ld-arm/arm-be8.s new file mode 100644 index 0000000..871b691 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-be8.s @@ -0,0 +1,14 @@ +.arch armv6 +.text +arm: +mov r0, #0 +$m: +bx lr +.thumb +.thumb_func +thumb: +nop +bx lr +bl thumb +data: +.word 0x12345678 diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-call.d b/binutils-2.24/ld/testsuite/ld-arm/arm-call.d new file mode 100644 index 0000000..a320743 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-call.d @@ -0,0 +1,58 @@ + +.*: file format.* + +Disassembly of section .text: + +00008000 <_start>: + 8000: eb00000d bl 803c <arm> + 8004: fa00000d blx 8040 <t1> + 8008: fb00000c blx 8042 <t2> + 800c: fb00000d blx 804a <t5> + 8010: fa00000a blx 8040 <t1> + 8014: fb000009 blx 8042 <t2> + 8018: ea000010 b 8060 <__t1_from_arm> + 801c: ea000011 b 8068 <__t2_from_arm> + 8020: 1b00000e blne 8060 <__t1_from_arm> + 8024: 1b00000f blne 8068 <__t2_from_arm> + 8028: 1b000003 blne 803c <arm> + 802c: eb000002 bl 803c <arm> + 8030: faffffff blx 8034 <thumblocal> + +00008034 <thumblocal>: + 8034: 4770 bx lr + +00008036 <t3>: + 8036: 4770 bx lr + +00008038 <t4>: + 8038: 4770 bx lr + 803a: 46c0 nop ; \(mov r8, r8\) + +0000803c <arm>: + 803c: e12fff1e bx lr + +00008040 <t1>: + 8040: 4770 bx lr + +00008042 <t2>: + 8042: f7ff fff8 bl 8036 <t3> + 8046: f7ff fff7 bl 8038 <t4> + +0000804a <t5>: + 804a: f000 f801 bl 8050 <local_thumb> + 804e: 46c0 nop ; \(mov r8, r8\) + +00008050 <local_thumb>: + 8050: f7ff fff1 bl 8036 <t3> + 8054: f7ff efd4 blx 8000 <_start> + 8058: f7ff efd2 blx 8000 <_start> + 805c: 0000 movs r0, r0 + ... + +00008060 <__t1_from_arm>: + 8060: e51ff004 ldr pc, \[pc, #-4\] ; 8064 <__t1_from_arm\+0x4> + 8064: 00008041 .word 0x00008041 + +00008068 <__t2_from_arm>: + 8068: e51ff004 ldr pc, \[pc, #-4\] ; 806c <__t2_from_arm\+0x4> + 806c: 00008043 .word 0x00008043 diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-call1.s b/binutils-2.24/ld/testsuite/ld-arm/arm-call1.s new file mode 100644 index 0000000..e4ab1c2 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-call1.s @@ -0,0 +1,31 @@ +# Test R_ARM_CALL and R_ARM_JUMP24 relocations and interworking + .text + .arch armv5t + .global _start + .type _start, %function +_start: + bl arm + bl t1 + bl t2 + bl t5 + blx t1 + blx t2 + b t1 + b t2 + blne t1 + blne t2 + blne arm + blx arm + blx thumblocal + .thumb +thumblocal: + bx lr + .global t3 + .thumb_func +t3: + bx lr + .global t4 + .thumb_func +t4: + bx lr + nop diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-call2.s b/binutils-2.24/ld/testsuite/ld-arm/arm-call2.s new file mode 100644 index 0000000..02aa379 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-call2.s @@ -0,0 +1,25 @@ + .text + .arch armv5t + .global arm + .global t1 + .global t2 + .global t5 + .type arm, %function +arm: + bx lr + .thumb + .thumb_func +t1: + bx lr + .thumb_func +t2: + bl t3 + bl t4 + .thumb_func +t5: + bl local_thumb + nop +local_thumb: + blx t3 + bl _start + blx _start diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-dyn.ld b/binutils-2.24/ld/testsuite/ld-arm/arm-dyn.ld new file mode 100644 index 0000000..bef9a18 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-dyn.ld @@ -0,0 +1,195 @@ +/* Script for -z combreloc: combine and sort reloc sections */ +OUTPUT_ARCH(arm) +ENTRY(_start) +/* Do we need any of these for elf? + __DYNAMIC = 0; */ +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + PROVIDE (__executable_start = 0x8000); . = 0x8000; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .gnu.version : { *(.gnu.version) } + .gnu.version_d : { *(.gnu.version_d) } + .gnu.version_r : { *(.gnu.version_r) } + .rel.dyn : + { + *(.rel.init) + *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) + *(.rel.fini) + *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) + *(.rel.data.rel.ro*) + *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) + *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) + *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) + *(.rel.ctors) + *(.rel.dtors) + *(.rel.got) + *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) + } + .rela.dyn : + { + *(.rela.init) + *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) + *(.rela.fini) + *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) + *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) + *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) + *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) + *(.rela.ctors) + *(.rela.dtors) + *(.rela.got) + *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) + } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : + { + KEEP (*(.init)) + } =0 + .plt : { *(.plt) } + .text : + { + *(.text .stub .text.* .gnu.linkonce.t.*) + KEEP (*(.text.*personality*)) + /* .gnu.warning sections are handled specially by elf32.em. */ + *(.gnu.warning) + *(.glue_7t) *(.glue_7) + } =0 + .fini : + { + KEEP (*(.fini)) + } =0 + PROVIDE (__etext = .); + PROVIDE (_etext = .); + PROVIDE (etext = .); + .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } + .rodata1 : { *(.rodata1) } + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } + PROVIDE_HIDDEN (__exidx_start = .); + .ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) } + PROVIDE_HIDDEN (__exidx_end = .); + .eh_frame_hdr : { *(.eh_frame_hdr) } + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } + .gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } + /* Adjust the address for the data segment. We want to adjust up to + the same address within the page on the next page up. */ + . = ALIGN (0x8000) - ((0x8000 - .) & (0x8000 - 1)); . = DATA_SEGMENT_ALIGN (0x8000, 0x1000); + /* Exception handling */ + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } + .gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } + /* Thread Local Storage sections */ + .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } + .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } + /* Ensure the __preinit_array_start label is properly aligned. We + could instead move the label definition inside the section, but + the linker would then create the section even if it turns out to + be empty, which isn't pretty. */ + . = ALIGN(32 / 8); + PROVIDE (__preinit_array_start = .); + .preinit_array : { KEEP (*(.preinit_array)) } + PROVIDE (__preinit_array_end = .); + PROVIDE (__init_array_start = .); + .init_array : { KEEP (*(.init_array)) } + PROVIDE (__init_array_end = .); + PROVIDE (__fini_array_start = .); + .fini_array : { KEEP (*(.fini_array)) } + PROVIDE (__fini_array_end = .); + .ctors : + { + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. The wildcard also means that it + doesn't matter which directory crtbegin.o + is in. */ + KEEP (*crtbegin*.o(.ctors)) + /* We don't want to include the .ctor section from + from the crtend.o file until after the sorted ctors. + The .ctor section from the crtend file contains the + end of ctors marker and it must be last */ + KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + } + .dtors : + { + KEEP (*crtbegin*.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + } + .jcr : { KEEP (*(.jcr)) } + .data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } + .dynamic : { *(.dynamic) } + .got : { *(.got.plt) *(.got) } + .data : + { + __data_start = . ; + *(.data .data.* .gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + SORT(CONSTRUCTORS) + } + .data1 : { *(.data1) } + _edata = .; + PROVIDE (edata = .); + . = .; + __bss_start = .; + __bss_start__ = .; + .bss : + { + *(.dynbss) + *(.bss .bss.* .gnu.linkonce.b.*) + *(COMMON) + /* Align here to ensure that the .bss section occupies space up to + _end. Align after .bss to ensure correct alignment even if the + .bss section disappears because there are no input sections. */ + . = ALIGN(32 / 8); + } + . = ALIGN(32 / 8); + _end = .; + _bss_end__ = . ; __bss_end__ = . ; __end__ = . ; + PROVIDE (end = .); + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) } + /DISCARD/ : { *(.note.GNU-stack) } +} + + diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-elf.exp b/binutils-2.24/ld/testsuite/ld-arm/arm-elf.exp new file mode 100644 index 0000000..4c0f802 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-elf.exp @@ -0,0 +1,840 @@ +# Expect script for various ARM ELF tests. +# Copyright 2002-2013 Free Software Foundation, Inc. +# +# This file is part of the GNU Binutils. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, +# MA 02110-1301, USA. +# + +if {[istarget "arm-*-vxworks"]} { + set armvxworkstests { + {"VxWorks shared library test 1" "-shared -Tvxworks1.ld" "" + "" {vxworks1-lib.s} + {{readelf --relocs vxworks1-lib.rd} {objdump -dr vxworks1-lib.dd} + {readelf --symbols vxworks1-lib.nd} {readelf -d vxworks1-lib.td}} + "libvxworks1.so"} + {"VxWorks executable test 1 (dynamic)" \ + "tmpdir/libvxworks1.so -Tvxworks1.ld -q --force-dynamic" "" + "" {vxworks1.s} + {{readelf --relocs vxworks1.rd} {objdump -dr vxworks1.dd}} + "vxworks1"} + {"VxWorks executable test 2 (dynamic)" \ + "-Tvxworks1.ld -q --force-dynamic" "" + "" {vxworks2.s} + {{readelf --segments vxworks2.sd}} + "vxworks2"} + {"VxWorks executable test 2 (static)" + "-Tvxworks1.ld" "" + "" {vxworks2.s} + {{readelf --segments vxworks2-static.sd}} + "vxworks2"} + } + run_ld_link_tests $armvxworkstests + run_dump_test "vxworks1-static" + run_dump_test "emit-relocs1-vxworks" +} + +if { [istarget "arm*-*-symbianelf*"] } { + run_dump_test "symbian-seg1" +} + +# Exclude non-ARM-ELF targets. + +if { ![is_elf_format] || ![istarget "arm*-*-*"] } { + return +} + +# List contains test-items with 3 items followed by 2 lists and one more item: +# 0:name 1:ld early options 2:ld late options 3:assembler options +# 4:filenames of assembler files 5: action and options. 6: name of output file + +# Actions: +# objdump: Apply objdump options on result. Compare with regex (last arg). +# nm: Apply nm options on result. Compare with regex (last arg). +# readelf: Apply readelf options on result. Compare with regex (last arg). + +set armelftests_common { + {"Group relocations" "-Ttext 0x8000 -Tdata 0x3000000 --section-start alpha=0xeef0 --section-start beta=0xffeef0" "" "" {group-relocs.s} + {{objdump -dr group-relocs.d}} + "group-relocs"} + {"Indirect cross-library function reference (set-up)" + "-shared" "" "" {arm-lib-plt-2a.s} + {} + "arm-lib-plt-2a.so"} + {"Indirect cross-library function reference" + "-shared tmpdir/arm-lib-plt-2a.so" "" "" {arm-lib-plt-2b.s} + {{objdump -dr arm-lib-plt-2.dd} {readelf --relocs arm-lib-plt-2.rd}} + "arm-lib-plt-2b.so"} + {"Simple static application" "" "" "" {arm-static-app.s} + {{objdump -fdw arm-static-app.d} {objdump -rw arm-static-app.r}} + "arm-static-app"} + {"target1-abs" "-static --target1-abs -T arm.ld" "" "" {arm-target1.s} + {{objdump -s arm-target1-abs.d}} + "arm-target1-abs"} + {"target1-rel" "-static --target1-rel -T arm.ld" "" "" {arm-target1.s} + {{objdump -s arm-target1-rel.d}} + "arm-target1-rel"} + {"target2-rel" "-static --target2=rel -T arm.ld" "" "" {arm-target2.s} + {{objdump -s arm-target2-rel.d}} + "arm-target2-rel"} + {"target2-abs" "-static --target2=abs -T arm.ld" "" "" {arm-target2.s} + {{objdump -s arm-target2-abs.d}} + "arm-target2-abs"} + {"target2-got-rel" "-static --target2=got-rel -T arm.ld" "" "" {arm-target2.s} + {{objdump -s arm-target2-got-rel.d}} + "arm-target2-got-rel"} + {"arm-rel31" "-static -T arm.ld" "" "" {arm-rel31.s} + {{objdump -s arm-rel31.d}} + "arm-rel31"} + {"arm-rel32" "-shared -T arm-dyn.ld" "" "" {arm-rel32.s} + {{objdump -Rsj.data arm-rel32.d}} + "arm-rel32"} + {"arm-call" "--no-fix-arm1176 -static -T arm.ld" "" "-meabi=4" {arm-call1.s arm-call2.s} + {{objdump -d arm-call.d}} + "arm-call"} + {"TLS shared library" "-shared -T arm-lib.ld" "" "" {tls-lib.s} + {{objdump -fdw tls-lib.d} {objdump -Rw tls-lib.r}} + "tls-lib.so"} + {"TLS dynamic application" "-T arm-dyn.ld tmpdir/tls-lib.so" "" "" {tls-app.s} + {{objdump -fdw tls-app.d} {objdump -Rw tls-app.r}} + "tls-app"} + {"TLS gnu shared library got" "-shared -T arm-dyn.ld" "" "" {tls-gdesc-got.s} + {{objdump "-fDR -j .got" tls-gdesc-got.d}} + "tls-lib2-got.so"} + {"TLS gnu GD to IE relaxation" "-static -T arm-dyn.ld" "" "" {tls-gdierelax.s} + {{objdump -fdw tls-gdierelax.d}} + "tls-app-rel-ie"} + {"TLS gnu GD to IE shared relaxation" "--no-fix-arm1176 -shared -T arm-dyn.ld" "" "" {tls-gdierelax2.s} + {{objdump -fdw tls-gdierelax2.d}} + "tls-app-rel-ie2"} + {"TLS gnu GD to LE relaxation" "-T arm-dyn.ld" "" "" {tls-gdlerelax.s} + {{objdump -fdw tls-gdlerelax.d}} + "tls-app-rel-le"} + {"TLS mixed models shared lib" "-shared -T arm-dyn.ld" "" "" {tls-mixed.s} + {{objdump -Rw tls-mixed.r}} + "tls-mixed.so"} + {"TLS descseq relaxation" "-T arm-dyn.ld" "" "" {tls-descrelax.s} + {{objdump -fdw tls-descrelax.d}} + "tls-descrelax"} + {"TLS descseq relaxation v7" "-T arm-dyn.ld" "" "" {tls-descrelax-v7.s} + {{objdump -fdw tls-descrelax-v7.d}} + "tls-descrelax-v7"} + {"TLS descseq relaxation BE8" "-T arm-dyn.ld -EB --be8" "" "-mbig-endian" {tls-descrelax-be8.s} + {{objdump -fdw tls-descrelax-be8.d}} + "tls-descrelax-be8"} + {"TLS descseq relaxation BE32" "-T arm-dyn.ld -EB" "" "-mbig-endian" {tls-descrelax-be32.s} + {{objdump -fdw tls-descrelax-be32.d}} + "tls-descrelax-be32"} + {"TLS local PIC symbol static link" "-T arm.ld" "" "" {tls-local-static.s} + {{objdump -fdw tls-local-static.d}} + "tls-local-static"} + {"MOVW/MOVT" "-static -T arm.ld" "" "" {arm-movwt.s} + {{objdump -dw arm-movwt.d}} + "arm-movwt"} + {"BE8 Mapping Symbols" "-static -T arm.ld -EB --be8" "" "-EB" {arm-be8.s} + {{objdump -d arm-be8.d}} + "arm-be8"} + {"VFP11 denorm erratum fix, scalar operation" + "-EL --vfp11-denorm-fix=scalar -Ttext=0x8000" "" "-EL -mfpu=vfpxd" {vfp11-fix-scalar.s} + {{objdump -dr vfp11-fix-scalar.d}} + "vfp11-fix-scalar"} + {"VFP11 denorm erratum fix, vector operation" + "-EB --vfp11-denorm-fix=vector -Ttext=0x8000" "" "-EB -mfpu=vfpxd" {vfp11-fix-vector.s} + {{objdump -dr vfp11-fix-vector.d}} + "vfp11-fix-vector"} + {"VFP11 denorm erratum fix, embedded code-like data" + "-EL --vfp11-denorm-fix=scalar -Ttext=0x8000" "" "-EL -mfpu=vfpxd" {vfp11-fix-none.s} + {{objdump -dr vfp11-fix-none.d}} + "vfp11-fix-none"} + {"Unwinding and -gc-sections" "-gc-sections" "" "" {gc-unwind.s} + {{objdump -sj.data gc-unwind.d}} + "gc-unwind"} + {"script-type" "-static -T script-type.ld" "" "" {script-type.s} + {{readelf -s script-type.sym}} + "script-type"} + {"callweak" "-static -T arm.ld" "" "" {callweak.s} + {{objdump -dr callweak.d}} + "callweak"} + {"callweak-2" "-static -T arm.ld" "" "" {callweak-2.s} + {{objdump -dr callweak-2.d}} + "callweak-2"} + {"Relocation boundaries" "-defsym x=0 -defsym y=0 -defsym _start=0" "" "" {reloc-boundaries.s} + {{objdump -s reloc-boundaries.d}} + "reloc-boundaries"} + {"Data only mapping symbols" "-T data-only-map.ld -Map map" "" "" {data-only-map.s} + {{objdump -dr data-only-map.d}} + "data-only-map"} + {"Data only mapping symbols for merged sections" "-T rodata-merge-map.ld" "" "" {rodata-merge-map1.s rodata-merge-map2.s rodata-merge-map3.s} + {{readelf -s rodata-merge-map.sym}} + "rodata-merge-map"} + {"GOT relocations in executables (setup)" "-shared" "" + "" {exec-got-1a.s} + {} + "exec-got-1.so"} + {"GOT relocations in executables" "tmpdir/exec-got-1.so" "" + "" {exec-got-1b.s} + {{readelf --relocs exec-got-1.d}} + "exec-got-1"} + {"abs call" "-T arm.ld" "" "" {abs-call-1.s} + {{objdump -d abs-call-1.d}} + "abs-call-1"} + {"Simple non-PIC shared library (no PLT check)" "-shared" "" "" {arm-lib.s} + {{objdump -Rw arm-lib.r}} + "arm-lib.so"} + {"EABI soft-float ET_EXEC ABI flag" "-T arm.ld" "" "-mfloat-abi=soft -meabi=5" {eabi-soft-float.s} + {{readelf -h eabi-soft-float.d}} + "eabi-soft-float"} + {"EABI hard-float ET_EXEC ABI flag" "-T arm.ld" "" "-mfloat-abi=hard -meabi=5" {eabi-hard-float.s} + {{readelf -h eabi-hard-float.d}} + "eabi-hard-float"} + {"EABI hard-float ET_DYN ABI flag" "-shared" "" "-mfloat-abi=hard -meabi=5" {eabi-hard-float.s} + {{readelf -h eabi-hard-float.d}} + "eabi-hard-float.so"} + {"EABI ABI flags wrong ABI version" "-T arm.ld" "" "-mfloat-abi=soft -meabi=4" {eabi-soft-float.s} + {{readelf -h eabi-soft-float-ABI4.d}} + "eabi-soft-float-no-flags"} + {"EABI ABI flags ld -r" "-r" "" "-mfloat-abi=soft -meabi=5" {eabi-soft-float.s} + {{readelf -h eabi-soft-float-r.d}} + "eabi-soft-float-r.o"} +} + +set armelftests_nonacl { + {"Thumb-1 BL" "-Ttext 0x1000 --section-start .foo=0x401000" "" "" {thumb1-bl.s} + {{objdump -dr thumb1-bl.d}} + "thumb1-bl"} + {"Thumb entry point" "-T arm.ld" "" "" {thumb-entry.s} + {{readelf -h thumb-entry.d}} + "thumb-entry"} + {"thumb-rel32" "-static -T arm.ld" "" "" {thumb-rel32.s} + {{objdump -s thumb-rel32.d}} + "thumb-rel32"} + {"jump19" "-static -T arm.ld" "" "" {jump19.s} + {{objdump -dr jump19.d}} + "jump19"} + {"Thumb and -gc-sections" "-shared -T arm-dyn.ld" "" "" {gc-thumb-lib.s} + {} + "gc-thumb-lib.so"} + {"Thumb and -gc-sections" "-pie -T arm.ld -gc-sections tmpdir/gc-thumb-lib.so" "" "" {gc-thumb.s} + {{readelf --relocs gc-thumb.d}} + "gc-thumb"} + {"arm-pic-veneer" "-static -T arm.ld --pic-veneer" "" "" {arm-pic-veneer.s} + {{objdump -d arm-pic-veneer.d}} + "arm-pic-veneer"} + + {"Simple non-PIC shared library" "-shared" "" "" {arm-lib.s} + {{objdump -fdw arm-lib.d} {objdump -Rw arm-lib.r}} + "arm-lib.so"} + {"Simple PIC shared library" "-shared" "" "" {arm-lib-plt32.s} + {{objdump -fdw arm-lib-plt32.d} {objdump -Rw arm-lib-plt32.r}} + "arm-lib-plt32.so"} + {"Simple dynamic application" "tmpdir/arm-lib.so" "" "" {arm-app.s} + {{objdump -fdw arm-app.d} {objdump -Rw arm-app.r}} + "arm-app"} + {"Simple static application without .rel.plt in linker script" + "-T arm-no-rel-plt.ld" "" "" {arm-static-app.s} + {{objdump -fdw arm-static-app.d} {objdump -rw arm-static-app.r}} + "arm-static-app"} + {"Simple dynamic application without .rel.plt in linker script" + "tmpdir/arm-lib.so -T arm-no-rel-plt.ld" "" "" {arm-app.s} + {{ld arm-no-rel-plt.out}} + "arm-app"} + {"Non-pcrel function reference" "tmpdir/arm-lib.so" "" "" {arm-app-abs32.s} + {{objdump -fdw arm-app-abs32.d} {objdump -Rw arm-app-abs32.r}} + "arm-app-abs32"} + {"Thumb shared library with ARM entry points" "-shared -T arm-lib.ld" "" "-mthumb-interwork" + {mixed-lib.s} + {{objdump -fdw armthumb-lib.d} {readelf -Ds armthumb-lib.sym}} + "armthumb-lib.so"} + {"Mixed ARM/Thumb shared library" "-shared -T arm-lib.ld -use-blx" "" "" + {mixed-lib.s} + {{objdump -fdw mixed-lib.d} {objdump -Rw mixed-lib.r} + {readelf -Ds mixed-lib.sym}} + "mixed-lib.so"} + {"Mixed ARM/Thumb dynamic application" "tmpdir/mixed-lib.so -T arm-dyn.ld" "" "" + {mixed-app.s} + {{objdump -fdw mixed-app.d} {objdump -Rw mixed-app.r} + {readelf -Ds mixed-app.sym}} + "mixed-app"} + {"Mixed ARM/Thumb arch5 dynamic application" "tmpdir/mixed-lib.so -T arm-dyn.ld --use-blx" "" "" + {mixed-app.s} + {{objdump -fdw mixed-app-v5.d} {objdump -Rw mixed-app.r} + {readelf -Ds mixed-app.sym}} + "mixed-app-v5"} + {"Using Thumb lib by another lib" "-shared tmpdir/mixed-lib.so" "" "" {use-thumb-lib.s} + {{readelf -Ds use-thumb-lib.sym}} + "use-thumb-lib.so"} + {"Preempt Thumb symbol" "tmpdir/mixed-lib.so -T arm-dyn.ld --use-blx" "" "" + {preempt-app.s} + {{readelf -Ds preempt-app.sym}} + "preempt-app"} + {"TLS gnu shared library inlined trampoline" "--no-fix-arm1176 -shared -T arm-dyn.ld" "" "" {tls-descseq.s} + {{objdump -fdw tls-descseq.d} {objdump -Rw tls-descseq.r}} + "tls-lib2inline.so"} + {"TLS shared library gdesc local" "--no-fix-arm1176 -shared -T arm-dyn.ld" "" "" {tls-lib-loc.s} + {{objdump -fdw tls-lib-loc.d} {objdump -Rw tls-lib-loc.r}} + "tls-lib-loc.so"} + {"Cortex-A8 erratum fix, b.w" + "-EL -Ttext=0x8f00 --fix-cortex-a8" "" "-EL" {cortex-a8-fix-b.s} + {{objdump -dr cortex-a8-fix-b.d}} + "cortex-a8-fix-b"} + {"Cortex-A8 erratum fix, bl.w" + "-EL -Ttext=0x8f00 --fix-cortex-a8" "" "-EL" {cortex-a8-fix-bl.s} + {{objdump -dr cortex-a8-fix-bl.d}} + "cortex-a8-fix-bl"} + {"Cortex-A8 erratum fix, bcc.w" + "-EL -Ttext=0x8f00 --fix-cortex-a8" "" "-EL" {cortex-a8-fix-bcc.s} + {{objdump -dr cortex-a8-fix-bcc.d}} + "cortex-a8-fix-bcc"} + {"Cortex-A8 erratum fix, blx.w" + "-EL -Ttext=0x8f00 --fix-cortex-a8" "" "-EL" {cortex-a8-fix-blx.s} + {{objdump -dr cortex-a8-fix-blx.d}} + "cortex-a8-fix-blx"} + {"Cortex-A8 erratum fix, relocate b.w to ARM" + "-EL -Ttext=0x8f00 --fix-cortex-a8" "" "-EL" {cortex-a8-arm-target.s cortex-a8-fix-b-rel.s} + {{objdump -dr cortex-a8-fix-b-rel-arm.d}} + "cortex-a8-fix-b-rel-arm"} + {"Cortex-A8 erratum fix, relocate b.w to Thumb" + "-EL -Ttext=0x8f00 --fix-cortex-a8" "" "-EL" {cortex-a8-thumb-target.s cortex-a8-fix-b-rel.s} + {{objdump -dr cortex-a8-fix-b-rel-thumb.d}} + "cortex-a8-fix-b-rel-thumb"} + {"Cortex-A8 erratum fix, relocate bl.w to ARM" + "-EL -Ttext=0x8f00 --fix-cortex-a8" "" "-EL" {cortex-a8-arm-target.s cortex-a8-fix-bl-rel.s} + {{objdump -dr cortex-a8-fix-bl-rel-arm.d}} + "cortex-a8-fix-bl-rel-arm"} + {"Cortex-A8 erratum fix, relocate bl.w to Thumb" + "-EL -Ttext=0x8f00 --fix-cortex-a8" "" "-EL" {cortex-a8-thumb-target.s cortex-a8-fix-bl-rel.s} + {{objdump -dr cortex-a8-fix-bl-rel-thumb.d}} + "cortex-a8-fix-bl-rel-thumb"} + {"Cortex-A8 erratum fix, relocate b<cond>.w to Thumb" + "-EL -Ttext=0x8f00 --fix-cortex-a8" "" "-EL" {cortex-a8-thumb-target.s cortex-a8-fix-bcc-rel.s} + {{objdump -dr cortex-a8-fix-bcc-rel-thumb.d}} + "cortex-a8-fix-bcc-rel-thumb"} + {"Cortex-A8 erratum fix, relocate blx.w to ARM" + "-EL -Ttext=0x8f00 --fix-cortex-a8" "" "-EL" {cortex-a8-arm-target.s cortex-a8-fix-blx-rel.s} + {{objdump -dr cortex-a8-fix-blx-rel-arm.d}} + "cortex-a8-fix-blx-rel-arm"} + {"Cortex-A8 erratum fix, relocate blx.w to Thumb" + "-EL -Ttext=0x8f00 --fix-cortex-a8" "" "-EL" {cortex-a8-thumb-target.s cortex-a8-fix-blx-rel.s} + {{objdump -dr cortex-a8-fix-blx-rel-thumb.d}} + "cortex-a8-fix-blx-rel-thumb"} + {"Cortex-A8 erratum fix, relocate bl.w and far call" + "-EL -Ttext=0x00 --fix-cortex-a8 --defsym _start=0" "" + "-EL -mcpu=cortex-a8" {cortex-a8-far-1.s cortex-a8-far-2.s cortex-a8-far-3.s} + {{objdump -dr cortex-a8-far.d}} + "cortex-a8-far"} + {"Cortex-A8 erratum fix, headers" + "-EL --fix-cortex-a8 -T cortex-a8-fix-hdr.t" "" + "-EL -mcpu=cortex-a8" {cortex-a8-fix-hdr.s} + {{objdump -dr cortex-a8-fix-hdr.d}} + "cortex-a8-fix-hdr"} + {"Cortex-A8 erratum fix, blx.w and b<cond>.w together" + "-EL -Ttext=0x8f00 --fix-cortex-a8" "" "-EL" {cortex-a8-fix-blx-bcond.s} + {{objdump -dr cortex-a8-fix-blx-bcond.d}} + "cortex-a8-fix-blx-bcond"} + {"Cortex-A8 erratum fix, b.w to PLT" + "-EL -Tcortex-a8-fix-plt.ld --fix-cortex-a8 -shared" "" "-EL" + {cortex-a8-fix-b-plt.s} + {{objdump -dr cortex-a8-fix-b-plt.d}} + "cortex-a8-fix-b-plt"} + {"Cortex-A8 erratum fix, bl.w to PLT" + "-EL -Tcortex-a8-fix-plt.ld --fix-cortex-a8 -shared" "" "-EL" + {cortex-a8-fix-bl-plt.s} + {{objdump -dr cortex-a8-fix-bl-plt.d}} + "cortex-a8-fix-bl-plt"} + {"Cortex-A8 erratum fix, bcc.w to PLT" + "-EL -Tcortex-a8-fix-plt.ld --fix-cortex-a8 -shared" "" "-EL" + {cortex-a8-fix-bcc-plt.s} + {{objdump -dr cortex-a8-fix-bcc-plt.d}} + "cortex-a8-fix-bcc-plt"} + {"Cortex-A8 erratum fix, blx.w to PLT" + "-EL -Tcortex-a8-fix-plt.ld --fix-cortex-a8 -shared" "" "-EL" + {cortex-a8-fix-blx-plt.s} + {{objdump -dr cortex-a8-fix-blx-plt.d}} + "cortex-a8-fix-blx-plt"} + {"Cortex-A8 erratum fix, relocate bl.w to PLT" + "-EL --section-start=.plt=0x8e00 -Ttext=0x8f00 --fix-cortex-a8 -shared" "" + "-EL" {cortex-a8-thumb-target.s cortex-a8-fix-bl-rel.s} + {{objdump -dr cortex-a8-fix-bl-rel-plt.d}} + "cortex-a8-fix-bl-rel-thumb"} + {"IFUNC test 1" "-T ifunc-static.ld" "" "" {ifunc-1.s} + {{objdump -d ifunc-1.dd} + {objdump {-s -j.data -j.got} ifunc-1.gd} + {readelf -dr ifunc-1.rd}} + "ifunc-1"} + {"IFUNC test 2" "-T ifunc-static.ld" "" "" {ifunc-2.s} + {{objdump -d ifunc-2.dd} + {objdump {-s -j.data -j.got} ifunc-2.gd} + {readelf -dr ifunc-2.rd}} + "ifunc-2"} + {"IFUNC test 3" "-T ifunc-dynamic.ld -shared" "" "" {ifunc-3.s} + {{objdump -d ifunc-3.dd} + {objdump {-s -j.data -j.got} ifunc-3.gd} + {readelf -r ifunc-3.rd}} + "ifunc-3.so"} + {"IFUNC test 4" "-T ifunc-dynamic.ld -shared" "" "" {ifunc-4.s} + {{objdump -d ifunc-4.dd} + {objdump {-s -j.data -j.got} ifunc-4.gd} + {readelf -r ifunc-4.rd}} + "ifunc-4.so"} + {"IFUNC test 5" "-T ifunc-static.ld" "" "" {ifunc-5.s} + {{objdump -d ifunc-5.dd} + {objdump {-s -j.data -j.got} ifunc-5.gd} + {readelf -dr ifunc-5.rd}} + "ifunc-5"} + {"IFUNC test 6" "-T ifunc-static.ld" "" "" {ifunc-6.s} + {{objdump -d ifunc-6.dd} + {objdump {-s -j.data -j.got} ifunc-6.gd} + {readelf -dr ifunc-6.rd}} + "ifunc-6"} + {"IFUNC test 7" "-T ifunc-dynamic.ld tmpdir/ifunc-3.so -shared" "" + "" {ifunc-7.s} + {{objdump -d ifunc-7.dd} + {objdump {-s -j.data -j.got} ifunc-7.gd} + {readelf -r ifunc-7.rd}} + "ifunc-7.so"} + {"IFUNC test 8" "-T ifunc-dynamic.ld tmpdir/ifunc-4.so -shared" "" + "" {ifunc-8.s} + {{objdump -d ifunc-8.dd} + {objdump {-s -j.data -j.got} ifunc-8.gd} + {readelf -r ifunc-8.rd}} + "ifunc-8.so"} + {"IFUNC test 9" "-T ifunc-dynamic.ld tmpdir/ifunc-3.so" "" "" {ifunc-9.s} + {{objdump -d ifunc-9.dd} + {objdump {-s -j.data -j.got} ifunc-9.gd} + {readelf -r ifunc-9.rd}} + "ifunc-9"} + {"IFUNC test 10" "-T ifunc-dynamic.ld tmpdir/ifunc-4.so" "" "" {ifunc-10.s} + {{objdump -d ifunc-10.dd} + {objdump {-s -j.data -j.got} ifunc-10.gd} + {readelf -r ifunc-10.rd}} + "ifunc-10"} + {"IFUNC test 11" "-T ifunc-static.ld" "" "" {ifunc-11.s} + {{objdump -d ifunc-11.dd} + {objdump {-s -j.data -j.got} ifunc-11.gd} + {readelf -dr ifunc-11.rd}} + "ifunc-11"} + {"IFUNC test 12" "-T ifunc-dynamic.ld -shared" "" "" {ifunc-12.s} + {{objdump -d ifunc-12.dd} + {objdump {-s -j.data -j.got} ifunc-12.gd} + {readelf -r ifunc-12.rd}} + "ifunc-12.so"} + {"IFUNC test 13" "-T ifunc-dynamic.ld tmpdir/ifunc-12.so" "" "" {ifunc-13.s} + {{objdump -d ifunc-13.dd} + {objdump {-s -j.data -j.got} ifunc-13.gd} + {readelf -r ifunc-13.rd}} + "ifunc-13"} + {"IFUNC test 14" "-T ifunc-dynamic.ld tmpdir/ifunc-12.so" "" "" {ifunc-14.s} + {{objdump -d ifunc-14.dd} + {objdump {-s -j.data -j.got} ifunc-14.gd} + {readelf -r ifunc-14.rd}} + "ifunc-14"} + {"IFUNC test 15" "-T ifunc-dynamic.ld tmpdir/ifunc-12.so" "" "" {ifunc-15.s} + {{objdump -d ifunc-15.dd} + {objdump {-s -j.data -j.got} ifunc-15.gd} + {readelf -r ifunc-15.rd}} + "ifunc-15"} + {"IFUNC test 16" "-T ifunc-dynamic.ld tmpdir/ifunc-12.so" "" "" {ifunc-16.s} + {{objdump -d ifunc-16.dd} + {objdump {-s -j.data -j.got} ifunc-16.gd} + {readelf -r ifunc-16.rd}} + "ifunc-16"} + {"IFUNC test 17" "-T ifunc-static.ld" "" "" {ifunc-17.s} + {{objdump -d ifunc-17.dd} + {objdump {-s -j.data -j.got} ifunc-17.gd} + {readelf -r ifunc-17.rd}} + "ifunc-17"} +} + +run_ld_link_tests $armelftests_common +if { ![istarget "arm*-*-nacl*"] } { + run_ld_link_tests $armelftests_nonacl +} + +run_dump_test "group-relocs-alu-bad" +run_dump_test "group-relocs-alu-bad-2" +run_dump_test "group-relocs-ldr-bad" +run_dump_test "group-relocs-ldr-bad-2" +run_dump_test "group-relocs-ldrs-bad" +run_dump_test "group-relocs-ldrs-bad-2" +run_dump_test "group-relocs-ldc-bad" +run_dump_test "group-relocs-ldc-bad-2" +run_dump_test "thumb2-bl-undefweak" +run_dump_test "thumb2-bl-undefweak1" +run_dump_test "emit-relocs1" +run_dump_test "movw-shared-1" +run_dump_test "movw-shared-2" +run_dump_test "movw-shared-3" +run_dump_test "movw-shared-4" + +# Exclude non-ARM-EABI targets. + +if { ![istarget "arm*-*-*eabi*"] && ![istarget "arm*-*-nacl*"] } { + # Special variants of these tests, as a different farcall stub is + # generated for a non-ARM-EABI target: indeed in such a case, + # there are no attributes to indicate that blx can be used. + + set arm_noeabi_tests { + {"Thumb-2-as-Thumb-1 BL" "-Ttext 0x1000 --section-start .foo=0x100100c" "" "" {thumb2-bl-as-thumb1-bad.s} + {{objdump -d thumb2-bl-as-thumb1-bad-noeabi.d}} + "thumb2-bl-as-thumb1-bad"} + {"Thumb-2 BL bad" "-Ttext 0x1000 --section-start .foo=0x100100c" "" "" {thumb2-bl-bad.s} + {{objdump -d thumb2-bl-bad-noeabi.d}} + "thumb2-bl-bad"} + } + run_ld_link_tests $arm_noeabi_tests + + return +} + +# Farcalls stubs are fully supported for ARM-EABI only. +# This list is massaged below into run_ld_link_tests standard format. +# The source list is almost that same format. The one difference is +# that each "action" (elements of element 5) might have four elements +# instead of three; in that case, the fourth element is the name of +# the dump file to use for arm*-*nacl* targets instead of the canonical +# dump file (the third element). +set armeabitests_common { + {"EABI attribute merging" "-r" "" "" {attr-merge.s attr-merge.s} + {{readelf -A attr-merge.attr}} + "attr-merge"} + {"EABI attribute merging 2" "-r" "" "" {attr-merge-2a.s attr-merge-2b.s} + {{readelf -A attr-merge-2.attr}} + "attr-merge-2"} + {"EABI attribute merging 3" "-r" "" "" {attr-merge-3a.s attr-merge-3b.s} + {{readelf -A attr-merge-3.attr}} + "attr-merge-3"} + {"EABI attribute merging 4" "-r" "" "" {attr-merge-4a.s attr-merge-4b.s} + {{readelf -A attr-merge-4.attr}} + "attr-merge-4"} + {"EABI attribute merging 5" "-r" "" "" {attr-merge-5.s attr-merge-5.s} + {{readelf -A attr-merge-5.attr}} + "attr-merge-5"} + {"EABI attribute merging 6" "-r" "" "" {attr-merge-6a.s attr-merge-6b.s} + {{readelf -A attr-merge-6.attr}} + "attr-merge-6"} + {"EABI attribute merging 6 reversed" "-r" "" "" {attr-merge-6b.s attr-merge-6a.s} + {{readelf -A attr-merge-6.attr}} + "attr-merge-6r"} + {"EABI attribute merging 7" "-r" "" "" {attr-merge-7a.s attr-merge-7b.s} + {{readelf -A attr-merge-7.attr}} + "attr-merge-7"} + {"EABI attribute arch merging 1" "-r" "" "" {arch-v6k.s arch-v6t2.s} + {{readelf -A attr-merge-arch-1.attr}} + "attr-merge-arch-1"} + {"EABI attribute arch merging 1 reversed" "-r" "" "" {arch-v6t2.s arch-v6k.s} + {{readelf -A attr-merge-arch-1.attr}} + "attr-merge-arch-1r"} + {"EABI attribute arch merging 2" "-r" "" "" {arch-v6k.s arch-v6.s} + {{readelf -A attr-merge-arch-2.attr}} + "attr-merge-arch-2"} + {"EABI attribute arch merging 2 reversed" "-r" "" "" {arch-v6.s arch-v6k.s} + {{readelf -A attr-merge-arch-2.attr}} + "attr-merge-arch-2r"} + {"MOVW/MOVT and merged sections" "-T arm.ld" "" "" {movw-merge.s} + {{objdump -dw movw-merge.d}} + "movw-merge"} + {"MOVW/MOVT against shared libraries" "tmpdir/arm-lib.so" "" "" {arm-app-movw.s} + {{objdump -Rw arm-app.r}} + "arm-app-movw"} + + {"ARM-ARM farcall" "-Ttext 0x1000 --section-start .foo=0x2001020" "" "" {farcall-arm-arm.s} + {{objdump -d farcall-arm-arm.d farcall-arm-nacl.d}} + "farcall-arm-arm"} + {"ARM-ARM farcall (PIC veneer)" "-Ttext 0x1000 --section-start .foo=0x2001020 --pic-veneer" "" "" {farcall-arm-arm.s} + {{objdump -d farcall-arm-arm-pic-veneer.d farcall-arm-nacl-pic.d}} + "farcall-arm-arm-pic-veneer"} + {"ARM-ARM farcall (BE8)" "-Ttext 0x1000 --section-start .foo=0x2001020 -EB --be8" "" "-EB" {farcall-arm-arm.s} + {{objdump -d farcall-arm-arm.d farcall-arm-nacl.d}} + "farcall-arm-arm-be8"} + {"ARM-ARM farcall (BE)" "-Ttext 0x1000 --section-start .foo=0x2001020 -EB" "" "-EB" {farcall-arm-arm.s} + {{objdump -d farcall-arm-arm.d farcall-arm-nacl.d}} + "farcall-arm-arm-be"} + + {"Long branch with mixed text and data" "-T arm.ld" "" "" {farcall-data.s} + {{objdump -dr farcall-data.d farcall-data-nacl.d}} + "farcall-data"} +} + +set armeabitests_nonacl { + {"ARM-Thumb farcall" "-Ttext 0x1000 --section-start .foo=0x2001014" "" "" {farcall-arm-thumb.s} + {{objdump -d farcall-arm-thumb.d}} + "farcall-arm-thumb"} + {"ARM-Thumb farcall with BLX" "--no-fix-arm1176 -Ttext 0x1000 --section-start .foo=0x2001014" "" "-march=armv5t" {farcall-arm-thumb.s} + {{objdump -d farcall-arm-thumb-blx.d}} + "farcall-arm-thumb-blx"} + {"ARM-Thumb farcall (PIC veneer)" "-Ttext 0x1000 --section-start .foo=0x2001014 --pic-veneer" "" "" {farcall-arm-thumb.s} + {{objdump -d farcall-arm-thumb-pic-veneer.d}} + "farcall-arm-thumb-pic-veneer"} + {"ARM-Thumb farcall with BLX (PIC veneer)" "-Ttext 0x1000 --section-start .foo=0x2001014 --pic-veneer" "" "-march=armv5t" {farcall-arm-thumb.s} + {{objdump -d farcall-arm-thumb-blx-pic-veneer.d}} + "farcall-arm-thumb-blx-pic-veneer"} + + {"Thumb-Thumb farcall with BLX" "--no-fix-arm1176 -Ttext 0x1000 --section-start .foo=0x2001014" "" "-march=armv5t" {farcall-thumb-thumb.s} + {{objdump -d farcall-thumb-thumb-blx.d}} + "farcall-thumb-thumb-blx"} + {"Thumb-Thumb farcall M profile" "-Ttext 0x1000 --section-start .foo=0x2001014" "" "-march=armv7-m" {farcall-thumb-thumb.s} + {{objdump -d farcall-thumb-thumb-m.d}} + "farcall-thumb-thumb-m"} + {"Thumb-Thumb farcall v6-M" "-Ttext 0x1000 --section-start .foo=0x2001014" "" "-march=armv6-m" {farcall-thumb-thumb.s} + {{objdump -d farcall-thumb-thumb-m.d}} + "farcall-thumb-thumb-v6-m"} + {"Thumb-Thumb farcall" "-Ttext 0x1000 --section-start .foo=0x2001014" "" "-march=armv4t" {farcall-thumb-thumb.s} + {{objdump -d farcall-thumb-thumb.d}} + "farcall-thumb-thumb"} + {"Thumb-Thumb farcall with BLX (PIC veneer)" "--no-fix-arm1176 -Ttext 0x1000 --section-start .foo=0x2001014 --pic-veneer" "" "-march=armv5t" {farcall-thumb-thumb.s} + {{objdump -d farcall-thumb-thumb-blx-pic-veneer.d}} + "farcall-thumb-thumb-blx-pic-veneer"} + {"Thumb-Thumb farcall M profile (PIC veneer)" "-Ttext 0x1000 --section-start .foo=0x2001014 --pic-veneer" "" "-march=armv7-m" {farcall-thumb-thumb.s} + {{objdump -d farcall-thumb-thumb-m-pic-veneer.d}} + "farcall-thumb-thumb-m-pic-veneer"} + {"Thumb-Thumb farcall (PIC veneer)" "-Ttext 0x1000 --section-start .foo=0x2001014 --pic-veneer" "" "-march=armv4t" {farcall-thumb-thumb.s} + {{objdump -d farcall-thumb-thumb-pic-veneer.d}} + "farcall-thumb-thumb-pic-veneer"} + + {"Thumb-ARM farcall" "-Ttext 0x1c01010 --section-start .foo=0x2001014" "" "-W" {farcall-thumb-arm.s} + {{objdump -d farcall-thumb-arm.d}} + "farcall-thumb-arm"} + {"Thumb-ARM farcall (BE8)" "-Ttext 0x1c01010 --section-start .foo=0x2001014 -EB --be8" "" "-W -EB" {farcall-thumb-arm.s} + {{objdump -d farcall-thumb-arm.d}} + "farcall-thumb-arm-be8"} + {"Thumb-ARM farcall (BE)" "-Ttext 0x1c01010 --section-start .foo=0x2001014 -EB" "" "-W -EB" {farcall-thumb-arm.s} + {{objdump -d farcall-thumb-arm.d}} + "farcall-thumb-arm-be"} + {"Thumb-ARM (short) call" "-Ttext 0x1000 --section-start .foo=0x0002014" "" "-W" {farcall-thumb-arm-short.s} + {{objdump -d farcall-thumb-arm-short.d}} + "farcall-thumb-arm-short"} + {"Thumb-ARM farcall with BLX" "--no-fix-arm1176 -Ttext 0x1c01010 --section-start .foo=0x2001014" "" "-W -march=armv5t" {farcall-thumb-arm.s} + {{objdump -d farcall-thumb-arm-blx.d}} + "farcall-thumb-arm-blx"} + {"Thumb-ARM farcall with BLX (PIC veneer)" "--no-fix-arm1176 -Ttext 0x1c01010 --section-start .foo=0x2001014 --pic-veneer" "" "-W -march=armv5t" {farcall-thumb-arm.s} + {{objdump -d farcall-thumb-arm-blx-pic-veneer.d}} + "farcall-thumb-arm-blx-pic-veneer"} + {"Thumb-ARM farcall (PIC veneer)" "-Ttext 0x1c01010 --section-start .foo=0x2001014 --pic-veneer" "" "-W" {farcall-thumb-arm.s} + {{objdump -d farcall-thumb-arm-pic-veneer.d}} + "farcall-thumb-arm-pic-veneer"} + + {"Multiple farcalls" "-Ttext 0x1000 --section-start .foo=0x2002020" "" "" {farcall-mix.s} + {{objdump -d farcall-mix.d}} + "farcall-mix"} + {"Multiple farcalls from several sections" "-Ttext 0x1000 --section-start .mytext=0x2000 --section-start .foo=0x2003020" "" "" {farcall-mix2.s} + {{objdump -d farcall-mix2.d}} + "farcall-mix2"} + + {"Mixed ARM/Thumb dynamic application with farcalls" "tmpdir/mixed-lib.so -T arm-dyn.ld --section-start .far_arm=0x2100000 --section-start .far_thumb=0x2200000" "" "" + {farcall-mixed-app.s} + {{objdump -fdw farcall-mixed-app.d} {objdump -Rw farcall-mixed-app.r} + {readelf -Ds farcall-mixed-app.sym}} + "farcall-mixed-app"} + {"Mixed ARM/Thumb arch5 dynamic application with farcalls" "tmpdir/mixed-lib.so -T arm-dyn.ld --use-blx --section-start .far_arm=0x2100000 --section-start .far_thumb=0x2200000" "" "" + {farcall-mixed-app.s} + {{objdump -fdw farcall-mixed-app-v5.d} {objdump -Rw farcall-mixed-app.r} + {readelf -Ds farcall-mixed-app.sym}} + "farcall-mixed-app-v5"} + + {"Mixed ARM/Thumb shared library with long branches (v4t)" "-shared -T arm-lib.ld" "" "-march=armv4t" + {farcall-mixed-lib1.s farcall-mixed-lib2.s} + {{objdump -fdw farcall-mixed-lib-v4t.d}} + "farcall-mixed-lib.so"} + + {"Mixed ARM/Thumb shared library with long branches (v5t)" "--no-fix-arm1176 -shared -T arm-lib.ld" "" "-march=armv5t" + {farcall-mixed-lib1.s farcall-mixed-lib2.s} + {{objdump -fdw farcall-mixed-lib.d}} + "farcall-mixed-lib.so"} + + {"Thumb-2-as-Thumb-1 BL" "--no-fix-arm1176 -Ttext 0x1000 --section-start .foo=0x100100c" "" "" {thumb2-bl-as-thumb1-bad.s} + {{objdump -d thumb2-bl-as-thumb1-bad.d}} + "thumb2-bl-as-thumb1-bad"} + {"Thumb-2 BL" "-Ttext 0x1000 --section-start .foo=0x100100c" "" "" {thumb2-bl-bad.s} + {{objdump -d thumb2-bl-bad.d}} + "thumb2-bl-bad"} + {"Branch to linker script symbol with BL for thumb-only target" "-T branch-lks-sym.ld" "" "" {thumb-bl-lks-sym.s} + {{objdump -d thumb-bl-lks-sym.d}} + "thumb-bl-lks-sym"} + {"Branch to linker script symbol with B for thumb-only target" "-T branch-lks-sym.ld" "" "" {thumb-b-lks-sym.s} + {{objdump -d thumb-b-lks-sym.d}} + "thumb-b-lks-sym"} + + {"erratum 760522 fix (default for v6z)" "--section-start=.foo=0x2001014" "" + "-march=armv6z" {fix-arm1176.s} + {{objdump -d fix-arm1176-on.d}} + "fix-arm1176-1"} + {"erratum 760522 fix (explicitly on at v6z)" "--section-start=.foo=0x2001014 --fix-arm1176" "" + "-march=armv6z" {fix-arm1176.s} + {{objdump -d fix-arm1176-on.d}} + "fix-arm1176-2"} + {"erratum 760522 fix (explicitly off at v6z)" "--section-start=.foo=0x2001014 --no-fix-arm1176" "" + "-march=armv6z" {fix-arm1176.s} + {{objdump -d fix-arm1176-off.d}} + "fix-arm1176-3"} + {"erratum 760522 fix (default for v5)" "--section-start=.foo=0x2001014 " "" + "-march=armv5te" {fix-arm1176.s} + {{objdump -d fix-arm1176-on.d}} + "fix-arm1176-4"} + {"erratum 760522 fix (default for v7-a)" "--section-start=.foo=0x2001014 " "" + "-march=armv7-a" {fix-arm1176.s} + {{objdump -d fix-arm1176-off.d}} + "fix-arm1176-5"} + {"erratum 760522 fix (default for ARM1156)" "--section-start=.foo=0x2001014 " "" + "-mcpu=arm1156t2f-s" {fix-arm1176.s} + {{objdump -d fix-arm1176-off.d}} + "fix-arm1176-6"} + + {"Thumb-2 BL" "-Ttext 0x1000 --section-start .foo=0x1001000" "" "" {thumb2-bl.s} + {{objdump -dr thumb2-bl.d}} + "thumb2-bl"} + {"Thumb-2 Interworked branch" "-T arm.ld" "" "" {thumb2-b-interwork.s} + {{objdump -dr thumb2-b-interwork.d}} + "thumb2-b-interwork"} + {"BL/BLX interworking" "-T arm.ld" "" "" {thumb2-bl-blx-interwork.s} + {{objdump -dr thumb2-bl-blx-interwork.d}} + "thumb2-bl-blx-interwork"} + {"ARMv4 interworking" "-static -T arm.ld --fix-v4bx-interworking" "" "--fix-v4bx -meabi=4" {armv4-bx.s} + {{objdump -d armv4-bx.d}} + "armv4-bx"} + + {"R_ARM_THM_JUMP24 Relocation veneers: Short 1" + "--no-fix-arm1176 --section-start destsect=0x00009000 --section-start .text=0x8000" "" + "-march=armv7-a -mthumb" + {jump-reloc-veneers.s} + {{objdump -d jump-reloc-veneers-short1.d}} + "jump-reloc-veneers-short1"} + {"R_ARM_THM_JUMP24 Relocation veneers: Short 2" + "--no-fix-arm1176 --section-start destsect=0x00900000 --section-start .text=0x8000" "" + "-march=armv7-a -mthumb" + {jump-reloc-veneers.s} + {{objdump -d jump-reloc-veneers-short2.d}} + "jump-reloc-veneers-short2"} + {"R_ARM_THM_JUMP24 Relocation veneers: Long" + "--no-fix-arm1176 --section-start destsect=0x09000000 --section-start .text=0x8000" "" + "-march=armv7-a -mthumb" + {jump-reloc-veneers.s} + {{objdump -d jump-reloc-veneers-long.d}} + "jump-reloc-veneers-long"} + + {"Default group size" "-Ttext 0x1000 --section-start .foo=0x2003020" "" "" {farcall-group.s farcall-group2.s} + {{objdump -d farcall-group.d}} + "farcall-group-default"} + {"Group size=2" "-Ttext 0x1000 --section-start .foo=0x2003020 --stub-group-size=2" "" "" {farcall-group.s farcall-group2.s} + {{objdump -d farcall-group-size2.d}} + "farcall-group-size2"} + {"Group size limit" "-Ttext 0x1000 --section-start .far=0x2003020" "" "" {farcall-group3.s farcall-group4.s} + {{objdump -d farcall-group-limit.d}} + "farcall-group-limit"} + + {"TLS gnu shared library" "--no-fix-arm1176 -shared -T arm-dyn.ld" "" "" {tls-gdesc.s} + {{objdump -fdw tls-gdesc.d} {objdump -Rw tls-gdesc.r}} + "tls-lib2.so"} + {"TLS gnu shared library non-lazy" "-z now -shared -T arm-dyn.ld" "" "" {tls-gdesc.s} + {{readelf "-x .got" tls-gdesc-nlazy.g}} + "tls-lib2-nlazy.so"} + {"TLS long plt library" "-shared -T arm-dyn.ld --section-start .foo=0x4001000" "" "" {tls-longplt-lib.s} + {{objdump -fdw tls-longplt-lib.d}} + "tls-longplt-lib.so"} + {"TLS long plt" "-T arm-dyn.ld --section-start .foo=0x4001000 tmpdir/tls-longplt-lib.so" "" "" {tls-longplt.s} + {{objdump -fdw tls-longplt.d}} + "tls-longplt"} + {"TLS thumb1" "-shared -T arm-dyn.ld --section-start .foo=0x4001000" "" "" {tls-thumb1.s} + {{objdump -fdw tls-thumb1.d}} + "tls-thumb1"} +} + +# Massage the $armeabitests_common list into run_ld_link_tests standard form. +# See the comment before 'set armeabitests_common', above. +set elide_action_elt 3 +set is_nacl [istarget "arm*-*-nacl*"] +if {$is_nacl} { + set elide_action_elt 2 +} +set neabi_common [llength $armeabitests_common] +for {set i 0} {$i < $neabi_common} {incr i} { + set case [lindex $armeabitests_common $i] + set actions [lindex $case 5] + set nactions [llength $actions] + for {set j 0} {$j < $nactions} {incr j} { + set action [lindex $actions $j] + if {[llength $action] == 4} { + set action [lreplace $action $elide_action_elt $elide_action_elt] + lset armeabitests_common $i 5 $j $action + } + } +} + +run_ld_link_tests $armeabitests_common +if { !$is_nacl } { + run_ld_link_tests $armeabitests_nonacl +} + +run_dump_test "attr-merge-div-00" +run_dump_test "attr-merge-div-01" +run_dump_test "attr-merge-div-10" +run_dump_test "attr-merge-div-01-m3" +run_dump_test "attr-merge-div-10-m3" +run_dump_test "attr-merge-div-11" +run_dump_test "attr-merge-div-12" +run_dump_test "attr-merge-div-120" +run_dump_test "attr-merge-div-21" +run_dump_test "attr-merge-div-22" +run_dump_test "attr-merge-div-02" +run_dump_test "attr-merge-div-20" +run_dump_test "attr-merge-wchar-00" +run_dump_test "attr-merge-wchar-02" +run_dump_test "attr-merge-wchar-04" +run_dump_test "attr-merge-wchar-20" +run_dump_test "attr-merge-wchar-22" +run_dump_test "attr-merge-wchar-24" +run_dump_test "attr-merge-wchar-40" +run_dump_test "attr-merge-wchar-42" +run_dump_test "attr-merge-wchar-44" +run_dump_test "attr-merge-wchar-00-nowarn" +run_dump_test "attr-merge-wchar-02-nowarn" +run_dump_test "attr-merge-wchar-04-nowarn" +run_dump_test "attr-merge-wchar-20-nowarn" +run_dump_test "attr-merge-wchar-22-nowarn" +run_dump_test "attr-merge-wchar-24-nowarn" +run_dump_test "attr-merge-wchar-40-nowarn" +run_dump_test "attr-merge-wchar-42-nowarn" +run_dump_test "attr-merge-wchar-44-nowarn" +run_dump_test "farcall-section" +run_dump_test "attr-merge-unknown-1" +run_dump_test "attr-merge-unknown-2" +run_dump_test "attr-merge-unknown-2r" +run_dump_test "attr-merge-unknown-3" +run_dump_test "unwind-1" +run_dump_test "unwind-2" +run_dump_test "unwind-3" +run_dump_test "unwind-4" +run_dump_test "unwind-5" +run_dump_test "attr-merge-vfp-1" +run_dump_test "attr-merge-vfp-1r" +run_dump_test "attr-merge-vfp-2" +run_dump_test "attr-merge-vfp-2r" +run_dump_test "attr-merge-vfp-3" +run_dump_test "attr-merge-vfp-3r" +run_dump_test "attr-merge-vfp-4" +run_dump_test "attr-merge-vfp-4r" +run_dump_test "attr-merge-vfp-5" +run_dump_test "attr-merge-vfp-5r" +run_dump_test "attr-merge-vfp-6" +run_dump_test "attr-merge-vfp-6r" +run_dump_test "attr-merge-vfp-7" +run_dump_test "attr-merge-vfp-7r" +run_dump_test "attr-merge-incompatible" +run_dump_test "unresolved-1" +if { ![istarget "arm*-*-nacl*"] } { + run_dump_test "unresolved-1-dyn" +} +run_dump_test "unresolved-2" +run_dump_test "gc-hidden-1" diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-export-class.rd b/binutils-2.24/ld/testsuite/ld-arm/arm-export-class.rd new file mode 100644 index 0000000..78d5d1e --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-export-class.rd @@ -0,0 +1,11 @@ +Relocation section '\.rel\.dyn' at offset 0x[0-9a-f]+ contains [0-9]+ entries: + * Offset * Info * Type * Sym\. *Value * Sym\. * Name +12340010 00000017 R_ARM_RELATIVE * +12340020 00000017 R_ARM_RELATIVE * +12340060 00000017 R_ARM_RELATIVE * +12340070 00000017 R_ARM_RELATIVE * +12340080 00000017 R_ARM_RELATIVE * +12340090 00000017 R_ARM_RELATIVE * +12340000 [0-9a-f]+02 R_ARM_ABS32 123400a0 protected_baz +12340040 [0-9a-f]+02 R_ARM_ABS32 123400a0 protected_foo +12340050 [0-9a-f]+02 R_ARM_ABS32 123400a0 protected_bar diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-export-class.xd b/binutils-2.24/ld/testsuite/ld-arm/arm-export-class.xd new file mode 100644 index 0000000..a797f20 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-export-class.xd @@ -0,0 +1,11 @@ +Hex dump of section '\.data': + 0x12340000 00000000 00000000 00000000 00000000 .* + 0x12340010 a0003412 00000000 00000000 00000000 .* + 0x12340020 a0003412 00000000 00000000 00000000 .* + 0x12340030 00000000 00000000 00000000 00000000 .* + 0x12340040 00000000 00000000 00000000 00000000 .* + 0x12340050 00000000 00000000 00000000 00000000 .* + 0x12340060 a0003412 00000000 00000000 00000000 .* + 0x12340070 a0003412 00000000 00000000 00000000 .* + 0x12340080 a0003412 00000000 00000000 00000000 .* + 0x12340090 a0003412 00000000 00000000 00000000 .* diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-lib-plt-2.dd b/binutils-2.24/ld/testsuite/ld-arm/arm-lib-plt-2.dd new file mode 100644 index 0000000..fd61b73 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-lib-plt-2.dd @@ -0,0 +1,4 @@ + +.*: file format .* + +# There shouldn't be any code at all. diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-lib-plt-2.rd b/binutils-2.24/ld/testsuite/ld-arm/arm-lib-plt-2.rd new file mode 100644 index 0000000..3860bdd --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-lib-plt-2.rd @@ -0,0 +1,6 @@ + +Relocation section '.rel.dyn' .*: + Offset .* +.* R_ARM_ABS32 00000000 foo + +# There shouldn't be any .rel.plt relocations. diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-lib-plt-2a.s b/binutils-2.24/ld/testsuite/ld-arm/arm-lib-plt-2a.s new file mode 100644 index 0000000..6c8edac --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-lib-plt-2a.s @@ -0,0 +1,5 @@ + .globl foo + .type foo,%function +foo: + mov pc,lr + .size foo,.-foo diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-lib-plt-2b.s b/binutils-2.24/ld/testsuite/ld-arm/arm-lib-plt-2b.s new file mode 100644 index 0000000..fa5b135 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-lib-plt-2b.s @@ -0,0 +1,2 @@ + .data + .word foo diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-lib-plt32.d b/binutils-2.24/ld/testsuite/ld-arm/arm-lib-plt32.d new file mode 100644 index 0000000..279ea5a --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-lib-plt32.d @@ -0,0 +1,28 @@ + +tmpdir/arm-lib-plt32.so: file format elf32-(little|big)arm +architecture: armv4t, flags 0x00000150: +HAS_SYMS, DYNAMIC, D_PAGED +start address 0x.* + +Disassembly of section .plt: + +.* <.plt>: + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) + .*: e59fe004 ldr lr, \[pc, #4\] ; .* <lib_func1-0x10> + .*: e08fe00e add lr, pc, lr + .*: e5bef008 ldr pc, \[lr, #8\]! + .*: .* + .*: e28fc6.* add ip, pc, #.* + .*: e28cca.* add ip, ip, #.* ; 0x.* + .*: e5bcf.* ldr pc, \[ip, #.*\]!.* +Disassembly of section .text: + +.* <lib_func1>: + .*: e1a0c00d mov ip, sp + .*: e92dd800 push {fp, ip, lr, pc} + .*: ebfffff9 bl .* <lib_func1-0xc> + .*: e89d6800 ldm sp, {fp, sp, lr} + .*: e12fff1e bx lr + +.* <lib_func2>: + .*: e12fff1e bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-lib-plt32.r b/binutils-2.24/ld/testsuite/ld-arm/arm-lib-plt32.r new file mode 100644 index 0000000..3515539 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-lib-plt32.r @@ -0,0 +1,8 @@ + +tmpdir/arm-lib-plt32.so: file format elf32-(little|big)arm + +DYNAMIC RELOCATION RECORDS +OFFSET TYPE VALUE +.* R_ARM_JUMP_SLOT app_func2 + + diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-lib-plt32.s b/binutils-2.24/ld/testsuite/ld-arm/arm-lib-plt32.s new file mode 100644 index 0000000..d6c4787 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-lib-plt32.s @@ -0,0 +1,17 @@ + .text + + .globl lib_func1 + .type lib_func1, %function +lib_func1: + mov ip, sp + stmdb sp!, {r11, ip, lr, pc} + bl app_func2(PLT) + ldmia sp, {r11, sp, lr} + bx lr + .size lib_func1, . - lib_func1 + + .globl lib_func2 + .type lib_func2, %function +lib_func2: + bx lr + .size lib_func2, . - lib_func2 diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-lib.d b/binutils-2.24/ld/testsuite/ld-arm/arm-lib.d new file mode 100644 index 0000000..22e21d5 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-lib.d @@ -0,0 +1,28 @@ + +tmpdir/arm-lib.so: file format elf32-(little|big)arm.* +architecture: armv4t, flags 0x00000150: +HAS_SYMS, DYNAMIC, D_PAGED +start address 0x.* + +Disassembly of section .plt: + +.* <.plt>: + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) + .*: e59fe004 ldr lr, \[pc, #4\] ; .* <lib_func1-0x10> + .*: e08fe00e add lr, pc, lr + .*: e5bef008 ldr pc, \[lr, #8\]! + .*: .* + .*: e28fc6.* add ip, pc, #.* + .*: e28cca.* add ip, ip, #.* ; 0x.* + .*: e5bcf.* ldr pc, \[ip, #.*\]!.* +Disassembly of section .text: + +.* <lib_func1>: + .*: e1a0c00d mov ip, sp + .*: e92dd800 push {fp, ip, lr, pc} + .*: ebfffff9 bl .* <lib_func1-0xc> + .*: e89d6800 ldm sp, {fp, sp, lr} + .*: e12fff1e bx lr + +.* <lib_func2>: + .*: e12fff1e bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-lib.ld b/binutils-2.24/ld/testsuite/ld-arm/arm-lib.ld new file mode 100644 index 0000000..c9482c3 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-lib.ld @@ -0,0 +1,187 @@ +/* Script for --shared -z combreloc: shared library, combine & sort relocs */ +OUTPUT_ARCH(arm) +ENTRY(_start) +/* Do we need any of these for elf? + __DYNAMIC = 0; */ +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + . = 0 + SIZEOF_HEADERS; + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .gnu.version : { *(.gnu.version) } + .gnu.version_d : { *(.gnu.version_d) } + .gnu.version_r : { *(.gnu.version_r) } + .rel.dyn : + { + *(.rel.init) + *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) + *(.rel.fini) + *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) + *(.rel.data.rel.ro*) + *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) + *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) + *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) + *(.rel.ctors) + *(.rel.dtors) + *(.rel.got) + *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) + } + .rela.dyn : + { + *(.rela.init) + *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) + *(.rela.fini) + *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) + *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) + *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) + *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) + *(.rela.ctors) + *(.rela.dtors) + *(.rela.got) + *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) + } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : + { + KEEP (*(.init)) + } =0 + .plt : { *(.plt) } + .text : + { + *(.text .stub .text.* .gnu.linkonce.t.*) + KEEP (*(.text.*personality*)) + /* .gnu.warning sections are handled specially by elf32.em. */ + *(.gnu.warning) + *(.glue_7t) *(.glue_7) + } =0 + .fini : + { + KEEP (*(.fini)) + } =0 + PROVIDE (__etext = .); + PROVIDE (_etext = .); + PROVIDE (etext = .); + .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } + .rodata1 : { *(.rodata1) } + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } + PROVIDE_HIDDEN (__exidx_start = .); + .ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) } + PROVIDE_HIDDEN (__exidx_end = .); + .eh_frame_hdr : { *(.eh_frame_hdr) } + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } + .gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } + /* Adjust the address for the data segment. We want to adjust up to + the same address within the page on the next page up. */ + . = ALIGN (0x8000) - ((0x8000 - .) & (0x8000 - 1)); . = DATA_SEGMENT_ALIGN (0x8000, 0x1000); + /* Exception handling */ + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } + .gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } + /* Thread Local Storage sections */ + .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } + .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } + /* Ensure the __preinit_array_start label is properly aligned. We + could instead move the label definition inside the section, but + the linker would then create the section even if it turns out to + be empty, which isn't pretty. */ + . = ALIGN(32 / 8); + .preinit_array : { KEEP (*(.preinit_array)) } + .init_array : { KEEP (*(.init_array)) } + .fini_array : { KEEP (*(.fini_array)) } + .ctors : + { + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. The wildcard also means that it + doesn't matter which directory crtbegin.o + is in. */ + KEEP (*crtbegin*.o(.ctors)) + /* We don't want to include the .ctor section from + from the crtend.o file until after the sorted ctors. + The .ctor section from the crtend file contains the + end of ctors marker and it must be last */ + KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + } + .dtors : + { + KEEP (*crtbegin*.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + } + .jcr : { KEEP (*(.jcr)) } + .data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } + .dynamic : { *(.dynamic) } + .got : { *(.got.plt) *(.got) } + .data : + { + __data_start = . ; + *(.data .data.* .gnu.linkonce.d.*) + KEEP (*(.gnu.linkonce.d.*personality*)) + SORT(CONSTRUCTORS) + } + .data1 : { *(.data1) } + _edata = .; + PROVIDE (edata = .); + __bss_start = .; + __bss_start__ = .; + .bss : + { + *(.dynbss) + *(.bss .bss.* .gnu.linkonce.b.*) + *(COMMON) + /* Align here to ensure that the .bss section occupies space up to + _end. Align after .bss to ensure correct alignment even if the + .bss section disappears because there are no input sections. */ + . = ALIGN(32 / 8); + } + . = ALIGN(32 / 8); + _end = .; + _bss_end__ = . ; __bss_end__ = . ; __end__ = . ; + PROVIDE (end = .); + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) } + /DISCARD/ : { *(.note.GNU-stack) } +} + + diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-lib.r b/binutils-2.24/ld/testsuite/ld-arm/arm-lib.r new file mode 100644 index 0000000..48749d4 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-lib.r @@ -0,0 +1,8 @@ + +tmpdir/arm-lib.so: file format elf32-(little|big)arm.* + +DYNAMIC RELOCATION RECORDS +OFFSET TYPE VALUE +.* R_ARM_JUMP_SLOT app_func2 + + diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-lib.s b/binutils-2.24/ld/testsuite/ld-arm/arm-lib.s new file mode 100644 index 0000000..949f61c --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-lib.s @@ -0,0 +1,24 @@ + .text + + .globl lib_func1 + .type lib_func1, %function +lib_func1: + mov ip, sp + stmdb sp!, {r11, ip, lr, pc} + bl app_func2 + ldmia sp, {r11, sp, lr} + bx lr + .size lib_func1, . - lib_func1 + + .globl lib_func2 + .type lib_func2, %function +lib_func2: + bx lr + .size lib_func2, . - lib_func2 + + .data + .globl data_obj + .type data_obj, %object +data_obj: + .long 0 + .size data_obj, . - data_obj diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-movwt.d b/binutils-2.24/ld/testsuite/ld-arm/arm-movwt.d new file mode 100644 index 0000000..7d558b7 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-movwt.d @@ -0,0 +1,39 @@ + +.*: file format.* + +Disassembly of section .text: + +00008000 <[^>]*>: + 8000: e3000000 movw r0, #0 + 8004: e3411234 movt r1, #4660 ; 0x1234 + 8008: e3082000 movw r2, #32768 ; 0x8000 + 800c: e3413233 movt r3, #4659 ; 0x1233 + 8010: e3004011 movw r4, #17 + 8014: e3415234 movt r5, #4660 ; 0x1234 + 8018: e3086011 movw r6, #32785 ; 0x8011 + 801c: e3417233 movt r7, #4659 ; 0x1233 + +00008020 <[^>]*>: + 8020: f240 0700 movw r7, #0 + 8024: f2c1 2634 movt r6, #4660 ; 0x1234 + 8028: f248 0500 movw r5, #32768 ; 0x8000 + 802c: f2c1 2433 movt r4, #4659 ; 0x1233 + 8030: f240 0311 movw r3, #17 + 8034: f2c1 2234 movt r2, #4660 ; 0x1234 + 8038: f248 0111 movw r1, #32785 ; 0x8011 + 803c: f2c1 2033 movt r0, #4659 ; 0x1233 + +Disassembly of section .far: + +12340000 <[^>]*>: +12340000: e3080000 movw r0, #32768 ; 0x8000 +12340004: e34e0dcc movt r0, #60876 ; 0xedcc +12340008: e3080021 movw r0, #32801 ; 0x8021 +1234000c: e34e0dcc movt r0, #60876 ; 0xedcc + +12340010 <[^>]*>: +12340010: f248 0000 movw r0, #32768 ; 0x8000 +12340014: f6ce 50cc movt r0, #60876 ; 0xedcc +12340018: f248 0021 movw r0, #32801 ; 0x8021 +1234001c: f6ce 50cc movt r0, #60876 ; 0xedcc + diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-movwt.s b/binutils-2.24/ld/testsuite/ld-arm/arm-movwt.s new file mode 100644 index 0000000..ba8b1c5 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-movwt.s @@ -0,0 +1,44 @@ + .text + .arch armv6t2 + .syntax unified + .global _start + .type _start, %function +_start: +base1: +arm1: + movw r0, #:lower16:arm2 + movt r1, #:upper16:arm2 + movw r2, #:lower16:(arm2 - arm1) + movt r3, #:upper16:(arm2 - arm1) + movw r4, #:lower16:thumb2 + movt r5, #:upper16:thumb2 + movw r6, #:lower16:(thumb2 - arm1) + movt r7, #:upper16:(thumb2 - arm1) + .thumb + .type thumb1, %function + .thumb_func +thumb1: + movw r7, #:lower16:arm2 + movt r6, #:upper16:arm2 + movw r5, #:lower16:(arm2 - arm1) + movt r4, #:upper16:(arm2 - arm1) + movw r3, #:lower16:thumb2 + movt r2, #:upper16:thumb2 + movw r1, #:lower16:(thumb2 - arm1) + movt r0, #:upper16:(thumb2 - arm1) + + .section .far, "ax", %progbits + .arm +arm2: + movw r0, #:lower16:(arm1 - arm2) + movt r0, #:upper16:(arm1 - arm2) + movw r0, #:lower16:(thumb1 - arm2) + movt r0, #:upper16:(thumb1 - arm2) + .thumb + .type thumb2, %function + .thumb_func +thumb2: + movw r0, #:lower16:(arm1 - arm2) + movt r0, #:upper16:(arm1 - arm2) + movw r0, #:lower16:(thumb1 - arm2) + movt r0, #:upper16:(thumb1 - arm2) diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-no-rel-plt.ld b/binutils-2.24/ld/testsuite/ld-arm/arm-no-rel-plt.ld new file mode 100644 index 0000000..439909c --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-no-rel-plt.ld @@ -0,0 +1,233 @@ +/* Script for -z combreloc: combine and sort reloc sections */ +OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", + "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SEARCH_DIR("/home/meadori/Code/install/arm-none-eabi/lib"); +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + PROVIDE (__executable_start = SEGMENT_START("text-segment", 0x8000)); . = SEGMENT_START("text-segment", 0x8000); + .interp : { *(.interp) } + .note.gnu.build-id : { *(.note.gnu.build-id) } + .hash : { *(.hash) } + .gnu.hash : { *(.gnu.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .gnu.version : { *(.gnu.version) } + .gnu.version_d : { *(.gnu.version_d) } + .gnu.version_r : { *(.gnu.version_r) } + .rel.dyn : + { + *(.rel.init) + *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) + *(.rel.fini) + *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) + *(.rel.data.rel.ro .rel.data.rel.ro.* .rel.gnu.linkonce.d.rel.ro.*) + *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) + *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) + *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) + *(.rel.ctors) + *(.rel.dtors) + *(.rel.got) + *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) + PROVIDE_HIDDEN (__rel_iplt_start = .); + *(.rel.iplt) + PROVIDE_HIDDEN (__rel_iplt_end = .); + PROVIDE_HIDDEN (__rela_iplt_start = .); + PROVIDE_HIDDEN (__rela_iplt_end = .); + } + .rela.dyn : + { + *(.rela.init) + *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) + *(.rela.fini) + *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) + *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) + *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) + *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) + *(.rela.ctors) + *(.rela.dtors) + *(.rela.got) + *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) + PROVIDE_HIDDEN (__rel_iplt_start = .); + PROVIDE_HIDDEN (__rel_iplt_end = .); + PROVIDE_HIDDEN (__rela_iplt_start = .); + *(.rela.iplt) + PROVIDE_HIDDEN (__rela_iplt_end = .); + } + .init : + { + KEEP (*(.init)) + } + .plt : { *(.plt) } + .iplt : { *(.iplt) } + .text : + { + *(.text.unlikely .text.*_unlikely) + *(.text.exit .text.exit.*) + *(.text.startup .text.startup.*) + *(.text.hot .text.hot.*) + *(.text .stub .text.* .gnu.linkonce.t.*) + /* .gnu.warning sections are handled specially by elf32.em. */ + *(.gnu.warning) + *(.glue_7t) *(.glue_7) *(.vfp11_veneer) *(.v4_bx) + } + .fini : + { + KEEP (*(.fini)) + } + PROVIDE (__etext = .); + PROVIDE (_etext = .); + PROVIDE (etext = .); + .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } + .rodata1 : { *(.rodata1) } + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } + PROVIDE_HIDDEN (__exidx_start = .); + .ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) } + PROVIDE_HIDDEN (__exidx_end = .); + .eh_frame_hdr : { *(.eh_frame_hdr) } + .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } + .gcc_except_table : ONLY_IF_RO { *(.gcc_except_table + .gcc_except_table.*) } + /* These sections are generated by the Sun/Oracle C++ compiler. */ + .exception_ranges : ONLY_IF_RO { *(.exception_ranges + .exception_ranges*) } + /* Adjust the address for the data segment. We want to adjust up to + the same address within the page on the next page up. */ + . = ALIGN(CONSTANT (MAXPAGESIZE)) + (. & (CONSTANT (MAXPAGESIZE) - 1)); + /* Exception handling */ + .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } + .gcc_except_table : ONLY_IF_RW { *(.gcc_except_table .gcc_except_table.*) } + .exception_ranges : ONLY_IF_RW { *(.exception_ranges .exception_ranges*) } + /* Thread Local Storage sections */ + .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } + .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); + } + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array)) + PROVIDE_HIDDEN (__fini_array_end = .); + } + .ctors : + { + /* gcc uses crtbegin.o to find the start of + the constructors, so we make sure it is + first. Because this is a wildcard, it + doesn't matter if the user does not + actually link against crtbegin.o; the + linker won't look for a file to match a + wildcard. The wildcard also means that it + doesn't matter which directory crtbegin.o + is in. */ + KEEP (*crtbegin.o(.ctors)) + KEEP (*crtbegin?.o(.ctors)) + /* We don't want to include the .ctor section from + the crtend.o file until after the sorted ctors. + The .ctor section from the crtend file contains the + end of ctors marker and it must be last */ + KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + } + .dtors : + { + KEEP (*crtbegin.o(.dtors)) + KEEP (*crtbegin?.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + } + .jcr : { KEEP (*(.jcr)) } + .data.rel.ro : { *(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*) *(.data.rel.ro .data.rel.ro.* .gnu.linkonce.d.rel.ro.*) } + .dynamic : { *(.dynamic) } + .got : { *(.got.plt) *(.igot.plt) *(.got) *(.igot) } + .data : + { + __data_start = . ; + *(.data .data.* .gnu.linkonce.d.*) + SORT(CONSTRUCTORS) + } + .data1 : { *(.data1) } + _edata = .; PROVIDE (edata = .); + . = .; + __bss_start = .; + __bss_start__ = .; + .bss : + { + *(.dynbss) + *(.bss .bss.* .gnu.linkonce.b.*) + *(COMMON) + /* Align here to ensure that the .bss section occupies space up to + _end. Align after .bss to ensure correct alignment even if the + .bss section disappears because there are no input sections. + FIXME: Why do we need it? When there is no .bss section, we don't + pad the .data section. */ + . = ALIGN(. != 0 ? 32 / 8 : 1); + } + _bss_end__ = . ; __bss_end__ = . ; + . = ALIGN(32 / 8); + . = ALIGN(32 / 8); + __end__ = . ; + _end = .; PROVIDE (end = .); + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + /* DWARF 3 */ + .debug_pubtypes 0 : { *(.debug_pubtypes) } + .debug_ranges 0 : { *(.debug_ranges) } + /* DWARF Extension. */ + .debug_macro 0 : { *(.debug_macro) } + .stack 0x80000 : + { + _stack = .; + *(.stack) + } + .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) KEEP (*(.gnu.attributes)) } + .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) } + /DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) } +} diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-no-rel-plt.out b/binutils-2.24/ld/testsuite/ld-arm/arm-no-rel-plt.out new file mode 100644 index 0000000..948d5a5 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-no-rel-plt.out @@ -0,0 +1,2 @@ +.*: error: required section '.rel.plt' not found in the linker script +.*: final link failed: Invalid operation diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-pic-veneer.d b/binutils-2.24/ld/testsuite/ld-arm/arm-pic-veneer.d new file mode 100644 index 0000000..08e107b --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-pic-veneer.d @@ -0,0 +1,17 @@ + +.*: file format.* + +Disassembly of section .text: + +00008000 <_start>: + 8000: ea...... b 800. <.*> + +00008004 <foo>: + 8004: 46c0 nop ; \(mov r8, r8\) + 8006: 4770 bx lr + +00008008 <__foo_from_arm>: + 8008: e59fc004 ldr ip, \[pc, #4\] ; 8014 <__foo_from_arm\+0xc> + 800c: e08fc00c add ip, pc, ip + 8010: e12fff1c bx ip + 8014: fffffff1 .word 0xfffffff1 diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-pic-veneer.s b/binutils-2.24/ld/testsuite/ld-arm/arm-pic-veneer.s new file mode 100644 index 0000000..9e09ed6 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-pic-veneer.s @@ -0,0 +1,14 @@ +.text +.arm +.global _start +.type _start, %function +_start: +b foo + +.thumb +.global foo +.type foo, %function +foo: +nop +bx lr + diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-rel31.d b/binutils-2.24/ld/testsuite/ld-arm/arm-rel31.d new file mode 100644 index 0000000..ac99e92 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-rel31.d @@ -0,0 +1,7 @@ + +.*: file format.* + +Contents of section .text: + 8000 (10000000 fcffff7f 08000080 f4ffffff|00000010 7ffffffc 80000008 fffffff4) .* +# Ignore .ARM.attributes section +#... diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-rel31.s b/binutils-2.24/ld/testsuite/ld-arm/arm-rel31.s new file mode 100644 index 0000000..37eee66 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-rel31.s @@ -0,0 +1,11 @@ +# Test the R_ARM_REL31 relocation + .section .before + .global _start +_start: + .text + .rel31 0, foo + .rel31 0, _start + .rel31 1, foo + .rel31 1, _start + .section .after +foo: diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-rel32.d b/binutils-2.24/ld/testsuite/ld-arm/arm-rel32.d new file mode 100644 index 0000000..919aaa4 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-rel32.d @@ -0,0 +1,12 @@ + +.*: file format .* + +DYNAMIC RELOCATION RECORDS +OFFSET +TYPE +VALUE +[^ ]+ R_ARM_REL32 +foo +[^ ]+ R_ARM_REL32 +foo +[^ ]+ R_ARM_JUMP_SLOT +foo + + +Contents of section \.data: + [^ ]+ 00000000 00010000 .* diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-rel32.s b/binutils-2.24/ld/testsuite/ld-arm/arm-rel32.s new file mode 100644 index 0000000..885b87c --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-rel32.s @@ -0,0 +1,8 @@ + .globl foo +foo: + mov pc,lr + bal foo(PLT) + + .data + .word foo-. + .word foo-.+0x100 diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-static-app.d b/binutils-2.24/ld/testsuite/ld-arm/arm-static-app.d new file mode 100644 index 0000000..c08c27f --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-static-app.d @@ -0,0 +1,24 @@ + +tmpdir/arm-static-app: file format elf32-(little|big)arm.* +architecture: armv4t, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x.* + +Disassembly of section .text: + +.* <_start>: + +.*: e1a0c00d mov ip, sp + +.*: e92dd800 push {fp, ip, lr, pc} + +.*: eb000001 bl .* <app_func> + +.*: e89d6800 ldm sp, {fp, sp, lr} + +.*: e12fff1e bx lr + +.* <app_func>: + +.*: e1a0c00d mov ip, sp + +.*: e92dd800 push {fp, ip, lr, pc} + +.*: eb000001 bl .* <app_func2> + +.*: e89d6800 ldm sp, {fp, sp, lr} + +.*: e12fff1e bx lr + +.* <app_func2>: + +.*: e12fff1e bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-static-app.r b/binutils-2.24/ld/testsuite/ld-arm/arm-static-app.r new file mode 100644 index 0000000..92df70e --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-static-app.r @@ -0,0 +1,3 @@ + +tmpdir/arm-static-app: file format elf32-(little|big)arm.* + diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-static-app.s b/binutils-2.24/ld/testsuite/ld-arm/arm-static-app.s new file mode 100644 index 0000000..99c579f --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-static-app.s @@ -0,0 +1,20 @@ + .text + .globl _start +_start: + mov ip, sp + stmdb sp!, {r11, ip, lr, pc} + bl app_func + ldmia sp, {r11, sp, lr} + bx lr + + .globl app_func +app_func: + mov ip, sp + stmdb sp!, {r11, ip, lr, pc} + bl app_func2 + ldmia sp, {r11, sp, lr} + bx lr + + .globl app_func2 +app_func2: + bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-target1-abs.d b/binutils-2.24/ld/testsuite/ld-arm/arm-target1-abs.d new file mode 100644 index 0000000..af64e60 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-target1-abs.d @@ -0,0 +1,7 @@ + +.*: file format.* + +Contents of section .text: + 8000 (04800000|00008004) .* +# Ignore .ARM.attributes section +#... diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-target1-rel.d b/binutils-2.24/ld/testsuite/ld-arm/arm-target1-rel.d new file mode 100644 index 0000000..fcd6c1a --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-target1-rel.d @@ -0,0 +1,7 @@ + +.*: file format .* + +Contents of section .text: + 8000 (04000000|00000004) .* +# Ignore .ARM.attributes section +#... diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-target1.s b/binutils-2.24/ld/testsuite/ld-arm/arm-target1.s new file mode 100644 index 0000000..5a7ba91 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-target1.s @@ -0,0 +1,6 @@ +# Test the R_ARM_TARGET1 relocation + .text + .global _start +_start: + .word foo(target1) +foo: diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-target2-abs.d b/binutils-2.24/ld/testsuite/ld-arm/arm-target2-abs.d new file mode 100644 index 0000000..a86dc01 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-target2-abs.d @@ -0,0 +1,7 @@ + +.*: file format.* + +Contents of section .text: + 8000 (10800000|00008010) (44920000|00009244) (1080efcd|cdef8010) (20b25476|7654b220) .* +# Ignore .ARM.attributes section +#... diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-target2-got-rel.d b/binutils-2.24/ld/testsuite/ld-arm/arm-target2-got-rel.d new file mode 100644 index 0000000..3433791 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-target2-got-rel.d @@ -0,0 +1,9 @@ + +.*: file format.* + +Contents of section .text: + 8000 (00100000|00001000) (30220000|00002230) (f80fefcd|cdef0ff8) (04425476|76544204) .* +Contents of section .got: + 9000 (10800000|00008010) .* +# Ignore .ARM.attributes section +#... diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-target2-rel.d b/binutils-2.24/ld/testsuite/ld-arm/arm-target2-rel.d new file mode 100644 index 0000000..f812640 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-target2-rel.d @@ -0,0 +1,7 @@ + +.*: file format.* + +Contents of section .text: + 8000 (10000000|00000010) (40120000|00001240) (0800efcd|cdef0008) (14325476|76543214) .* +# Ignore .ARM.attributes section +#... diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm-target2.s b/binutils-2.24/ld/testsuite/ld-arm/arm-target2.s new file mode 100644 index 0000000..26c4519 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm-target2.s @@ -0,0 +1,9 @@ +# Test the R_ARM_TARGET2 relocation + .text + .global _start +_start: + .word foo(target2) + .word foo+0x1234(target2) + .word foo+0xcdef0000(target2) + .word foo+0x76543210(target2) +foo: diff --git a/binutils-2.24/ld/testsuite/ld-arm/arm.ld b/binutils-2.24/ld/testsuite/ld-arm/arm.ld new file mode 100644 index 0000000..8e3fac2 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/arm.ld @@ -0,0 +1,23 @@ +/* Script for ld testsuite */ +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + PROVIDE (__executable_start = 0x8000); . = 0x8000; + .text : + { + *(.before) + *(.text) + *(.after) + *(.ARM.extab*) + *(.glue_7) + *(.v4_bx) + } =0 + .ARM.exidx : { *(.ARM.exidx*) } + . = 0x9000; + .got : { *(.got) *(.got.plt)} + . = 0x12340000; + .far : { *(.far) } + .ARM.attribues 0 : { *(.ARM.atttributes) } +} diff --git a/binutils-2.24/ld/testsuite/ld-arm/armthumb-lib.d b/binutils-2.24/ld/testsuite/ld-arm/armthumb-lib.d new file mode 100644 index 0000000..dae72ed --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/armthumb-lib.d @@ -0,0 +1,44 @@ + +tmpdir/armthumb-lib.so: file format elf32-(little|big)arm +architecture: armv4t, flags 0x00000150: +HAS_SYMS, DYNAMIC, D_PAGED +start address 0x.* + +Disassembly of section .plt: + +.* <.plt>: + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) + .*: e59fe004 ldr lr, \[pc, #4\] ; .* <lib_func1-0x1.> + .*: e08fe00e add lr, pc, lr + .*: e5bef008 ldr pc, \[lr, #8\]! + .*: .* + .*: e28fc6.* add ip, pc, #.* + .*: e28cca.* add ip, ip, #.* ; 0x.* + .*: e5bcf.* ldr pc, \[ip, #.*\]!.* +Disassembly of section .text: + +.* <lib_func1>: + .*: e1a0c00d mov ip, sp + .*: e92dd800 push {fp, ip, lr, pc} + .*: ebfffff. bl .* <lib_func1-0x..?> + .*: e89d6800 ldm sp, {fp, sp, lr} + .*: e12fff1e bx lr + .*: e1a00000 nop ; \(mov r0, r0\) + .*: e1a00000 nop ; \(mov r0, r0\) + .*: e1a00000 nop ; \(mov r0, r0\) + +.* <__real_lib_func2>: + .*: 4770 bx lr + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) + +.* <lib_func2>: + .*: e59fc004 ldr ip, \[pc, #4\] ; .* <lib_func2\+0xc> + .*: e08cc00f add ip, ip, pc + .*: e12fff1c bx ip + .*: ffffffe5 .* diff --git a/binutils-2.24/ld/testsuite/ld-arm/armthumb-lib.sym b/binutils-2.24/ld/testsuite/ld-arm/armthumb-lib.sym new file mode 100644 index 0000000..f1358e2 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/armthumb-lib.sym @@ -0,0 +1,15 @@ + +Symbol table for image: + +Num +Buc: +Value +Size +Type +Bind +Vis +Ndx +Name + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +9 _edata + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +9 __bss_start__ + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +9 _end + +.. +..: ........ +4 +OBJECT +GLOBAL +DEFAULT +9 data_obj + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +9 __bss_end__ + +.. +..: .......0 +20 +FUNC +GLOBAL +DEFAULT +6 lib_func1 + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +9 __data_start + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +9 __end__ + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +9 __bss_start + +.. +..: 00000000 +0 +NOTYPE +GLOBAL +DEFAULT +UND app_func2 + +.. +..: .......0 +2 +FUNC +GLOBAL +DEFAULT +6 lib_func2 + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +9 _bss_end__ diff --git a/binutils-2.24/ld/testsuite/ld-arm/armv4-bx.d b/binutils-2.24/ld/testsuite/ld-arm/armv4-bx.d new file mode 100644 index 0000000..be2a4da --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/armv4-bx.d @@ -0,0 +1,19 @@ + +.*: .*file format elf32-(big|little)arm.* + +Disassembly of section \.text: + +00008000 <_start>: + 8000: ea000001 b 800c \<__bx_r14\> + 8004: ea000003 b 8018 \<__bx_r0\> + 8008: 0a000002 beq 8018 \<__bx_r0\> + +0000800c <__bx_r14>: + 800c: e31e0001 tst lr, #1 + 8010: 01a0f00e moveq pc, lr + 8014: e12fff1e bx lr + +00008018 <__bx_r0>: + 8018: e3100001 tst r0, #1 + 801c: 01a0f000 moveq pc, r0 + 8020: e12fff10 bx r0 diff --git a/binutils-2.24/ld/testsuite/ld-arm/armv4-bx.s b/binutils-2.24/ld/testsuite/ld-arm/armv4-bx.s new file mode 100644 index 0000000..ef86357 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/armv4-bx.s @@ -0,0 +1,8 @@ +.text +.arch armv4 +.global _start +.type _start, %function +_start: +bx lr +bx r0 +bxeq r0 diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-2.attr b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-2.attr new file mode 100644 index 0000000..578333b --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-2.attr @@ -0,0 +1,14 @@ +Attribute Section: aeabi +File Attributes + Tag_CPU_name: "ARM7TDMI" + Tag_CPU_arch: v4T + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_ABI_PCS_wchar_t: 4 + Tag_ABI_FP_denormal: Needed + Tag_ABI_FP_exceptions: Needed + Tag_ABI_FP_number_model: IEEE 754 + Tag_ABI_align_needed: 8-byte + Tag_ABI_align_preserved: 8-byte, except leaf SP + Tag_ABI_enum_size: small + Tag_ABI_optimization_goals: Aggressive Debug diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-2a.s b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-2a.s new file mode 100644 index 0000000..0303163 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-2a.s @@ -0,0 +1,10 @@ + .cpu arm7tdmi + .fpu softvfp + .eabi_attribute 20, 1 + .eabi_attribute 21, 1 + .eabi_attribute 23, 3 + .eabi_attribute 24, 1 + .eabi_attribute 25, 1 + .eabi_attribute 26, 1 + .eabi_attribute 30, 6 + .file "attr-merge-2a.s" diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-2b.s b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-2b.s new file mode 100644 index 0000000..047890a --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-2b.s @@ -0,0 +1,11 @@ + .cpu arm7tdmi + .fpu softvfp + .eabi_attribute 20, 1 + .eabi_attribute 21, 1 + .eabi_attribute 23, 3 + .eabi_attribute 24, 1 + .eabi_attribute 25, 1 + .eabi_attribute 26, 1 + .eabi_attribute 30, 6 + .eabi_attribute 18, 4 + .file "attr-merge-2b.s" diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-3.attr b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-3.attr new file mode 100644 index 0000000..8d7d1c3 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-3.attr @@ -0,0 +1,32 @@ +Attribute Section: aeabi +File Attributes + Tag_nodefaults: True + Tag_CPU_name: "ARM9E" + Tag_CPU_arch: v5T + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-2 + Tag_FP_arch: VFPv3 + Tag_WMMX_arch: WMMXv2 + Tag_Advanced_SIMD_arch: NEONv1 + Tag_PCS_config: Linux application + Tag_ABI_PCS_R9_use: SB + Tag_ABI_PCS_RW_data: PC-relative + Tag_ABI_PCS_RO_data: PC-relative + Tag_ABI_PCS_GOT_use: direct + Tag_ABI_PCS_wchar_t: 4 + Tag_ABI_FP_rounding: Needed + Tag_ABI_FP_denormal: Needed + Tag_ABI_FP_exceptions: Needed + Tag_ABI_FP_user_exceptions: Needed + Tag_ABI_FP_number_model: IEEE 754 + Tag_ABI_align_needed: 8-byte + Tag_ABI_align_preserved: 8-byte, except leaf SP + Tag_ABI_enum_size: small + Tag_ABI_HardFP_use: SP and DP + Tag_ABI_VFP_args: VFP registers + Tag_CPU_unaligned_access: v6 + Tag_FP_HP_extension: Allowed + Tag_MPextension_use: Allowed + Tag_DIV_use: Not allowed + Tag_T2EE_use: Allowed + Tag_Virtualization_use: TrustZone diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-3a.s b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-3a.s new file mode 100644 index 0000000..bc7a0c1 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-3a.s @@ -0,0 +1,39 @@ + .cpu arm7tdmi + .fpu softvfp + .eabi_attribute Tag_CPU_arch, 2 + @ .eabi_attribute Tag_CPU_arch_profile, 0x41 + .eabi_attribute Tag_ARM_ISA_use, 0 + .eabi_attribute Tag_THUMB_ISA_use, 1 + .eabi_attribute Tag_VFP_arch, 3 + .eabi_attribute Tag_WMMX_arch, 1 + .eabi_attribute Tag_Advanced_SIMD_arch, 0 + .eabi_attribute Tag_PCS_config, 0 + .eabi_attribute Tag_ABI_PCS_R9_use, 1 + .eabi_attribute Tag_ABI_PCS_RW_data, 1 + .eabi_attribute Tag_ABI_PCS_RO_data, 1 + .eabi_attribute Tag_ABI_PCS_GOT_use, 1 + .eabi_attribute Tag_ABI_PCS_wchar_t, 4 + .eabi_attribute Tag_ABI_FP_rounding, 0 + .eabi_attribute Tag_ABI_FP_denormal, 1 + .eabi_attribute Tag_ABI_FP_exceptions, 0 + .eabi_attribute Tag_ABI_FP_user_exceptions, 0 + .eabi_attribute Tag_ABI_FP_number_model, 0 + .eabi_attribute Tag_ABI_align8_needed, 1 + .eabi_attribute Tag_ABI_align8_preserved, 1 + .eabi_attribute Tag_ABI_enum_size, 1 + .eabi_attribute Tag_ABI_HardFP_use, 1 + .eabi_attribute Tag_ABI_VFP_args, 0 + @ .eabi_attribute Tag_ABI_WMMX_args, 0 + @ .eabi_attribute Tag_ABI_optimization_goals, 0 + @ .eabi_attribute Tag_ABI_FP_optimization_goals, 0 + @ .eabi_attribute Tag_compatibility, 1, "gnu" + .eabi_attribute Tag_CPU_unaligned_access, 0 + .eabi_attribute Tag_VFP_HP_extension, 0 + @ .eabi_attribute Tag_ABI_FP_16bit_format, 0 + .eabi_attribute Tag_nodefaults, 0 + @ .eabi_attribute Tag_also_compatible_with, + .eabi_attribute Tag_T2EE_use, 0 + .eabi_attribute Tag_conformance, "0" + .eabi_attribute Tag_Virtualization_use, 0 + .eabi_attribute Tag_MPextension_use, 0 + .eabi_attribute Tag_DIV_use, 0 diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-3b.s b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-3b.s new file mode 100644 index 0000000..681f661 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-3b.s @@ -0,0 +1,39 @@ + .cpu arm9e + .fpu neon + .eabi_attribute Tag_CPU_arch, 3 + @ .eabi_attribute Tag_CPU_arch_profile, 0x41 + .eabi_attribute Tag_ARM_ISA_use, 1 + .eabi_attribute Tag_THUMB_ISA_use, 2 + .eabi_attribute Tag_VFP_arch, 4 + .eabi_attribute Tag_WMMX_arch, 2 + .eabi_attribute Tag_Advanced_SIMD_arch, 1 + .eabi_attribute Tag_PCS_config, 2 + .eabi_attribute Tag_ABI_PCS_R9_use, 3 + .eabi_attribute Tag_ABI_PCS_RW_data, 3 + .eabi_attribute Tag_ABI_PCS_RO_data, 2 + .eabi_attribute Tag_ABI_PCS_GOT_use, 2 + .eabi_attribute Tag_ABI_PCS_wchar_t, 0 + .eabi_attribute Tag_ABI_FP_rounding, 1 + .eabi_attribute Tag_ABI_FP_denormal, 2 + .eabi_attribute Tag_ABI_FP_exceptions, 1 + .eabi_attribute Tag_ABI_FP_user_exceptions, 1 + .eabi_attribute Tag_ABI_FP_number_model, 3 + .eabi_attribute Tag_ABI_align8_needed, 2 + .eabi_attribute Tag_ABI_align8_preserved, 2 + .eabi_attribute Tag_ABI_enum_size, 3 + .eabi_attribute Tag_ABI_HardFP_use, 2 + .eabi_attribute Tag_ABI_VFP_args, 1 + @ .eabi_attribute Tag_ABI_WMMX_args, 0 + @ .eabi_attribute Tag_ABI_optimization_goals, 0 + @ .eabi_attribute Tag_ABI_FP_optimization_goals, 0 + @ .eabi_attribute Tag_compatibility, 1, "gnu" + .eabi_attribute Tag_CPU_unaligned_access, 1 + .eabi_attribute Tag_VFP_HP_extension, 1 + @ .eabi_attribute Tag_ABI_FP_16bit_format, 0 + .eabi_attribute Tag_nodefaults, 1 + @ .eabi_attribute Tag_also_compatible_with, + .eabi_attribute Tag_T2EE_use, 1 + .eabi_attribute Tag_conformance, "2.08" + .eabi_attribute Tag_Virtualization_use, 1 + .eabi_attribute Tag_MPextension_use, 1 + .eabi_attribute Tag_DIV_use, 1 diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-4.attr b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-4.attr new file mode 100644 index 0000000..75fd063 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-4.attr @@ -0,0 +1,8 @@ +Attribute Section: aeabi +File Attributes + Tag_CPU_name: "ARM7TDMI" + Tag_CPU_arch: v4T + Tag_CPU_arch_profile: Microcontroller + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_also_compatible_with: v6-M diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-4a.s b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-4a.s new file mode 100644 index 0000000..b5b77bf --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-4a.s @@ -0,0 +1,7 @@ + .cpu arm7tdmi + + @ Tag_CPU_arch = v4T + .eabi_attribute Tag_CPU_arch, 2 + + @ Tag_also_compatible_with = v6-M + .eabi_attribute Tag_also_compatible_with, "\006\013" diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-4b.s b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-4b.s new file mode 100644 index 0000000..d2eb6de --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-4b.s @@ -0,0 +1,7 @@ + .cpu cortex-m1 + + @ Tag_CPU_arch = v6-M + .eabi_attribute Tag_CPU_arch, 11 + + @ Tag_also_compatible_with = v4T + .eabi_attribute Tag_also_compatible_with, "\006\002" diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-5.attr b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-5.attr new file mode 100644 index 0000000..9d3e971 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-5.attr @@ -0,0 +1,5 @@ +Attribute Section: aeabi +File Attributes + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_compatibility: flag = 1, vendor = gnu diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-5.s b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-5.s new file mode 100644 index 0000000..583d253 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-5.s @@ -0,0 +1 @@ + .eabi_attribute Tag_compatibility, 1, "gnu" diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-6.attr b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-6.attr new file mode 100644 index 0000000..0af32f7 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-6.attr @@ -0,0 +1,9 @@ +Attribute Section: aeabi +File Attributes + Tag_CPU_name: "Cortex-A9" + Tag_CPU_arch: v7 + Tag_CPU_arch_profile: Application + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-2 + Tag_MPextension_use: Allowed + Tag_Virtualization_use: TrustZone diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-6a.s b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-6a.s new file mode 100644 index 0000000..056d8c8 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-6a.s @@ -0,0 +1,4 @@ + .cpu cortex-a9 + .fpu softvfp + .eabi_attribute 70, 1 + .file "attr-merge-6a.s" diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-6b.s b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-6b.s new file mode 100644 index 0000000..b9ef4d2 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-6b.s @@ -0,0 +1,3 @@ + .cpu cortex-a9 + .fpu softvfp + .file "attr-merge-6b.s" diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-7.attr b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-7.attr new file mode 100644 index 0000000..0af32f7 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-7.attr @@ -0,0 +1,9 @@ +Attribute Section: aeabi +File Attributes + Tag_CPU_name: "Cortex-A9" + Tag_CPU_arch: v7 + Tag_CPU_arch_profile: Application + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-2 + Tag_MPextension_use: Allowed + Tag_Virtualization_use: TrustZone diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-7a.s b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-7a.s new file mode 100644 index 0000000..d875d28 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-7a.s @@ -0,0 +1,4 @@ + .cpu cortex-a9 + .fpu softvfp + .eabi_attribute 70, 1 + .file "attr-merge-7a.s" diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-7b.s b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-7b.s new file mode 100644 index 0000000..2e83e71 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-7b.s @@ -0,0 +1,4 @@ + .cpu cortex-a9 + .fpu softvfp + .eabi_attribute Tag_MPextension_use, 1 + .file "attr-merge-7b.s" diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-arch-1.attr b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-arch-1.attr new file mode 100644 index 0000000..f69f1e7 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-arch-1.attr @@ -0,0 +1,6 @@ +Attribute Section: aeabi +File Attributes + Tag_CPU_name: "ARM v7" + Tag_CPU_arch: v7 + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-2 diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-arch-2.attr b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-arch-2.attr new file mode 100644 index 0000000..55f6965 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-arch-2.attr @@ -0,0 +1,7 @@ +Attribute Section: aeabi +File Attributes + Tag_CPU_raw_name: "arch_v6k" + Tag_CPU_name: "MPCore" + Tag_CPU_arch: v6K + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-0.s b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-0.s new file mode 100644 index 0000000..2ebcfd8 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-0.s @@ -0,0 +1 @@ + .eabi_attribute Tag_DIV_use, 0 diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-00.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-00.d new file mode 100644 index 0000000..942662e --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-00.d @@ -0,0 +1,12 @@ +#source: attr-merge-div-0.s +#source: attr-merge-div-0.s +#as: +#ld: -r +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-01-m3.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-01-m3.d new file mode 100644 index 0000000..c0cdd49 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-01-m3.d @@ -0,0 +1,14 @@ +#source: attr-merge-div-0.s +#source: attr-merge-div-1.s +#as: -mcpu=cortex-m3 +#ld: -r +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_CPU_name: "Cortex-M3" + Tag_CPU_arch: v7 + Tag_CPU_arch_profile: Microcontroller + Tag_THUMB_ISA_use: Thumb-2 diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-01.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-01.d new file mode 100644 index 0000000..f81a81e --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-01.d @@ -0,0 +1,13 @@ +#source: attr-merge-div-0.s +#source: attr-merge-div-1.s +#as: +#ld: -r +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_DIV_use: Not allowed diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-02.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-02.d new file mode 100644 index 0000000..3684950 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-02.d @@ -0,0 +1,13 @@ +#source: attr-merge-div-0.s +#source: attr-merge-div-2.s +#as: +#ld: -r +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_DIV_use: Allowed in v7-A with integer division extension diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-1.s b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-1.s new file mode 100644 index 0000000..d74812d --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-1.s @@ -0,0 +1 @@ + .eabi_attribute Tag_DIV_use, 1 diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-10-m3.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-10-m3.d new file mode 100644 index 0000000..3736e59 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-10-m3.d @@ -0,0 +1,14 @@ +#source: attr-merge-div-1.s +#source: attr-merge-div-0.s +#as: -mcpu=cortex-m3 +#ld: -r +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_CPU_name: "Cortex-M3" + Tag_CPU_arch: v7 + Tag_CPU_arch_profile: Microcontroller + Tag_THUMB_ISA_use: Thumb-2 diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-10.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-10.d new file mode 100644 index 0000000..32614ee --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-10.d @@ -0,0 +1,13 @@ +#source: attr-merge-div-1.s +#source: attr-merge-div-0.s +#as: +#ld: -r +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_DIV_use: Not allowed diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-11.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-11.d new file mode 100644 index 0000000..95dc8db --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-11.d @@ -0,0 +1,13 @@ +#source: attr-merge-div-1.s +#source: attr-merge-div-1.s +#as: +#ld: -r +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_DIV_use: Not allowed diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-12.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-12.d new file mode 100644 index 0000000..73d70ff --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-12.d @@ -0,0 +1,13 @@ +#source: attr-merge-div-1.s +#source: attr-merge-div-2.s +#as: +#ld: -r +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_DIV_use: Allowed in v7-A with integer division extension diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-120.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-120.d new file mode 100644 index 0000000..8891e4b --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-120.d @@ -0,0 +1,16 @@ +#source: attr-merge-div-1.s +#source: attr-merge-div-2.s +#source: attr-merge-div-0.s +#as: -mcpu=cortex-m3 +#ld: -r +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_CPU_name: "Cortex-M3" + Tag_CPU_arch: v7 + Tag_CPU_arch_profile: Microcontroller + Tag_THUMB_ISA_use: Thumb-2 + Tag_DIV_use: Allowed in v7-A with integer division extension diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-2.s b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-2.s new file mode 100644 index 0000000..20394c8 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-2.s @@ -0,0 +1 @@ + .eabi_attribute Tag_DIV_use, 2 diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-20.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-20.d new file mode 100644 index 0000000..fd494bb --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-20.d @@ -0,0 +1,13 @@ +#source: attr-merge-div-2.s +#source: attr-merge-div-0.s +#as: +#ld: -r +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_DIV_use: Allowed in v7-A with integer division extension diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-21.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-21.d new file mode 100644 index 0000000..afd0f8d --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-21.d @@ -0,0 +1,13 @@ +#source: attr-merge-div-2.s +#source: attr-merge-div-1.s +#as: +#ld: -r +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_DIV_use: Allowed in v7-A with integer division extension diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-22.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-22.d new file mode 100644 index 0000000..c70da03 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-div-22.d @@ -0,0 +1,13 @@ +#source: attr-merge-div-2.s +#source: attr-merge-div-2.s +#as: +#ld: -r +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_DIV_use: Allowed in v7-A with integer division extension diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-incompatible.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-incompatible.d new file mode 100644 index 0000000..41711da --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-incompatible.d @@ -0,0 +1,5 @@ +#source: attr-merge-incompatibleb.s +#source: attr-merge-incompatiblea.s +#as: +#ld: +#error: Object has vendor-specific contents that must be processed by the '.+' toolchain diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-incompatiblea.s b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-incompatiblea.s new file mode 100644 index 0000000..03e0f7e --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-incompatiblea.s @@ -0,0 +1 @@ + .eabi_attribute Tag_compatibility, 1, "Random Toolchain Vendor" diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-incompatibleb.s b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-incompatibleb.s new file mode 100644 index 0000000..583d253 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-incompatibleb.s @@ -0,0 +1 @@ + .eabi_attribute Tag_compatibility, 1, "gnu" diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-unknown-1.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-unknown-1.d new file mode 100644 index 0000000..38acff9 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-unknown-1.d @@ -0,0 +1,5 @@ +#source: attr-merge-unknown-1.s +#source: blank.s +#as: +#ld: +#error: Unknown mandatory EABI object attribute 40 diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-unknown-1.s b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-unknown-1.s new file mode 100644 index 0000000..d2cff1f --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-unknown-1.s @@ -0,0 +1,3 @@ + @ This attrubute is supposed to be unknown. + @ If this number should become known, change it. + .eabi_attribute 40, 1 diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-unknown-2.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-unknown-2.d new file mode 100644 index 0000000..bf44f43 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-unknown-2.d @@ -0,0 +1,13 @@ +#source: attr-merge-unknown-2.s +#source: blank.s +#as: +#ld: +#warning: Unknown EABI object attribute 82 +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-unknown-2.s b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-unknown-2.s new file mode 100644 index 0000000..d8d61e0 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-unknown-2.s @@ -0,0 +1,3 @@ + @ This attrubute is supposed to be unknown. + @ If this number should become known, change it. + .eabi_attribute 82, 1 diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-unknown-2r.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-unknown-2r.d new file mode 100644 index 0000000..6d523fb --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-unknown-2r.d @@ -0,0 +1,13 @@ +#source: blank.s +#source: attr-merge-unknown-2.s +#as: +#ld: +#warning: Unknown EABI object attribute 82 +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-unknown-3.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-unknown-3.d new file mode 100644 index 0000000..b02ba6d --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-unknown-3.d @@ -0,0 +1,14 @@ +#source: attr-merge-unknown-2.s +#source: attr-merge-unknown-2.s +#as: +#ld: +#warning: Unknown EABI object attribute 82 +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_unknown_82: 1 \(0x1\) diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-1.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-1.d new file mode 100644 index 0000000..8625735 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-1.d @@ -0,0 +1,13 @@ +#source: attr-merge-vfp-2.s +#source: attr-merge-vfp-3-d16.s +#as: +#ld: -r +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_FP_arch: VFPv3-D16 diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-1r.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-1r.d new file mode 100644 index 0000000..d7a15d7 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-1r.d @@ -0,0 +1,13 @@ +#source: attr-merge-vfp-3-d16.s +#source: attr-merge-vfp-2.s +#as: +#ld: -r +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_FP_arch: VFPv3-D16 diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-2.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-2.d new file mode 100644 index 0000000..6444bd0 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-2.d @@ -0,0 +1,13 @@ +#source: attr-merge-vfp-3.s +#source: attr-merge-vfp-3-d16.s +#as: +#ld: -r +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_FP_arch: VFPv3 diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-2.s b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-2.s new file mode 100644 index 0000000..32657d3 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-2.s @@ -0,0 +1,2 @@ +.fpu vfpv2 + diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-2r.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-2r.d new file mode 100644 index 0000000..1d36983 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-2r.d @@ -0,0 +1,13 @@ +#source: attr-merge-vfp-3-d16.s +#source: attr-merge-vfp-3.s +#as: +#ld: -r +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_FP_arch: VFPv3 diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-3-d16.s b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-3-d16.s new file mode 100644 index 0000000..74729e0 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-3-d16.s @@ -0,0 +1,2 @@ +.fpu vfpv3-d16 + diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-3.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-3.d new file mode 100644 index 0000000..8f9d2e7 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-3.d @@ -0,0 +1,13 @@ +#source: attr-merge-vfp-3-d16.s +#source: attr-merge-vfp-4-d16.s +#as: +#ld: -r +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_FP_arch: VFPv4-D16 diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-3.s b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-3.s new file mode 100644 index 0000000..4d60323 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-3.s @@ -0,0 +1,2 @@ +.fpu vfpv3 + diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-3r.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-3r.d new file mode 100644 index 0000000..ab0ff33 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-3r.d @@ -0,0 +1,13 @@ +#source: attr-merge-vfp-4-d16.s +#source: attr-merge-vfp-3-d16.s +#as: +#ld: -r +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_FP_arch: VFPv4-D16 diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-4-d16.s b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-4-d16.s new file mode 100644 index 0000000..8d8aedd --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-4-d16.s @@ -0,0 +1,2 @@ +.fpu vfpv4-d16 + diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-4.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-4.d new file mode 100644 index 0000000..e51a41b --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-4.d @@ -0,0 +1,13 @@ +#source: attr-merge-vfp-3.s +#source: attr-merge-vfp-4-d16.s +#as: +#ld: -r +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_FP_arch: VFPv4 diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-4.s b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-4.s new file mode 100644 index 0000000..190cdc0 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-4.s @@ -0,0 +1,2 @@ +.fpu vfpv4 + diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-4r.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-4r.d new file mode 100644 index 0000000..6d19a60 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-4r.d @@ -0,0 +1,13 @@ +#source: attr-merge-vfp-4-d16.s +#source: attr-merge-vfp-3.s +#as: +#ld: -r +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_FP_arch: VFPv4 diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-5.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-5.d new file mode 100644 index 0000000..650b264 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-5.d @@ -0,0 +1,13 @@ +#source: attr-merge-vfp-4.s +#source: attr-merge-vfp-4-d16.s +#as: +#ld: -r +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_FP_arch: VFPv4 diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-5r.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-5r.d new file mode 100644 index 0000000..f5fb7d7 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-5r.d @@ -0,0 +1,13 @@ +#source: attr-merge-vfp-4-d16.s +#source: attr-merge-vfp-4.s +#as: +#ld: -r +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_FP_arch: VFPv4 diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-6.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-6.d new file mode 100644 index 0000000..54d063f --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-6.d @@ -0,0 +1,14 @@ +#source: attr-merge-vfp-3.s +#source: attr-merge-vfpv3xd.s +#as: +#ld: -r +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_FP_arch: VFPv3 + Tag_ABI_HardFP_use: SP and DP diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-6r.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-6r.d new file mode 100644 index 0000000..f32d4fc --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-6r.d @@ -0,0 +1,14 @@ +#source: attr-merge-vfpv3xd.s +#source: attr-merge-vfp-3.s +#as: +#ld: -r +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_FP_arch: VFPv3 + Tag_ABI_HardFP_use: SP and DP diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-7.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-7.d new file mode 100644 index 0000000..6b1f9c9 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-7.d @@ -0,0 +1,14 @@ +#source: attr-merge-vfp-armv8.s +#source: attr-merge-vfp-armv8-hard.s +#as: +#ld: -r +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_FP_arch: FP for ARMv8 + Tag_ABI_HardFP_use: SP and DP diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-7r.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-7r.d new file mode 100644 index 0000000..6b1f9c9 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-7r.d @@ -0,0 +1,14 @@ +#source: attr-merge-vfp-armv8.s +#source: attr-merge-vfp-armv8-hard.s +#as: +#ld: -r +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_FP_arch: FP for ARMv8 + Tag_ABI_HardFP_use: SP and DP diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-armv8-hard.s b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-armv8-hard.s new file mode 100644 index 0000000..6457974 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-armv8-hard.s @@ -0,0 +1,2 @@ +.fpu fp-armv8 +.eabi_attribute Tag_ABI_HardFP_use, 3 diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-armv8.s b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-armv8.s new file mode 100644 index 0000000..a7679cd --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfp-armv8.s @@ -0,0 +1,2 @@ +.fpu fp-armv8 + diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfpv3xd.s b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfpv3xd.s new file mode 100644 index 0000000..295ca17 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-vfpv3xd.s @@ -0,0 +1,2 @@ +.fpu vfpv3xd + diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-0.s b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-0.s new file mode 100644 index 0000000..ef19a88 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-0.s @@ -0,0 +1,11 @@ + .cpu arm7tdmi + .fpu softvfp + .eabi_attribute 20, 1 + .eabi_attribute 21, 1 + .eabi_attribute 23, 3 + .eabi_attribute 24, 1 + .eabi_attribute 25, 1 + .eabi_attribute 26, 1 + .eabi_attribute 30, 6 + .eabi_attribute 18, 0 + .file "attr-merge-wchar-0.s" diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-00-nowarn.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-00-nowarn.d new file mode 100644 index 0000000..8a01f2d --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-00-nowarn.d @@ -0,0 +1,21 @@ +#source: attr-merge-wchar-0.s +#source: attr-merge-wchar-0.s +#as: +#ld: -r --no-wchar-size-warning +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_CPU_name: "ARM7TDMI" + Tag_CPU_arch: v4T + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_ABI_FP_denormal: Needed + Tag_ABI_FP_exceptions: Needed + Tag_ABI_FP_number_model: IEEE 754 + Tag_ABI_align_needed: 8-byte + Tag_ABI_align_preserved: 8-byte, except leaf SP + Tag_ABI_enum_size: small + Tag_ABI_optimization_goals: Aggressive Debug diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-00.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-00.d new file mode 100644 index 0000000..4242822 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-00.d @@ -0,0 +1,21 @@ +#source: attr-merge-wchar-0.s +#source: attr-merge-wchar-0.s +#as: +#ld: -r +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_CPU_name: "ARM7TDMI" + Tag_CPU_arch: v4T + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_ABI_FP_denormal: Needed + Tag_ABI_FP_exceptions: Needed + Tag_ABI_FP_number_model: IEEE 754 + Tag_ABI_align_needed: 8-byte + Tag_ABI_align_preserved: 8-byte, except leaf SP + Tag_ABI_enum_size: small + Tag_ABI_optimization_goals: Aggressive Debug diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-02-nowarn.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-02-nowarn.d new file mode 100644 index 0000000..f393516 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-02-nowarn.d @@ -0,0 +1,22 @@ +#source: attr-merge-wchar-0.s +#source: attr-merge-wchar-2.s +#as: +#ld: -r --no-wchar-size-warning +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_CPU_name: "ARM7TDMI" + Tag_CPU_arch: v4T + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_ABI_PCS_wchar_t: 2 + Tag_ABI_FP_denormal: Needed + Tag_ABI_FP_exceptions: Needed + Tag_ABI_FP_number_model: IEEE 754 + Tag_ABI_align_needed: 8-byte + Tag_ABI_align_preserved: 8-byte, except leaf SP + Tag_ABI_enum_size: small + Tag_ABI_optimization_goals: Aggressive Debug diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-02.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-02.d new file mode 100644 index 0000000..f662120 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-02.d @@ -0,0 +1,22 @@ +#source: attr-merge-wchar-0.s +#source: attr-merge-wchar-2.s +#as: +#ld: -r +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_CPU_name: "ARM7TDMI" + Tag_CPU_arch: v4T + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_ABI_PCS_wchar_t: 2 + Tag_ABI_FP_denormal: Needed + Tag_ABI_FP_exceptions: Needed + Tag_ABI_FP_number_model: IEEE 754 + Tag_ABI_align_needed: 8-byte + Tag_ABI_align_preserved: 8-byte, except leaf SP + Tag_ABI_enum_size: small + Tag_ABI_optimization_goals: Aggressive Debug diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-04-nowarn.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-04-nowarn.d new file mode 100644 index 0000000..16cc469 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-04-nowarn.d @@ -0,0 +1,22 @@ +#source: attr-merge-wchar-0.s +#source: attr-merge-wchar-4.s +#as: +#ld: -r --no-wchar-size-warning +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_CPU_name: "ARM7TDMI" + Tag_CPU_arch: v4T + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_ABI_PCS_wchar_t: 4 + Tag_ABI_FP_denormal: Needed + Tag_ABI_FP_exceptions: Needed + Tag_ABI_FP_number_model: IEEE 754 + Tag_ABI_align_needed: 8-byte + Tag_ABI_align_preserved: 8-byte, except leaf SP + Tag_ABI_enum_size: small + Tag_ABI_optimization_goals: Aggressive Debug diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-04.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-04.d new file mode 100644 index 0000000..41413b9 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-04.d @@ -0,0 +1,22 @@ +#source: attr-merge-wchar-0.s +#source: attr-merge-wchar-4.s +#as: +#ld: -r +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_CPU_name: "ARM7TDMI" + Tag_CPU_arch: v4T + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_ABI_PCS_wchar_t: 4 + Tag_ABI_FP_denormal: Needed + Tag_ABI_FP_exceptions: Needed + Tag_ABI_FP_number_model: IEEE 754 + Tag_ABI_align_needed: 8-byte + Tag_ABI_align_preserved: 8-byte, except leaf SP + Tag_ABI_enum_size: small + Tag_ABI_optimization_goals: Aggressive Debug diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-2.s b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-2.s new file mode 100644 index 0000000..4b3b96b --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-2.s @@ -0,0 +1,11 @@ + .cpu arm7tdmi + .fpu softvfp + .eabi_attribute 20, 1 + .eabi_attribute 21, 1 + .eabi_attribute 23, 3 + .eabi_attribute 24, 1 + .eabi_attribute 25, 1 + .eabi_attribute 26, 1 + .eabi_attribute 30, 6 + .eabi_attribute 18, 2 + .file "attr-merge-wchar-2.s" diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-20-nowarn.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-20-nowarn.d new file mode 100644 index 0000000..c0b1248 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-20-nowarn.d @@ -0,0 +1,22 @@ +#source: attr-merge-wchar-2.s +#source: attr-merge-wchar-0.s +#as: +#ld: -r --no-wchar-size-warning +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_CPU_name: "ARM7TDMI" + Tag_CPU_arch: v4T + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_ABI_PCS_wchar_t: 2 + Tag_ABI_FP_denormal: Needed + Tag_ABI_FP_exceptions: Needed + Tag_ABI_FP_number_model: IEEE 754 + Tag_ABI_align_needed: 8-byte + Tag_ABI_align_preserved: 8-byte, except leaf SP + Tag_ABI_enum_size: small + Tag_ABI_optimization_goals: Aggressive Debug diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-20.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-20.d new file mode 100644 index 0000000..b81fb15 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-20.d @@ -0,0 +1,22 @@ +#source: attr-merge-wchar-2.s +#source: attr-merge-wchar-0.s +#as: +#ld: -r +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_CPU_name: "ARM7TDMI" + Tag_CPU_arch: v4T + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_ABI_PCS_wchar_t: 2 + Tag_ABI_FP_denormal: Needed + Tag_ABI_FP_exceptions: Needed + Tag_ABI_FP_number_model: IEEE 754 + Tag_ABI_align_needed: 8-byte + Tag_ABI_align_preserved: 8-byte, except leaf SP + Tag_ABI_enum_size: small + Tag_ABI_optimization_goals: Aggressive Debug diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-22-nowarn.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-22-nowarn.d new file mode 100644 index 0000000..e9a1e94 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-22-nowarn.d @@ -0,0 +1,22 @@ +#source: attr-merge-wchar-2.s +#source: attr-merge-wchar-2.s +#as: +#ld: -r --no-wchar-size-warning +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_CPU_name: "ARM7TDMI" + Tag_CPU_arch: v4T + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_ABI_PCS_wchar_t: 2 + Tag_ABI_FP_denormal: Needed + Tag_ABI_FP_exceptions: Needed + Tag_ABI_FP_number_model: IEEE 754 + Tag_ABI_align_needed: 8-byte + Tag_ABI_align_preserved: 8-byte, except leaf SP + Tag_ABI_enum_size: small + Tag_ABI_optimization_goals: Aggressive Debug diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-22.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-22.d new file mode 100644 index 0000000..bf75660 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-22.d @@ -0,0 +1,22 @@ +#source: attr-merge-wchar-2.s +#source: attr-merge-wchar-2.s +#as: +#ld: -r +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_CPU_name: "ARM7TDMI" + Tag_CPU_arch: v4T + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_ABI_PCS_wchar_t: 2 + Tag_ABI_FP_denormal: Needed + Tag_ABI_FP_exceptions: Needed + Tag_ABI_FP_number_model: IEEE 754 + Tag_ABI_align_needed: 8-byte + Tag_ABI_align_preserved: 8-byte, except leaf SP + Tag_ABI_enum_size: small + Tag_ABI_optimization_goals: Aggressive Debug diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-24-nowarn.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-24-nowarn.d new file mode 100644 index 0000000..0c9b33e --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-24-nowarn.d @@ -0,0 +1,22 @@ +#source: attr-merge-wchar-2.s +#source: attr-merge-wchar-4.s +#as: +#ld: -r --no-wchar-size-warning +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_CPU_name: "ARM7TDMI" + Tag_CPU_arch: v4T + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_ABI_PCS_wchar_t: 2 + Tag_ABI_FP_denormal: Needed + Tag_ABI_FP_exceptions: Needed + Tag_ABI_FP_number_model: IEEE 754 + Tag_ABI_align_needed: 8-byte + Tag_ABI_align_preserved: 8-byte, except leaf SP + Tag_ABI_enum_size: small + Tag_ABI_optimization_goals: Aggressive Debug diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-24.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-24.d new file mode 100644 index 0000000..46d6c66 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-24.d @@ -0,0 +1,5 @@ +#source: attr-merge-wchar-2.s +#source: attr-merge-wchar-4.s +#as: +#ld: -r +#warning: warning: .* uses 4-byte wchar_t yet the output is to use 2-byte wchar_t; use of wchar_t values across objects may fail diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-4.s b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-4.s new file mode 100644 index 0000000..fdd03f9 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-4.s @@ -0,0 +1,11 @@ + .cpu arm7tdmi + .fpu softvfp + .eabi_attribute 20, 1 + .eabi_attribute 21, 1 + .eabi_attribute 23, 3 + .eabi_attribute 24, 1 + .eabi_attribute 25, 1 + .eabi_attribute 26, 1 + .eabi_attribute 30, 6 + .eabi_attribute 18, 4 + .file "attr-merge-wchar-4.s" diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-40-nowarn.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-40-nowarn.d new file mode 100644 index 0000000..54f0c54 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-40-nowarn.d @@ -0,0 +1,22 @@ +#source: attr-merge-wchar-4.s +#source: attr-merge-wchar-0.s +#as: +#ld: -r --no-wchar-size-warning +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_CPU_name: "ARM7TDMI" + Tag_CPU_arch: v4T + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_ABI_PCS_wchar_t: 4 + Tag_ABI_FP_denormal: Needed + Tag_ABI_FP_exceptions: Needed + Tag_ABI_FP_number_model: IEEE 754 + Tag_ABI_align_needed: 8-byte + Tag_ABI_align_preserved: 8-byte, except leaf SP + Tag_ABI_enum_size: small + Tag_ABI_optimization_goals: Aggressive Debug diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-40.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-40.d new file mode 100644 index 0000000..46be48c --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-40.d @@ -0,0 +1,22 @@ +#source: attr-merge-wchar-4.s +#source: attr-merge-wchar-0.s +#as: +#ld: -r +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_CPU_name: "ARM7TDMI" + Tag_CPU_arch: v4T + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_ABI_PCS_wchar_t: 4 + Tag_ABI_FP_denormal: Needed + Tag_ABI_FP_exceptions: Needed + Tag_ABI_FP_number_model: IEEE 754 + Tag_ABI_align_needed: 8-byte + Tag_ABI_align_preserved: 8-byte, except leaf SP + Tag_ABI_enum_size: small + Tag_ABI_optimization_goals: Aggressive Debug diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-42-nowarn.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-42-nowarn.d new file mode 100644 index 0000000..cc72d3e --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-42-nowarn.d @@ -0,0 +1,22 @@ +#source: attr-merge-wchar-4.s +#source: attr-merge-wchar-2.s +#as: +#ld: -r --no-wchar-size-warning +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_CPU_name: "ARM7TDMI" + Tag_CPU_arch: v4T + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_ABI_PCS_wchar_t: 4 + Tag_ABI_FP_denormal: Needed + Tag_ABI_FP_exceptions: Needed + Tag_ABI_FP_number_model: IEEE 754 + Tag_ABI_align_needed: 8-byte + Tag_ABI_align_preserved: 8-byte, except leaf SP + Tag_ABI_enum_size: small + Tag_ABI_optimization_goals: Aggressive Debug diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-42.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-42.d new file mode 100644 index 0000000..c2aca5e --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-42.d @@ -0,0 +1,5 @@ +#source: attr-merge-wchar-4.s +#source: attr-merge-wchar-2.s +#as: +#ld: -r +#warning: warning: .* uses 2-byte wchar_t yet the output is to use 4-byte wchar_t; use of wchar_t values across objects may fail diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-44-nowarn.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-44-nowarn.d new file mode 100644 index 0000000..35eb756 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-44-nowarn.d @@ -0,0 +1,22 @@ +#source: attr-merge-wchar-4.s +#source: attr-merge-wchar-4.s +#as: +#ld: -r --no-wchar-size-warning +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_CPU_name: "ARM7TDMI" + Tag_CPU_arch: v4T + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_ABI_PCS_wchar_t: 4 + Tag_ABI_FP_denormal: Needed + Tag_ABI_FP_exceptions: Needed + Tag_ABI_FP_number_model: IEEE 754 + Tag_ABI_align_needed: 8-byte + Tag_ABI_align_preserved: 8-byte, except leaf SP + Tag_ABI_enum_size: small + Tag_ABI_optimization_goals: Aggressive Debug diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-44.d b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-44.d new file mode 100644 index 0000000..c0fba85 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge-wchar-44.d @@ -0,0 +1,22 @@ +#source: attr-merge-wchar-4.s +#source: attr-merge-wchar-4.s +#as: +#ld: -r +#readelf: -A +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* + +Attribute Section: aeabi +File Attributes + Tag_CPU_name: "ARM7TDMI" + Tag_CPU_arch: v4T + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_ABI_PCS_wchar_t: 4 + Tag_ABI_FP_denormal: Needed + Tag_ABI_FP_exceptions: Needed + Tag_ABI_FP_number_model: IEEE 754 + Tag_ABI_align_needed: 8-byte + Tag_ABI_align_preserved: 8-byte, except leaf SP + Tag_ABI_enum_size: small + Tag_ABI_optimization_goals: Aggressive Debug diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge.attr b/binutils-2.24/ld/testsuite/ld-arm/attr-merge.attr new file mode 100644 index 0000000..578333b --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge.attr @@ -0,0 +1,14 @@ +Attribute Section: aeabi +File Attributes + Tag_CPU_name: "ARM7TDMI" + Tag_CPU_arch: v4T + Tag_ARM_ISA_use: Yes + Tag_THUMB_ISA_use: Thumb-1 + Tag_ABI_PCS_wchar_t: 4 + Tag_ABI_FP_denormal: Needed + Tag_ABI_FP_exceptions: Needed + Tag_ABI_FP_number_model: IEEE 754 + Tag_ABI_align_needed: 8-byte + Tag_ABI_align_preserved: 8-byte, except leaf SP + Tag_ABI_enum_size: small + Tag_ABI_optimization_goals: Aggressive Debug diff --git a/binutils-2.24/ld/testsuite/ld-arm/attr-merge.s b/binutils-2.24/ld/testsuite/ld-arm/attr-merge.s new file mode 100644 index 0000000..b56f6e3 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/attr-merge.s @@ -0,0 +1,11 @@ + .cpu arm7tdmi + .fpu softvfp + .eabi_attribute 20, 1 + .eabi_attribute 21, 1 + .eabi_attribute 23, 3 + .eabi_attribute 24, 1 + .eabi_attribute 25, 1 + .eabi_attribute 26, 1 + .eabi_attribute 30, 6 + .eabi_attribute 18, 4 + .file "attr-merge.s" diff --git a/binutils-2.24/ld/testsuite/ld-arm/blank.s b/binutils-2.24/ld/testsuite/ld-arm/blank.s new file mode 100644 index 0000000..1d22054 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/blank.s @@ -0,0 +1 @@ +@ this file left intentionally blank diff --git a/binutils-2.24/ld/testsuite/ld-arm/branch-lks-sym.ld b/binutils-2.24/ld/testsuite/ld-arm/branch-lks-sym.ld new file mode 100644 index 0000000..a70776f --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/branch-lks-sym.ld @@ -0,0 +1 @@ +extFunc = 0x1000 + 1; diff --git a/binutils-2.24/ld/testsuite/ld-arm/callweak-2.d b/binutils-2.24/ld/testsuite/ld-arm/callweak-2.d new file mode 100644 index 0000000..d401479 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/callweak-2.d @@ -0,0 +1,15 @@ + +.*: file format.* + +Disassembly of section .far: + +12340000 <[^>]*>: +12340000: e320f000 nop \{0\} +12340004: 0320f000 nopeq \{0\} + +12340008 <[^>]*>: +12340008: f3af 8000 nop.w +1234000c: 2000 movs r0, #0 +1234000e: f3af 8000 nop.w +12340012: 4770 bx lr + diff --git a/binutils-2.24/ld/testsuite/ld-arm/callweak-2.s b/binutils-2.24/ld/testsuite/ld-arm/callweak-2.s new file mode 100644 index 0000000..af4f026 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/callweak-2.s @@ -0,0 +1,17 @@ + .syntax unified + .arch armv6t2 + .weak bar + .section .far, "ax", %progbits + .global _start + .type _start, %function +_start: + bl bar + bleq bar + .thumb + .type foo, %function + .thumb_func +foo: + bl bar + movs r0, #0 + bl bar + bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/callweak.d b/binutils-2.24/ld/testsuite/ld-arm/callweak.d new file mode 100644 index 0000000..89cb4a5 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/callweak.d @@ -0,0 +1,17 @@ + +.*: file format.* + +Disassembly of section .far: + +12340000 <[^>]*>: +12340000: e1a00000 nop ; \(mov r0, r0\) +12340004: 01a00000 moveq r0, r0 + +12340008 <[^>]*>: +12340008: e000 b.n 1234000c <[^>]*> +1234000a: bf00 nop +1234000c: 2000 movs r0, #0 +1234000e: e000 b.n 12340012 <[^>]*> +12340010: bf00 nop +12340012: 4770 bx lr + diff --git a/binutils-2.24/ld/testsuite/ld-arm/callweak.s b/binutils-2.24/ld/testsuite/ld-arm/callweak.s new file mode 100644 index 0000000..b9bcd1b --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/callweak.s @@ -0,0 +1,17 @@ + .syntax unified + .arch armv6 + .weak bar + .section .far, "ax", %progbits + .global _start + .type _start, %function +_start: + bl bar + bleq bar + .thumb + .type foo, %function + .thumb_func +foo: + bl bar + movs r0, #0 + bl bar + bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-arm-target.s b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-arm-target.s new file mode 100644 index 0000000..d5174c4 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-arm-target.s @@ -0,0 +1,9 @@ + .syntax unified + .cpu cortex-a8 + .text + .arm + .align 3 + .global targetfn + .type targetfn, %function +targetfn: + bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-far-1.s b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-far-1.s new file mode 100644 index 0000000..09d3583 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-far-1.s @@ -0,0 +1,8 @@ + .syntax unified + .thumb + .globl two +two: + bl far_fn + .rept 0x200000 + .long 0 + .endr diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-far-2.s b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-far-2.s new file mode 100644 index 0000000..22fd40f --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-far-2.s @@ -0,0 +1,20 @@ + .syntax unified + .thumb +three: + bl far_fn1 + bl far_fn2 + .rept 1016 + .long 0 + .endr + nop +label1: + eor.w r0, r1, r2 + beq.w label1 + + eor.w r0, r1, r2 + + eor.w r0, r1, r2 + b.w label1 + + eor.w r0, r1, r2 + eor.w r0, r1, r2 diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-far-3.s b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-far-3.s new file mode 100644 index 0000000..48241a5 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-far-3.s @@ -0,0 +1,9 @@ +.globl far_fn +.type far_fn, %function +.set far_fn, 0x7fff0000 +.globl far_fn1 +.type far_fn1, %function +.set far_fn1, 0x80000000 +.globl far_fn2 +.type far_fn2, %function +.set far_fn2, 0x80000004 diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-far.d b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-far.d new file mode 100644 index 0000000..e327ac1 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-far.d @@ -0,0 +1,40 @@ + +.*: file format .* + + +Disassembly of section \.text: + +00000000 <two>: + 0: f000 c802 blx 800008 <__far_fn_from_thumb> + ... +#... +00800008 <__far_fn_from_thumb>: + 800008: e51ff004 ldr pc, \[pc, #-4\] ; 80000c <__far_fn_from_thumb\+0x4> + 80000c: 7fff0000 .word 0x7fff0000 + +00800010 <three>: + 800010: f001 e802 blx 801018 <__far_fn1_from_thumb> + 800014: f001 e804 blx 801020 <__far_fn2_from_thumb> + ... + 800ff8: bf00 nop + +00800ffa <label1>: + 800ffa: ea81 0002 eor.w r0, r1, r2 + 800ffe: f000 b813 b.w 801028 <__far_fn2_from_thumb\+0x8> + 801002: ea81 0002 eor.w r0, r1, r2 + 801006: ea81 0002 eor.w r0, r1, r2 + 80100a: f7ff bff6 b.w 800ffa <label1> + 80100e: ea81 0002 eor.w r0, r1, r2 + 801012: ea81 0002 eor.w r0, r1, r2 + ... + +00801018 <__far_fn1_from_thumb>: + 801018: e51ff004 ldr pc, \[pc, #-4\] ; 80101c <__far_fn1_from_thumb\+0x4> + 80101c: 80000000 .word 0x80000000 + +00801020 <__far_fn2_from_thumb>: + 801020: e51ff004 ldr pc, \[pc, #-4\] ; 801024 <__far_fn2_from_thumb\+0x4> + 801024: 80000004 .word 0x80000004 + 801028: d001 beq.n 80102e <__far_fn2_from_thumb\+0xe> + 80102a: f7ff bfea b.w 801002 <label1\+0x8> + 80102e: f7ff bfe4 b.w 800ffa <label1> diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-b-plt.d b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-b-plt.d new file mode 100644 index 0000000..4f1078d --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-b-plt.d @@ -0,0 +1,30 @@ + +.* + + +Disassembly of section \.plt: + +00008000 <\.plt>: + 8000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) + 8004: e59fe004 ldr lr, \[pc, #4\] ; 8010 <foo-0xfe0> + 8008: e08fe00e add lr, pc, lr + 800c: e5bef008 ldr pc, \[lr, #8\]! + 8010: 00000ffc \.word 0x00000ffc + 8014: 4778 bx pc + 8016: 46c0 nop ; \(mov r8, r8\) + 8018: e28fc600 add ip, pc, #0, 12 + 801c: e28cca00 add ip, ip, #0, 20 + 8020: e5bcfff8 ldr pc, \[ip, #4088\]! ; 0xff8 + +Disassembly of section \.text: + +00008ff0 <foo>: + 8ff0: 46c0 nop ; \(mov r8, r8\) + 8ff2: f240 0000 movw r0, #0 + 8ff6: f240 0000 movw r0, #0 + 8ffa: f240 0000 movw r0, #0 + 8ffe: f000 b803 b\.w 9008 <foo\+0x18> + 9002: 0000 movs r0, r0 + 9004: 0000 movs r0, r0 + 9006: 0000 movs r0, r0 + 9008: f7ff b804 b\.w 8014 <foo-0xfdc> diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-b-plt.s b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-b-plt.s new file mode 100644 index 0000000..afd340d --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-b-plt.s @@ -0,0 +1,10 @@ + .syntax unified + .globl foo + .type foo,%function + .thumb_func +foo: + nop @ 0x00 + movw r0,#0 @ 0x02 + movw r0,#0 @ 0x06 + movw r0,#0 @ 0x0a + b.w bar(PLT) @ 0x0e diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-b-rel-arm.d b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-b-rel-arm.d new file mode 100644 index 0000000..195a51b --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-b-rel-arm.d @@ -0,0 +1,83 @@ + +.*: file format .* + + +Disassembly of section \.text: + +00008f00 <targetfn>: + 8f00: e12fff1e bx lr + 8f04: e320f000 nop \{0\} + +00008f08 <_start>: + 8f08: bf00 nop + 8f0a: eb01 0002 add\.w r0, r1, r2 + 8f0e: f000 b87f b\.w 9010 <__targetfn_from_thumb> + 8f12: eb01 0002 add\.w r0, r1, r2 + 8f16: f000 b87b b\.w 9010 <__targetfn_from_thumb> + 8f1a: eb01 0002 add\.w r0, r1, r2 + 8f1e: f000 b877 b\.w 9010 <__targetfn_from_thumb> + 8f22: eb01 0002 add\.w r0, r1, r2 + 8f26: f000 b873 b\.w 9010 <__targetfn_from_thumb> + 8f2a: eb01 0002 add\.w r0, r1, r2 + 8f2e: f000 b86f b\.w 9010 <__targetfn_from_thumb> + 8f32: eb01 0002 add\.w r0, r1, r2 + 8f36: f000 b86b b\.w 9010 <__targetfn_from_thumb> + 8f3a: eb01 0002 add\.w r0, r1, r2 + 8f3e: f000 b867 b\.w 9010 <__targetfn_from_thumb> + 8f42: eb01 0002 add\.w r0, r1, r2 + 8f46: f000 b863 b\.w 9010 <__targetfn_from_thumb> + 8f4a: eb01 0002 add\.w r0, r1, r2 + 8f4e: f000 b85f b\.w 9010 <__targetfn_from_thumb> + 8f52: eb01 0002 add\.w r0, r1, r2 + 8f56: f000 b85b b\.w 9010 <__targetfn_from_thumb> + 8f5a: eb01 0002 add\.w r0, r1, r2 + 8f5e: f000 b857 b\.w 9010 <__targetfn_from_thumb> + 8f62: eb01 0002 add\.w r0, r1, r2 + 8f66: f000 b853 b\.w 9010 <__targetfn_from_thumb> + 8f6a: eb01 0002 add\.w r0, r1, r2 + 8f6e: f000 b84f b\.w 9010 <__targetfn_from_thumb> + 8f72: eb01 0002 add\.w r0, r1, r2 + 8f76: f000 b84b b\.w 9010 <__targetfn_from_thumb> + 8f7a: eb01 0002 add\.w r0, r1, r2 + 8f7e: f000 b847 b\.w 9010 <__targetfn_from_thumb> + 8f82: eb01 0002 add\.w r0, r1, r2 + 8f86: f000 b843 b\.w 9010 <__targetfn_from_thumb> + 8f8a: eb01 0002 add\.w r0, r1, r2 + 8f8e: f000 b83f b\.w 9010 <__targetfn_from_thumb> + 8f92: eb01 0002 add\.w r0, r1, r2 + 8f96: f000 b83b b\.w 9010 <__targetfn_from_thumb> + 8f9a: eb01 0002 add\.w r0, r1, r2 + 8f9e: f000 b837 b\.w 9010 <__targetfn_from_thumb> + 8fa2: eb01 0002 add\.w r0, r1, r2 + 8fa6: f000 b833 b\.w 9010 <__targetfn_from_thumb> + 8faa: eb01 0002 add\.w r0, r1, r2 + 8fae: f000 b82f b\.w 9010 <__targetfn_from_thumb> + 8fb2: eb01 0002 add\.w r0, r1, r2 + 8fb6: f000 b82b b\.w 9010 <__targetfn_from_thumb> + 8fba: eb01 0002 add\.w r0, r1, r2 + 8fbe: f000 b827 b\.w 9010 <__targetfn_from_thumb> + 8fc2: eb01 0002 add\.w r0, r1, r2 + 8fc6: f000 b823 b\.w 9010 <__targetfn_from_thumb> + 8fca: eb01 0002 add\.w r0, r1, r2 + 8fce: f000 b81f b\.w 9010 <__targetfn_from_thumb> + 8fd2: eb01 0002 add\.w r0, r1, r2 + 8fd6: f000 b81b b\.w 9010 <__targetfn_from_thumb> + 8fda: eb01 0002 add\.w r0, r1, r2 + 8fde: f000 b817 b\.w 9010 <__targetfn_from_thumb> + 8fe2: eb01 0002 add\.w r0, r1, r2 + 8fe6: f000 b813 b\.w 9010 <__targetfn_from_thumb> + 8fea: eb01 0002 add\.w r0, r1, r2 + 8fee: f000 b80f b\.w 9010 <__targetfn_from_thumb> + 8ff2: eb01 0002 add\.w r0, r1, r2 + 8ff6: f000 b80b b\.w 9010 <__targetfn_from_thumb> + 8ffa: eb01 0002 add\.w r0, r1, r2 + 8ffe: f000 b807 b\.w 9010 <__targetfn_from_thumb> + 9002: eb01 0002 add\.w r0, r1, r2 + 9006: f000 b803 b\.w 9010 <__targetfn_from_thumb> + 900a: 4770 bx lr + 900c: f3af 8000 nop\.w + +00009010 <__targetfn_from_thumb>: + 9010: 4778 bx pc + 9012: 46c0 nop ; \(mov r8, r8\) + 9014: eaffffb9 b 8f00 <targetfn> diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-b-rel-thumb.d b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-b-rel-thumb.d new file mode 100644 index 0000000..60a254b --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-b-rel-thumb.d @@ -0,0 +1,80 @@ + +.*: file format .* + + +Disassembly of section \.text: + +00008f00 <targetfn>: + 8f00: 4770 bx lr + 8f02: bf00 nop + 8f04: f3af 8000 nop\.w + +00008f08 <_start>: + 8f08: bf00 nop + 8f0a: eb01 0002 add\.w r0, r1, r2 + 8f0e: f7ff bff7 b\.w 8f00 <targetfn> + 8f12: eb01 0002 add\.w r0, r1, r2 + 8f16: f7ff bff3 b\.w 8f00 <targetfn> + 8f1a: eb01 0002 add\.w r0, r1, r2 + 8f1e: f7ff bfef b\.w 8f00 <targetfn> + 8f22: eb01 0002 add\.w r0, r1, r2 + 8f26: f7ff bfeb b\.w 8f00 <targetfn> + 8f2a: eb01 0002 add\.w r0, r1, r2 + 8f2e: f7ff bfe7 b\.w 8f00 <targetfn> + 8f32: eb01 0002 add\.w r0, r1, r2 + 8f36: f7ff bfe3 b\.w 8f00 <targetfn> + 8f3a: eb01 0002 add\.w r0, r1, r2 + 8f3e: f7ff bfdf b\.w 8f00 <targetfn> + 8f42: eb01 0002 add\.w r0, r1, r2 + 8f46: f7ff bfdb b\.w 8f00 <targetfn> + 8f4a: eb01 0002 add\.w r0, r1, r2 + 8f4e: f7ff bfd7 b\.w 8f00 <targetfn> + 8f52: eb01 0002 add\.w r0, r1, r2 + 8f56: f7ff bfd3 b\.w 8f00 <targetfn> + 8f5a: eb01 0002 add\.w r0, r1, r2 + 8f5e: f7ff bfcf b\.w 8f00 <targetfn> + 8f62: eb01 0002 add\.w r0, r1, r2 + 8f66: f7ff bfcb b\.w 8f00 <targetfn> + 8f6a: eb01 0002 add\.w r0, r1, r2 + 8f6e: f7ff bfc7 b\.w 8f00 <targetfn> + 8f72: eb01 0002 add\.w r0, r1, r2 + 8f76: f7ff bfc3 b\.w 8f00 <targetfn> + 8f7a: eb01 0002 add\.w r0, r1, r2 + 8f7e: f7ff bfbf b\.w 8f00 <targetfn> + 8f82: eb01 0002 add\.w r0, r1, r2 + 8f86: f7ff bfbb b\.w 8f00 <targetfn> + 8f8a: eb01 0002 add\.w r0, r1, r2 + 8f8e: f7ff bfb7 b\.w 8f00 <targetfn> + 8f92: eb01 0002 add\.w r0, r1, r2 + 8f96: f7ff bfb3 b\.w 8f00 <targetfn> + 8f9a: eb01 0002 add\.w r0, r1, r2 + 8f9e: f7ff bfaf b\.w 8f00 <targetfn> + 8fa2: eb01 0002 add\.w r0, r1, r2 + 8fa6: f7ff bfab b\.w 8f00 <targetfn> + 8faa: eb01 0002 add\.w r0, r1, r2 + 8fae: f7ff bfa7 b\.w 8f00 <targetfn> + 8fb2: eb01 0002 add\.w r0, r1, r2 + 8fb6: f7ff bfa3 b\.w 8f00 <targetfn> + 8fba: eb01 0002 add\.w r0, r1, r2 + 8fbe: f7ff bf9f b\.w 8f00 <targetfn> + 8fc2: eb01 0002 add\.w r0, r1, r2 + 8fc6: f7ff bf9b b\.w 8f00 <targetfn> + 8fca: eb01 0002 add\.w r0, r1, r2 + 8fce: f7ff bf97 b\.w 8f00 <targetfn> + 8fd2: eb01 0002 add\.w r0, r1, r2 + 8fd6: f7ff bf93 b\.w 8f00 <targetfn> + 8fda: eb01 0002 add\.w r0, r1, r2 + 8fde: f7ff bf8f b\.w 8f00 <targetfn> + 8fe2: eb01 0002 add\.w r0, r1, r2 + 8fe6: f7ff bf8b b\.w 8f00 <targetfn> + 8fea: eb01 0002 add\.w r0, r1, r2 + 8fee: f7ff bf87 b\.w 8f00 <targetfn> + 8ff2: eb01 0002 add\.w r0, r1, r2 + 8ff6: f7ff bf83 b\.w 8f00 <targetfn> + 8ffa: eb01 0002 add\.w r0, r1, r2 + 8ffe: f000 b807 b\.w 9010 <_start\+0x108> + 9002: eb01 0002 add\.w r0, r1, r2 + 9006: f7ff bf7b b\.w 8f00 <targetfn> + 900a: 4770 bx lr + 900c: f3af 8000 nop\.w + 9010: f7ff bf76 b\.w 8f00 <targetfn> diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-b-rel.s b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-b-rel.s new file mode 100644 index 0000000..3ec95ab --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-b-rel.s @@ -0,0 +1,41 @@ + .syntax unified + .cpu cortex-a8 + .thumb + .text + + @ expansion 32 bytes + .macro bw1 +1: + add.w r0, r1, r2 + b.w targetfn + add.w r0, r1, r2 + b.w targetfn + add.w r0, r1, r2 + b.w targetfn + add.w r0, r1, r2 + b.w targetfn + .endm + + @ expansion 128 bytes + .macro bw2 + bw1 + bw1 + bw1 + bw1 + .endm + + .align 3 + .global _start + .thumb + .thumb_func + .type _start, %function +_start: + nop + + @ If branching to an ARM destination, we *don't* want to create a + @ Cortex-A8 stub: the Thumb-to-ARM stub will suffice (and we need it + @ to change mode). + bw2 + bw2 + + bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-b.d b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-b.d new file mode 100644 index 0000000..b2d4481 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-b.d @@ -0,0 +1,75 @@ + +.*: file format .* + + +Disassembly of section \.text: + +00008f00 <_start>: + 8f00: bf00 nop + 8f02: eb01 0002 add\.w r0, r1, r2 + 8f06: f7ff bffc b\.w 8f02 <_start\+0x2> + 8f0a: eb01 0002 add\.w r0, r1, r2 + 8f0e: f7ff bff8 b\.w 8f02 <_start\+0x2> + 8f12: eb01 0002 add\.w r0, r1, r2 + 8f16: f7ff bff4 b\.w 8f02 <_start\+0x2> + 8f1a: eb01 0002 add\.w r0, r1, r2 + 8f1e: f7ff bff0 b\.w 8f02 <_start\+0x2> + 8f22: eb01 0002 add\.w r0, r1, r2 + 8f26: f7ff bffc b\.w 8f22 <_start\+0x22> + 8f2a: eb01 0002 add\.w r0, r1, r2 + 8f2e: f7ff bff8 b\.w 8f22 <_start\+0x22> + 8f32: eb01 0002 add\.w r0, r1, r2 + 8f36: f7ff bff4 b\.w 8f22 <_start\+0x22> + 8f3a: eb01 0002 add\.w r0, r1, r2 + 8f3e: f7ff bff0 b\.w 8f22 <_start\+0x22> + 8f42: eb01 0002 add\.w r0, r1, r2 + 8f46: f7ff bffc b\.w 8f42 <_start\+0x42> + 8f4a: eb01 0002 add\.w r0, r1, r2 + 8f4e: f7ff bff8 b\.w 8f42 <_start\+0x42> + 8f52: eb01 0002 add\.w r0, r1, r2 + 8f56: f7ff bff4 b\.w 8f42 <_start\+0x42> + 8f5a: eb01 0002 add\.w r0, r1, r2 + 8f5e: f7ff bff0 b\.w 8f42 <_start\+0x42> + 8f62: eb01 0002 add\.w r0, r1, r2 + 8f66: f7ff bffc b\.w 8f62 <_start\+0x62> + 8f6a: eb01 0002 add\.w r0, r1, r2 + 8f6e: f7ff bff8 b\.w 8f62 <_start\+0x62> + 8f72: eb01 0002 add\.w r0, r1, r2 + 8f76: f7ff bff4 b\.w 8f62 <_start\+0x62> + 8f7a: eb01 0002 add\.w r0, r1, r2 + 8f7e: f7ff bff0 b\.w 8f62 <_start\+0x62> + 8f82: eb01 0002 add\.w r0, r1, r2 + 8f86: f7ff bffc b\.w 8f82 <_start\+0x82> + 8f8a: eb01 0002 add\.w r0, r1, r2 + 8f8e: f7ff bff8 b\.w 8f82 <_start\+0x82> + 8f92: eb01 0002 add\.w r0, r1, r2 + 8f96: f7ff bff4 b\.w 8f82 <_start\+0x82> + 8f9a: eb01 0002 add\.w r0, r1, r2 + 8f9e: f7ff bff0 b\.w 8f82 <_start\+0x82> + 8fa2: eb01 0002 add\.w r0, r1, r2 + 8fa6: f7ff bffc b\.w 8fa2 <_start\+0xa2> + 8faa: eb01 0002 add\.w r0, r1, r2 + 8fae: f7ff bff8 b\.w 8fa2 <_start\+0xa2> + 8fb2: eb01 0002 add\.w r0, r1, r2 + 8fb6: f7ff bff4 b\.w 8fa2 <_start\+0xa2> + 8fba: eb01 0002 add\.w r0, r1, r2 + 8fbe: f7ff bff0 b\.w 8fa2 <_start\+0xa2> + 8fc2: eb01 0002 add\.w r0, r1, r2 + 8fc6: f7ff bffc b\.w 8fc2 <_start\+0xc2> + 8fca: eb01 0002 add\.w r0, r1, r2 + 8fce: f7ff bff8 b\.w 8fc2 <_start\+0xc2> + 8fd2: eb01 0002 add\.w r0, r1, r2 + 8fd6: f7ff bff4 b\.w 8fc2 <_start\+0xc2> + 8fda: eb01 0002 add\.w r0, r1, r2 + 8fde: f7ff bff0 b\.w 8fc2 <_start\+0xc2> + 8fe2: eb01 0002 add\.w r0, r1, r2 + 8fe6: f7ff bffc b\.w 8fe2 <_start\+0xe2> + 8fea: eb01 0002 add\.w r0, r1, r2 + 8fee: f7ff bff8 b\.w 8fe2 <_start\+0xe2> + 8ff2: eb01 0002 add\.w r0, r1, r2 + 8ff6: f7ff bff4 b\.w 8fe2 <_start\+0xe2> + 8ffa: eb01 0002 add\.w r0, r1, r2 + 8ffe: f000 b803 b\.w 9008 <_start\+0x108> + 9002: 4770 bx lr + 9004: f3af 8000 nop\.w + 9008: f7ff bfeb b\.w 8fe2 <_start\+0xe2> diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-b.s b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-b.s new file mode 100644 index 0000000..c0f21ac --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-b.s @@ -0,0 +1,39 @@ + .syntax unified + .cpu cortex-a8 + .thumb + .text + + @ expansion 32 bytes + .macro bw1 +1: + add.w r0, r1, r2 + b.w 1b + add.w r0, r1, r2 + b.w 1b + add.w r0, r1, r2 + b.w 1b + add.w r0, r1, r2 + b.w 1b + .endm + + @ expansion 128 bytes + .macro bw2 + bw1 + bw1 + bw1 + bw1 + .endm + + .align 3 + .global _start + .thumb + .thumb_func + .type _start, %function +_start: + nop + + @ Trigger Cortex-A8 erratum workaround with b instructions. + bw2 + bw2 + + bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bcc-plt.d b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bcc-plt.d new file mode 100644 index 0000000..1e0cab2 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bcc-plt.d @@ -0,0 +1,32 @@ + +.* + + +Disassembly of section \.plt: + +00008000 <\.plt>: + 8000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) + 8004: e59fe004 ldr lr, \[pc, #4\] ; 8010 <foo-0xfe0> + 8008: e08fe00e add lr, pc, lr + 800c: e5bef008 ldr pc, \[lr, #8\]! + 8010: 00001004 \.word 0x00001004 + 8014: 4778 bx pc + 8016: 46c0 nop ; \(mov r8, r8\) + 8018: e28fc600 add ip, pc, #0, 12 + 801c: e28cca01 add ip, ip, #4096 ; 0x1000 + 8020: e5bcf000 ldr pc, \[ip, #0\]! + +Disassembly of section \.text: + +00008ff0 <foo>: + 8ff0: 46c0 nop ; \(mov r8, r8\) + 8ff2: f240 0000 movw r0, #0 + 8ff6: f240 0000 movw r0, #0 + 8ffa: f240 0000 movw r0, #0 + 8ffe: f000 b803 b\.w 9008 <foo\+0x18> + 9002: 0000 movs r0, r0 + 9004: 0000 movs r0, r0 + 9006: 0000 movs r0, r0 + 9008: d001 beq\.n 900e <foo\+0x1e> + 900a: f7ff bffa b\.w 9002 <foo\+0x12> + 900e: f7ff b801 b\.w 8014 <foo-0xfdc> diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bcc-plt.s b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bcc-plt.s new file mode 100644 index 0000000..026fa95 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bcc-plt.s @@ -0,0 +1,10 @@ + .syntax unified + .globl foo + .type foo,%function + .thumb_func +foo: + nop @ 0x00 + movw r0,#0 @ 0x02 + movw r0,#0 @ 0x06 + movw r0,#0 @ 0x0a + beq.w bar(PLT) @ 0x0e diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bcc-rel-thumb.d b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bcc-rel-thumb.d new file mode 100644 index 0000000..27a7fd4 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bcc-rel-thumb.d @@ -0,0 +1,82 @@ + +.*: file format .* + + +Disassembly of section \.text: + +00008f00 <targetfn>: + 8f00: 4770 bx lr + 8f02: bf00 nop + 8f04: f3af 8000 nop\.w + +00008f08 <_start>: + 8f08: bf00 nop + 8f0a: eb01 0002 add\.w r0, r1, r2 + 8f0e: f53f aff7 bmi\.w 8f00 <targetfn> + 8f12: eb01 0002 add\.w r0, r1, r2 + 8f16: f53f aff3 bmi\.w 8f00 <targetfn> + 8f1a: eb01 0002 add\.w r0, r1, r2 + 8f1e: f53f afef bmi\.w 8f00 <targetfn> + 8f22: eb01 0002 add\.w r0, r1, r2 + 8f26: f53f afeb bmi\.w 8f00 <targetfn> + 8f2a: eb01 0002 add\.w r0, r1, r2 + 8f2e: f53f afe7 bmi\.w 8f00 <targetfn> + 8f32: eb01 0002 add\.w r0, r1, r2 + 8f36: f53f afe3 bmi\.w 8f00 <targetfn> + 8f3a: eb01 0002 add\.w r0, r1, r2 + 8f3e: f53f afdf bmi\.w 8f00 <targetfn> + 8f42: eb01 0002 add\.w r0, r1, r2 + 8f46: f53f afdb bmi\.w 8f00 <targetfn> + 8f4a: eb01 0002 add\.w r0, r1, r2 + 8f4e: f53f afd7 bmi\.w 8f00 <targetfn> + 8f52: eb01 0002 add\.w r0, r1, r2 + 8f56: f53f afd3 bmi\.w 8f00 <targetfn> + 8f5a: eb01 0002 add\.w r0, r1, r2 + 8f5e: f53f afcf bmi\.w 8f00 <targetfn> + 8f62: eb01 0002 add\.w r0, r1, r2 + 8f66: f53f afcb bmi\.w 8f00 <targetfn> + 8f6a: eb01 0002 add\.w r0, r1, r2 + 8f6e: f53f afc7 bmi\.w 8f00 <targetfn> + 8f72: eb01 0002 add\.w r0, r1, r2 + 8f76: f53f afc3 bmi\.w 8f00 <targetfn> + 8f7a: eb01 0002 add\.w r0, r1, r2 + 8f7e: f53f afbf bmi\.w 8f00 <targetfn> + 8f82: eb01 0002 add\.w r0, r1, r2 + 8f86: f53f afbb bmi\.w 8f00 <targetfn> + 8f8a: eb01 0002 add\.w r0, r1, r2 + 8f8e: f53f afb7 bmi\.w 8f00 <targetfn> + 8f92: eb01 0002 add\.w r0, r1, r2 + 8f96: f53f afb3 bmi\.w 8f00 <targetfn> + 8f9a: eb01 0002 add\.w r0, r1, r2 + 8f9e: f53f afaf bmi\.w 8f00 <targetfn> + 8fa2: eb01 0002 add\.w r0, r1, r2 + 8fa6: f53f afab bmi\.w 8f00 <targetfn> + 8faa: eb01 0002 add\.w r0, r1, r2 + 8fae: f53f afa7 bmi\.w 8f00 <targetfn> + 8fb2: eb01 0002 add\.w r0, r1, r2 + 8fb6: f53f afa3 bmi\.w 8f00 <targetfn> + 8fba: eb01 0002 add\.w r0, r1, r2 + 8fbe: f53f af9f bmi\.w 8f00 <targetfn> + 8fc2: eb01 0002 add\.w r0, r1, r2 + 8fc6: f53f af9b bmi\.w 8f00 <targetfn> + 8fca: eb01 0002 add\.w r0, r1, r2 + 8fce: f53f af97 bmi\.w 8f00 <targetfn> + 8fd2: eb01 0002 add\.w r0, r1, r2 + 8fd6: f53f af93 bmi\.w 8f00 <targetfn> + 8fda: eb01 0002 add\.w r0, r1, r2 + 8fde: f53f af8f bmi\.w 8f00 <targetfn> + 8fe2: eb01 0002 add\.w r0, r1, r2 + 8fe6: f53f af8b bmi\.w 8f00 <targetfn> + 8fea: eb01 0002 add\.w r0, r1, r2 + 8fee: f53f af87 bmi\.w 8f00 <targetfn> + 8ff2: eb01 0002 add\.w r0, r1, r2 + 8ff6: f53f af83 bmi\.w 8f00 <targetfn> + 8ffa: eb01 0002 add\.w r0, r1, r2 + 8ffe: f000 b807 b\.w 9010 <_start\+0x108> + 9002: eb01 0002 add\.w r0, r1, r2 + 9006: f53f af7b bmi\.w 8f00 <targetfn> + 900a: 4770 bx lr + 900c: f3af 8000 nop\.w + 9010: d401 bmi\.n 9016 <_start\+0x10e> + 9012: f7ff bff6 b\.w 9002 <_start\+0xfa> + 9016: f7ff bf73 b\.w 8f00 <targetfn> diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bcc-rel.s b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bcc-rel.s new file mode 100644 index 0000000..b7b9451 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bcc-rel.s @@ -0,0 +1,38 @@ + .syntax unified + .cpu cortex-a8 + .thumb + .text + + @ expansion 32 bytes + .macro bw1 +1: + add.w r0, r1, r2 + bmi.w targetfn + add.w r0, r1, r2 + bmi.w targetfn + add.w r0, r1, r2 + bmi.w targetfn + add.w r0, r1, r2 + bmi.w targetfn + .endm + + @ expansion 128 bytes + .macro bw2 + bw1 + bw1 + bw1 + bw1 + .endm + + .align 3 + .global _start + .thumb + .thumb_func + .type _start, %function +_start: + nop + + bw2 + bw2 + + bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bcc.d b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bcc.d new file mode 100644 index 0000000..44b8110 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bcc.d @@ -0,0 +1,77 @@ + +.*: file format .* + + +Disassembly of section \.text: + +00008f00 <_start>: + 8f00: bf00 nop + 8f02: eb01 0002 add\.w r0, r1, r2 + 8f06: f4ff affc bcc\.w 8f02 <_start\+0x2> + 8f0a: eb01 0002 add\.w r0, r1, r2 + 8f0e: f4ff aff8 bcc\.w 8f02 <_start\+0x2> + 8f12: eb01 0002 add\.w r0, r1, r2 + 8f16: f4ff aff4 bcc\.w 8f02 <_start\+0x2> + 8f1a: eb01 0002 add\.w r0, r1, r2 + 8f1e: f4ff aff0 bcc\.w 8f02 <_start\+0x2> + 8f22: eb01 0002 add\.w r0, r1, r2 + 8f26: f4ff affc bcc\.w 8f22 <_start\+0x22> + 8f2a: eb01 0002 add\.w r0, r1, r2 + 8f2e: f4ff aff8 bcc\.w 8f22 <_start\+0x22> + 8f32: eb01 0002 add\.w r0, r1, r2 + 8f36: f4ff aff4 bcc\.w 8f22 <_start\+0x22> + 8f3a: eb01 0002 add\.w r0, r1, r2 + 8f3e: f4ff aff0 bcc\.w 8f22 <_start\+0x22> + 8f42: eb01 0002 add\.w r0, r1, r2 + 8f46: f4ff affc bcc\.w 8f42 <_start\+0x42> + 8f4a: eb01 0002 add\.w r0, r1, r2 + 8f4e: f4ff aff8 bcc\.w 8f42 <_start\+0x42> + 8f52: eb01 0002 add\.w r0, r1, r2 + 8f56: f4ff aff4 bcc\.w 8f42 <_start\+0x42> + 8f5a: eb01 0002 add\.w r0, r1, r2 + 8f5e: f4ff aff0 bcc\.w 8f42 <_start\+0x42> + 8f62: eb01 0002 add\.w r0, r1, r2 + 8f66: f4ff affc bcc\.w 8f62 <_start\+0x62> + 8f6a: eb01 0002 add\.w r0, r1, r2 + 8f6e: f4ff aff8 bcc\.w 8f62 <_start\+0x62> + 8f72: eb01 0002 add\.w r0, r1, r2 + 8f76: f4ff aff4 bcc\.w 8f62 <_start\+0x62> + 8f7a: eb01 0002 add\.w r0, r1, r2 + 8f7e: f4ff aff0 bcc\.w 8f62 <_start\+0x62> + 8f82: eb01 0002 add\.w r0, r1, r2 + 8f86: f4ff affc bcc\.w 8f82 <_start\+0x82> + 8f8a: eb01 0002 add\.w r0, r1, r2 + 8f8e: f4ff aff8 bcc\.w 8f82 <_start\+0x82> + 8f92: eb01 0002 add\.w r0, r1, r2 + 8f96: f4ff aff4 bcc\.w 8f82 <_start\+0x82> + 8f9a: eb01 0002 add\.w r0, r1, r2 + 8f9e: f4ff aff0 bcc\.w 8f82 <_start\+0x82> + 8fa2: eb01 0002 add\.w r0, r1, r2 + 8fa6: f4ff affc bcc\.w 8fa2 <_start\+0xa2> + 8faa: eb01 0002 add\.w r0, r1, r2 + 8fae: f4ff aff8 bcc\.w 8fa2 <_start\+0xa2> + 8fb2: eb01 0002 add\.w r0, r1, r2 + 8fb6: f4ff aff4 bcc\.w 8fa2 <_start\+0xa2> + 8fba: eb01 0002 add\.w r0, r1, r2 + 8fbe: f4ff aff0 bcc\.w 8fa2 <_start\+0xa2> + 8fc2: eb01 0002 add\.w r0, r1, r2 + 8fc6: f4ff affc bcc\.w 8fc2 <_start\+0xc2> + 8fca: eb01 0002 add\.w r0, r1, r2 + 8fce: f4ff aff8 bcc\.w 8fc2 <_start\+0xc2> + 8fd2: eb01 0002 add\.w r0, r1, r2 + 8fd6: f4ff aff4 bcc\.w 8fc2 <_start\+0xc2> + 8fda: eb01 0002 add\.w r0, r1, r2 + 8fde: f4ff aff0 bcc\.w 8fc2 <_start\+0xc2> + 8fe2: eb01 0002 add\.w r0, r1, r2 + 8fe6: f4ff affc bcc\.w 8fe2 <_start\+0xe2> + 8fea: eb01 0002 add\.w r0, r1, r2 + 8fee: f4ff aff8 bcc\.w 8fe2 <_start\+0xe2> + 8ff2: eb01 0002 add\.w r0, r1, r2 + 8ff6: f4ff aff4 bcc\.w 8fe2 <_start\+0xe2> + 8ffa: eb01 0002 add\.w r0, r1, r2 + 8ffe: f000 b803 b\.w 9008 <_start\+0x108> + 9002: 4770 bx lr + 9004: f3af 8000 nop\.w + 9008: d301 bcc\.n 900e <_start\+0x10e> + 900a: f7ff bffa b\.w 9002 <_start\+0x102> + 900e: f7ff bfe8 b\.w 8fe2 <_start\+0xe2> diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bcc.s b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bcc.s new file mode 100644 index 0000000..8a667a3 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bcc.s @@ -0,0 +1,39 @@ + .syntax unified + .cpu cortex-a8 + .thumb + .text + + @ expansion 32 bytes + .macro bw1 +1: + add.w r0, r1, r2 + bcc.w 1b + add.w r0, r1, r2 + bcc.w 1b + add.w r0, r1, r2 + bcc.w 1b + add.w r0, r1, r2 + bcc.w 1b + .endm + + @ expansion 128 bytes + .macro bw2 + bw1 + bw1 + bw1 + bw1 + .endm + + .align 3 + .global _start + .thumb + .thumb_func + .type _start, %function +_start: + nop + + @ Trigger Cortex-A8 erratum workaround with conditional branches. + bw2 + bw2 + + bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bl-plt.d b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bl-plt.d new file mode 100644 index 0000000..ebb480f --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bl-plt.d @@ -0,0 +1,28 @@ + +.* + + +Disassembly of section \.plt: + +00008000 <\.plt>: + 8000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) + 8004: e59fe004 ldr lr, \[pc, #4\] ; 8010 <foo-0xfe0> + 8008: e08fe00e add lr, pc, lr + 800c: e5bef008 ldr pc, \[lr, #8\]! + 8010: 00000ffc \.word 0x00000ffc + 8014: e28fc600 add ip, pc, #0, 12 + 8018: e28cca00 add ip, ip, #0, 20 + 801c: e5bcfffc ldr pc, \[ip, #4092\]! ; 0xffc + +Disassembly of section \.text: + +00008ff0 <foo>: + 8ff0: 46c0 nop ; \(mov r8, r8\) + 8ff2: f240 0000 movw r0, #0 + 8ff6: f240 0000 movw r0, #0 + 8ffa: f240 0000 movw r0, #0 + 8ffe: f000 e804 blx 9008 <foo\+0x18> + 9002: 0000 movs r0, r0 + 9004: 0000 movs r0, r0 + 9006: 0000 movs r0, r0 + 9008: eafffc01 b 8014 <foo-0xfdc> diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bl-plt.s b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bl-plt.s new file mode 100644 index 0000000..7f2db05 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bl-plt.s @@ -0,0 +1,10 @@ + .syntax unified + .globl foo + .type foo,%function + .thumb_func +foo: + nop @ 0x00 + movw r0,#0 @ 0x02 + movw r0,#0 @ 0x06 + movw r0,#0 @ 0x0a + bl bar(PLT) @ 0x0e diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-arm.d b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-arm.d new file mode 100644 index 0000000..fcb3bab --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-arm.d @@ -0,0 +1,79 @@ + +.*: file format .* + + +Disassembly of section \.text: + +00008f00 <targetfn>: + 8f00: e12fff1e bx lr + 8f04: e320f000 nop \{0\} + +00008f08 <_start>: + 8f08: bf00 nop + 8f0a: eb01 0002 add\.w r0, r1, r2 + 8f0e: f7ff eff8 blx 8f00 <targetfn> + 8f12: eb01 0002 add\.w r0, r1, r2 + 8f16: f7ff eff4 blx 8f00 <targetfn> + 8f1a: eb01 0002 add\.w r0, r1, r2 + 8f1e: f7ff eff0 blx 8f00 <targetfn> + 8f22: eb01 0002 add\.w r0, r1, r2 + 8f26: f7ff efec blx 8f00 <targetfn> + 8f2a: eb01 0002 add\.w r0, r1, r2 + 8f2e: f7ff efe8 blx 8f00 <targetfn> + 8f32: eb01 0002 add\.w r0, r1, r2 + 8f36: f7ff efe4 blx 8f00 <targetfn> + 8f3a: eb01 0002 add\.w r0, r1, r2 + 8f3e: f7ff efe0 blx 8f00 <targetfn> + 8f42: eb01 0002 add\.w r0, r1, r2 + 8f46: f7ff efdc blx 8f00 <targetfn> + 8f4a: eb01 0002 add\.w r0, r1, r2 + 8f4e: f7ff efd8 blx 8f00 <targetfn> + 8f52: eb01 0002 add\.w r0, r1, r2 + 8f56: f7ff efd4 blx 8f00 <targetfn> + 8f5a: eb01 0002 add\.w r0, r1, r2 + 8f5e: f7ff efd0 blx 8f00 <targetfn> + 8f62: eb01 0002 add\.w r0, r1, r2 + 8f66: f7ff efcc blx 8f00 <targetfn> + 8f6a: eb01 0002 add\.w r0, r1, r2 + 8f6e: f7ff efc8 blx 8f00 <targetfn> + 8f72: eb01 0002 add\.w r0, r1, r2 + 8f76: f7ff efc4 blx 8f00 <targetfn> + 8f7a: eb01 0002 add\.w r0, r1, r2 + 8f7e: f7ff efc0 blx 8f00 <targetfn> + 8f82: eb01 0002 add\.w r0, r1, r2 + 8f86: f7ff efbc blx 8f00 <targetfn> + 8f8a: eb01 0002 add\.w r0, r1, r2 + 8f8e: f7ff efb8 blx 8f00 <targetfn> + 8f92: eb01 0002 add\.w r0, r1, r2 + 8f96: f7ff efb4 blx 8f00 <targetfn> + 8f9a: eb01 0002 add\.w r0, r1, r2 + 8f9e: f7ff efb0 blx 8f00 <targetfn> + 8fa2: eb01 0002 add\.w r0, r1, r2 + 8fa6: f7ff efac blx 8f00 <targetfn> + 8faa: eb01 0002 add\.w r0, r1, r2 + 8fae: f7ff efa8 blx 8f00 <targetfn> + 8fb2: eb01 0002 add\.w r0, r1, r2 + 8fb6: f7ff efa4 blx 8f00 <targetfn> + 8fba: eb01 0002 add\.w r0, r1, r2 + 8fbe: f7ff efa0 blx 8f00 <targetfn> + 8fc2: eb01 0002 add\.w r0, r1, r2 + 8fc6: f7ff ef9c blx 8f00 <targetfn> + 8fca: eb01 0002 add\.w r0, r1, r2 + 8fce: f7ff ef98 blx 8f00 <targetfn> + 8fd2: eb01 0002 add\.w r0, r1, r2 + 8fd6: f7ff ef94 blx 8f00 <targetfn> + 8fda: eb01 0002 add\.w r0, r1, r2 + 8fde: f7ff ef90 blx 8f00 <targetfn> + 8fe2: eb01 0002 add\.w r0, r1, r2 + 8fe6: f7ff ef8c blx 8f00 <targetfn> + 8fea: eb01 0002 add\.w r0, r1, r2 + 8fee: f7ff ef88 blx 8f00 <targetfn> + 8ff2: eb01 0002 add\.w r0, r1, r2 + 8ff6: f7ff ef84 blx 8f00 <targetfn> + 8ffa: eb01 0002 add\.w r0, r1, r2 + 8ffe: f000 e808 blx 9010 <_start\+0x108> + 9002: eb01 0002 add\.w r0, r1, r2 + 9006: f7ff ef7c blx 8f00 <targetfn> + 900a: 4770 bx lr + 900c: f3af 8000 nop\.w + 9010: eaffffba b 8f00 <targetfn> diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-plt.d b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-plt.d new file mode 100644 index 0000000..f8a9c24 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-plt.d @@ -0,0 +1,92 @@ + +.*: file format .* + + +Disassembly of section \.plt: + +00008e00 <\.plt>: + 8e00: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) + 8e04: e59fe004 ldr lr, \[pc, #4\] ; 8e10 <targetfn-0xf0> + 8e08: e08fe00e add lr, pc, lr + 8e0c: e5bef008 ldr pc, \[lr, #8\]! + 8e10: 0000827c \.word 0x0000827c + 8e14: e28fc600 add ip, pc, #0, 12 + 8e18: e28cca08 add ip, ip, #8, 20 ; 0x8000 + 8e1c: e5bcf27c ldr pc, \[ip, #636\]! ; 0x27c + +Disassembly of section \.text: + +00008f00 <targetfn>: + 8f00: 4770 bx lr + 8f02: bf00 nop + 8f04: f3af 8000 nop\.w + +00008f08 <_start>: + 8f08: bf00 nop + 8f0a: eb01 0002 add\.w r0, r1, r2 + 8f0e: f7ff ef82 blx 8e14 <targetfn-0xec> + 8f12: eb01 0002 add\.w r0, r1, r2 + 8f16: f7ff ef7e blx 8e14 <targetfn-0xec> + 8f1a: eb01 0002 add\.w r0, r1, r2 + 8f1e: f7ff ef7a blx 8e14 <targetfn-0xec> + 8f22: eb01 0002 add\.w r0, r1, r2 + 8f26: f7ff ef76 blx 8e14 <targetfn-0xec> + 8f2a: eb01 0002 add\.w r0, r1, r2 + 8f2e: f7ff ef72 blx 8e14 <targetfn-0xec> + 8f32: eb01 0002 add\.w r0, r1, r2 + 8f36: f7ff ef6e blx 8e14 <targetfn-0xec> + 8f3a: eb01 0002 add\.w r0, r1, r2 + 8f3e: f7ff ef6a blx 8e14 <targetfn-0xec> + 8f42: eb01 0002 add\.w r0, r1, r2 + 8f46: f7ff ef66 blx 8e14 <targetfn-0xec> + 8f4a: eb01 0002 add\.w r0, r1, r2 + 8f4e: f7ff ef62 blx 8e14 <targetfn-0xec> + 8f52: eb01 0002 add\.w r0, r1, r2 + 8f56: f7ff ef5e blx 8e14 <targetfn-0xec> + 8f5a: eb01 0002 add\.w r0, r1, r2 + 8f5e: f7ff ef5a blx 8e14 <targetfn-0xec> + 8f62: eb01 0002 add\.w r0, r1, r2 + 8f66: f7ff ef56 blx 8e14 <targetfn-0xec> + 8f6a: eb01 0002 add\.w r0, r1, r2 + 8f6e: f7ff ef52 blx 8e14 <targetfn-0xec> + 8f72: eb01 0002 add\.w r0, r1, r2 + 8f76: f7ff ef4e blx 8e14 <targetfn-0xec> + 8f7a: eb01 0002 add\.w r0, r1, r2 + 8f7e: f7ff ef4a blx 8e14 <targetfn-0xec> + 8f82: eb01 0002 add\.w r0, r1, r2 + 8f86: f7ff ef46 blx 8e14 <targetfn-0xec> + 8f8a: eb01 0002 add\.w r0, r1, r2 + 8f8e: f7ff ef42 blx 8e14 <targetfn-0xec> + 8f92: eb01 0002 add\.w r0, r1, r2 + 8f96: f7ff ef3e blx 8e14 <targetfn-0xec> + 8f9a: eb01 0002 add\.w r0, r1, r2 + 8f9e: f7ff ef3a blx 8e14 <targetfn-0xec> + 8fa2: eb01 0002 add\.w r0, r1, r2 + 8fa6: f7ff ef36 blx 8e14 <targetfn-0xec> + 8faa: eb01 0002 add\.w r0, r1, r2 + 8fae: f7ff ef32 blx 8e14 <targetfn-0xec> + 8fb2: eb01 0002 add\.w r0, r1, r2 + 8fb6: f7ff ef2e blx 8e14 <targetfn-0xec> + 8fba: eb01 0002 add\.w r0, r1, r2 + 8fbe: f7ff ef2a blx 8e14 <targetfn-0xec> + 8fc2: eb01 0002 add\.w r0, r1, r2 + 8fc6: f7ff ef26 blx 8e14 <targetfn-0xec> + 8fca: eb01 0002 add\.w r0, r1, r2 + 8fce: f7ff ef22 blx 8e14 <targetfn-0xec> + 8fd2: eb01 0002 add\.w r0, r1, r2 + 8fd6: f7ff ef1e blx 8e14 <targetfn-0xec> + 8fda: eb01 0002 add\.w r0, r1, r2 + 8fde: f7ff ef1a blx 8e14 <targetfn-0xec> + 8fe2: eb01 0002 add\.w r0, r1, r2 + 8fe6: f7ff ef16 blx 8e14 <targetfn-0xec> + 8fea: eb01 0002 add\.w r0, r1, r2 + 8fee: f7ff ef12 blx 8e14 <targetfn-0xec> + 8ff2: eb01 0002 add\.w r0, r1, r2 + 8ff6: f7ff ef0e blx 8e14 <targetfn-0xec> + 8ffa: eb01 0002 add\.w r0, r1, r2 + 8ffe: f000 e808 blx 9010 <_start\+0x108> + 9002: eb01 0002 add\.w r0, r1, r2 + 9006: f7ff ef06 blx 8e14 <targetfn-0xec> + 900a: 4770 bx lr + 900c: f3af 8000 nop\.w + 9010: eaffff7f b 8e14 <targetfn-0xec> diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-thumb.d b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-thumb.d new file mode 100644 index 0000000..8cbd3e0 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-thumb.d @@ -0,0 +1,80 @@ + +.*: file format .* + + +Disassembly of section \.text: + +00008f00 <targetfn>: + 8f00: 4770 bx lr + 8f02: bf00 nop + 8f04: f3af 8000 nop\.w + +00008f08 <_start>: + 8f08: bf00 nop + 8f0a: eb01 0002 add\.w r0, r1, r2 + 8f0e: f7ff fff7 bl 8f00 <targetfn> + 8f12: eb01 0002 add\.w r0, r1, r2 + 8f16: f7ff fff3 bl 8f00 <targetfn> + 8f1a: eb01 0002 add\.w r0, r1, r2 + 8f1e: f7ff ffef bl 8f00 <targetfn> + 8f22: eb01 0002 add\.w r0, r1, r2 + 8f26: f7ff ffeb bl 8f00 <targetfn> + 8f2a: eb01 0002 add\.w r0, r1, r2 + 8f2e: f7ff ffe7 bl 8f00 <targetfn> + 8f32: eb01 0002 add\.w r0, r1, r2 + 8f36: f7ff ffe3 bl 8f00 <targetfn> + 8f3a: eb01 0002 add\.w r0, r1, r2 + 8f3e: f7ff ffdf bl 8f00 <targetfn> + 8f42: eb01 0002 add\.w r0, r1, r2 + 8f46: f7ff ffdb bl 8f00 <targetfn> + 8f4a: eb01 0002 add\.w r0, r1, r2 + 8f4e: f7ff ffd7 bl 8f00 <targetfn> + 8f52: eb01 0002 add\.w r0, r1, r2 + 8f56: f7ff ffd3 bl 8f00 <targetfn> + 8f5a: eb01 0002 add\.w r0, r1, r2 + 8f5e: f7ff ffcf bl 8f00 <targetfn> + 8f62: eb01 0002 add\.w r0, r1, r2 + 8f66: f7ff ffcb bl 8f00 <targetfn> + 8f6a: eb01 0002 add\.w r0, r1, r2 + 8f6e: f7ff ffc7 bl 8f00 <targetfn> + 8f72: eb01 0002 add\.w r0, r1, r2 + 8f76: f7ff ffc3 bl 8f00 <targetfn> + 8f7a: eb01 0002 add\.w r0, r1, r2 + 8f7e: f7ff ffbf bl 8f00 <targetfn> + 8f82: eb01 0002 add\.w r0, r1, r2 + 8f86: f7ff ffbb bl 8f00 <targetfn> + 8f8a: eb01 0002 add\.w r0, r1, r2 + 8f8e: f7ff ffb7 bl 8f00 <targetfn> + 8f92: eb01 0002 add\.w r0, r1, r2 + 8f96: f7ff ffb3 bl 8f00 <targetfn> + 8f9a: eb01 0002 add\.w r0, r1, r2 + 8f9e: f7ff ffaf bl 8f00 <targetfn> + 8fa2: eb01 0002 add\.w r0, r1, r2 + 8fa6: f7ff ffab bl 8f00 <targetfn> + 8faa: eb01 0002 add\.w r0, r1, r2 + 8fae: f7ff ffa7 bl 8f00 <targetfn> + 8fb2: eb01 0002 add\.w r0, r1, r2 + 8fb6: f7ff ffa3 bl 8f00 <targetfn> + 8fba: eb01 0002 add\.w r0, r1, r2 + 8fbe: f7ff ff9f bl 8f00 <targetfn> + 8fc2: eb01 0002 add\.w r0, r1, r2 + 8fc6: f7ff ff9b bl 8f00 <targetfn> + 8fca: eb01 0002 add\.w r0, r1, r2 + 8fce: f7ff ff97 bl 8f00 <targetfn> + 8fd2: eb01 0002 add\.w r0, r1, r2 + 8fd6: f7ff ff93 bl 8f00 <targetfn> + 8fda: eb01 0002 add\.w r0, r1, r2 + 8fde: f7ff ff8f bl 8f00 <targetfn> + 8fe2: eb01 0002 add\.w r0, r1, r2 + 8fe6: f7ff ff8b bl 8f00 <targetfn> + 8fea: eb01 0002 add\.w r0, r1, r2 + 8fee: f7ff ff87 bl 8f00 <targetfn> + 8ff2: eb01 0002 add\.w r0, r1, r2 + 8ff6: f7ff ff83 bl 8f00 <targetfn> + 8ffa: eb01 0002 add\.w r0, r1, r2 + 8ffe: f000 f807 bl 9010 <_start\+0x108> + 9002: eb01 0002 add\.w r0, r1, r2 + 9006: f7ff ff7b bl 8f00 <targetfn> + 900a: 4770 bx lr + 900c: f3af 8000 nop\.w + 9010: f7ff bf76 b\.w 8f00 <targetfn> diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bl-rel.s b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bl-rel.s new file mode 100644 index 0000000..2d21bbf --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bl-rel.s @@ -0,0 +1,40 @@ + .syntax unified + .cpu cortex-a8 + .thumb + .text + + @ expansion 32 bytes + .macro bw1 +1: + add.w r0, r1, r2 + bl.w targetfn + add.w r0, r1, r2 + bl.w targetfn + add.w r0, r1, r2 + bl.w targetfn + add.w r0, r1, r2 + bl.w targetfn + .endm + + @ expansion 128 bytes + .macro bw2 + bw1 + bw1 + bw1 + bw1 + .endm + + .align 3 + .global _start + .thumb + .thumb_func + .type _start, %function +_start: + nop + + @ If calling an ARM destination, we *don't* want to create a + @ Cortex-A8 stub: the Thumb-to-ARM stub will suffice. + bw2 + bw2 + + bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bl.d b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bl.d new file mode 100644 index 0000000..50dcd4f --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bl.d @@ -0,0 +1,75 @@ + +.*: file format .* + + +Disassembly of section \.text: + +00008f00 <_start>: + 8f00: bf00 nop + 8f02: eb01 0002 add\.w r0, r1, r2 + 8f06: f7ff fffc bl 8f02 <_start\+0x2> + 8f0a: eb01 0002 add\.w r0, r1, r2 + 8f0e: f7ff fff8 bl 8f02 <_start\+0x2> + 8f12: eb01 0002 add\.w r0, r1, r2 + 8f16: f7ff fff4 bl 8f02 <_start\+0x2> + 8f1a: eb01 0002 add\.w r0, r1, r2 + 8f1e: f7ff fff0 bl 8f02 <_start\+0x2> + 8f22: eb01 0002 add\.w r0, r1, r2 + 8f26: f7ff fffc bl 8f22 <_start\+0x22> + 8f2a: eb01 0002 add\.w r0, r1, r2 + 8f2e: f7ff fff8 bl 8f22 <_start\+0x22> + 8f32: eb01 0002 add\.w r0, r1, r2 + 8f36: f7ff fff4 bl 8f22 <_start\+0x22> + 8f3a: eb01 0002 add\.w r0, r1, r2 + 8f3e: f7ff fff0 bl 8f22 <_start\+0x22> + 8f42: eb01 0002 add\.w r0, r1, r2 + 8f46: f7ff fffc bl 8f42 <_start\+0x42> + 8f4a: eb01 0002 add\.w r0, r1, r2 + 8f4e: f7ff fff8 bl 8f42 <_start\+0x42> + 8f52: eb01 0002 add\.w r0, r1, r2 + 8f56: f7ff fff4 bl 8f42 <_start\+0x42> + 8f5a: eb01 0002 add\.w r0, r1, r2 + 8f5e: f7ff fff0 bl 8f42 <_start\+0x42> + 8f62: eb01 0002 add\.w r0, r1, r2 + 8f66: f7ff fffc bl 8f62 <_start\+0x62> + 8f6a: eb01 0002 add\.w r0, r1, r2 + 8f6e: f7ff fff8 bl 8f62 <_start\+0x62> + 8f72: eb01 0002 add\.w r0, r1, r2 + 8f76: f7ff fff4 bl 8f62 <_start\+0x62> + 8f7a: eb01 0002 add\.w r0, r1, r2 + 8f7e: f7ff fff0 bl 8f62 <_start\+0x62> + 8f82: eb01 0002 add\.w r0, r1, r2 + 8f86: f7ff fffc bl 8f82 <_start\+0x82> + 8f8a: eb01 0002 add\.w r0, r1, r2 + 8f8e: f7ff fff8 bl 8f82 <_start\+0x82> + 8f92: eb01 0002 add\.w r0, r1, r2 + 8f96: f7ff fff4 bl 8f82 <_start\+0x82> + 8f9a: eb01 0002 add\.w r0, r1, r2 + 8f9e: f7ff fff0 bl 8f82 <_start\+0x82> + 8fa2: eb01 0002 add\.w r0, r1, r2 + 8fa6: f7ff fffc bl 8fa2 <_start\+0xa2> + 8faa: eb01 0002 add\.w r0, r1, r2 + 8fae: f7ff fff8 bl 8fa2 <_start\+0xa2> + 8fb2: eb01 0002 add\.w r0, r1, r2 + 8fb6: f7ff fff4 bl 8fa2 <_start\+0xa2> + 8fba: eb01 0002 add\.w r0, r1, r2 + 8fbe: f7ff fff0 bl 8fa2 <_start\+0xa2> + 8fc2: eb01 0002 add\.w r0, r1, r2 + 8fc6: f7ff fffc bl 8fc2 <_start\+0xc2> + 8fca: eb01 0002 add\.w r0, r1, r2 + 8fce: f7ff fff8 bl 8fc2 <_start\+0xc2> + 8fd2: eb01 0002 add\.w r0, r1, r2 + 8fd6: f7ff fff4 bl 8fc2 <_start\+0xc2> + 8fda: eb01 0002 add\.w r0, r1, r2 + 8fde: f7ff fff0 bl 8fc2 <_start\+0xc2> + 8fe2: eb01 0002 add\.w r0, r1, r2 + 8fe6: f7ff fffc bl 8fe2 <_start\+0xe2> + 8fea: eb01 0002 add\.w r0, r1, r2 + 8fee: f7ff fff8 bl 8fe2 <_start\+0xe2> + 8ff2: eb01 0002 add\.w r0, r1, r2 + 8ff6: f7ff fff4 bl 8fe2 <_start\+0xe2> + 8ffa: eb01 0002 add\.w r0, r1, r2 + 8ffe: f000 f803 bl 9008 <_start\+0x108> + 9002: 4770 bx lr + 9004: f3af 8000 nop\.w + 9008: f7ff bfeb b\.w 8fe2 <_start\+0xe2> diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bl.s b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bl.s new file mode 100644 index 0000000..6e40fb8 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-bl.s @@ -0,0 +1,39 @@ + .syntax unified + .cpu cortex-a8 + .thumb + .text + + @ expansion 32 bytes + .macro bw1 +1: + add.w r0, r1, r2 + bl.w 1b + add.w r0, r1, r2 + bl.w 1b + add.w r0, r1, r2 + bl.w 1b + add.w r0, r1, r2 + bl.w 1b + .endm + + @ expansion 128 bytes + .macro bw2 + bw1 + bw1 + bw1 + bw1 + .endm + + .align 3 + .global _start + .thumb + .thumb_func + .type _start, %function +_start: + nop + + @ Trigger Cortex-A8 erratum workaround with bl instructions. + bw2 + bw2 + + bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-blx-bcond.d b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-blx-bcond.d new file mode 100644 index 0000000..692a606 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-blx-bcond.d @@ -0,0 +1,1107 @@ + +.*: file format .* + + +Disassembly of section \.text: + +00008f00 <_start>: + 8f00: bf00 nop + 8f02: eb01 0002 add\.w r0, r1, r2 + 8f06: f47f affc bne\.w 8f02 <_start\+0x2> + 8f0a: eb01 0002 add\.w r0, r1, r2 + 8f0e: f47f aff8 bne\.w 8f02 <_start\+0x2> + 8f12: eb01 0002 add\.w r0, r1, r2 + 8f16: f47f aff4 bne\.w 8f02 <_start\+0x2> + 8f1a: eb01 0002 add\.w r0, r1, r2 + 8f1e: f47f aff0 bne\.w 8f02 <_start\+0x2> + 8f22: eb01 0002 add\.w r0, r1, r2 + 8f26: f47f affc bne\.w 8f22 <_start\+0x22> + 8f2a: eb01 0002 add\.w r0, r1, r2 + 8f2e: f47f aff8 bne\.w 8f22 <_start\+0x22> + 8f32: eb01 0002 add\.w r0, r1, r2 + 8f36: f47f aff4 bne\.w 8f22 <_start\+0x22> + 8f3a: eb01 0002 add\.w r0, r1, r2 + 8f3e: f47f aff0 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efc8 blx 9ef8 <arm_target> + 9f6a: eb01 0002 add\.w r0, r1, r2 + 9f6e: f7ff efc4 blx 9ef8 <arm_target> + 9f72: eb01 0002 add\.w r0, r1, r2 + 9f76: f7ff efc0 blx 9ef8 <arm_target> + 9f7a: eb01 0002 add\.w r0, r1, r2 + 9f7e: f7ff efbc blx 9ef8 <arm_target> + 9f82: eb01 0002 add\.w r0, r1, r2 + 9f86: f7ff efb8 blx 9ef8 <arm_target> + 9f8a: eb01 0002 add\.w r0, r1, r2 + 9f8e: f7ff efb4 blx 9ef8 <arm_target> + 9f92: eb01 0002 add\.w r0, r1, r2 + 9f96: f7ff efb0 blx 9ef8 <arm_target> + 9f9a: eb01 0002 add\.w r0, r1, r2 + 9f9e: f7ff efac blx 9ef8 <arm_target> + 9fa2: eb01 0002 add\.w r0, r1, r2 + 9fa6: f7ff efa8 blx 9ef8 <arm_target> + 9faa: eb01 0002 add\.w r0, r1, r2 + 9fae: f7ff efa4 blx 9ef8 <arm_target> + 9fb2: eb01 0002 add\.w r0, r1, r2 + 9fb6: f7ff efa0 blx 9ef8 <arm_target> + 9fba: eb01 0002 add\.w r0, r1, r2 + 9fbe: f7ff ef9c blx 9ef8 <arm_target> + 9fc2: eb01 0002 add\.w r0, r1, r2 + 9fc6: f7ff ef98 blx 9ef8 <arm_target> + 9fca: eb01 0002 add\.w r0, r1, r2 + 9fce: f7ff ef94 blx 9ef8 <arm_target> + 9fd2: eb01 0002 add\.w r0, r1, r2 + 9fd6: f7ff ef90 blx 9ef8 <arm_target> + 9fda: eb01 0002 add\.w r0, r1, r2 + 9fde: f7ff ef8c blx 9ef8 <arm_target> + 9fe2: eb01 0002 add\.w r0, r1, r2 + 9fe6: f7ff ef88 blx 9ef8 <arm_target> + 9fea: eb01 0002 add\.w r0, r1, r2 + 9fee: f7ff ef84 blx 9ef8 <arm_target> + 9ff2: eb01 0002 add\.w r0, r1, r2 + 9ff6: f7ff ef80 blx 9ef8 <arm_target> + 9ffa: eb01 0002 add\.w r0, r1, r2 + 9ffe: f000 e804 blx a008 <bl_insns\+0x108> + a002: 4770 bx lr + a004: f3af 8000 nop\.w + a008: eaffffba b 9ef8 <arm_target> + a00c: d101 bne\.n a012 <bl_insns\+0x112> + a00e: f7fe bff8 b\.w 9002 <_start\+0x102> + a012: f7fe bfe6 b\.w 8fe2 <_start\+0xe2> diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-blx-bcond.s b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-blx-bcond.s new file mode 100644 index 0000000..cb40fb4 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-blx-bcond.s @@ -0,0 +1,81 @@ + .syntax unified + .cpu cortex-a8 + .thumb + .text + + @ expansion 32 bytes + .macro bw1 +1: + add.w r0, r1, r2 + blx.w arm_target + add.w r0, r1, r2 + blx.w arm_target + add.w r0, r1, r2 + blx.w arm_target + add.w r0, r1, r2 + blx.w arm_target + .endm + + @ expansion 128 bytes + .macro bw2 + bw1 + bw1 + bw1 + bw1 + .endm + + @ expansion 32 bytes + .macro bw3 +1: + add.w r0, r1, r2 + bne.w 1b + add.w r0, r1, r2 + bne.w 1b + add.w r0, r1, r2 + bne.w 1b + add.w r0, r1, r2 + bne.w 1b + .endm + + @ expansion 128 bytes + .macro bw4 + bw3 + bw3 + bw3 + bw3 + .endm + + .align 3 + .global _start + + .thumb + .thumb_func + .type _start, %function +_start: + nop + + @ Trigger Cortex-A8 erratum workaround with b<cond> instructions. + bw4 + bw4 + + nop + + .rept 957 + nop.w + .endr + + .arm +arm_target: + add r3, r4, r5 + bx lr + + .thumb +bl_insns: + + nop + + @ ...and again with bl instructions. + bw2 + bw2 + + bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-blx-plt.d b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-blx-plt.d new file mode 100644 index 0000000..ebb480f --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-blx-plt.d @@ -0,0 +1,28 @@ + +.* + + +Disassembly of section \.plt: + +00008000 <\.plt>: + 8000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) + 8004: e59fe004 ldr lr, \[pc, #4\] ; 8010 <foo-0xfe0> + 8008: e08fe00e add lr, pc, lr + 800c: e5bef008 ldr pc, \[lr, #8\]! + 8010: 00000ffc \.word 0x00000ffc + 8014: e28fc600 add ip, pc, #0, 12 + 8018: e28cca00 add ip, ip, #0, 20 + 801c: e5bcfffc ldr pc, \[ip, #4092\]! ; 0xffc + +Disassembly of section \.text: + +00008ff0 <foo>: + 8ff0: 46c0 nop ; \(mov r8, r8\) + 8ff2: f240 0000 movw r0, #0 + 8ff6: f240 0000 movw r0, #0 + 8ffa: f240 0000 movw r0, #0 + 8ffe: f000 e804 blx 9008 <foo\+0x18> + 9002: 0000 movs r0, r0 + 9004: 0000 movs r0, r0 + 9006: 0000 movs r0, r0 + 9008: eafffc01 b 8014 <foo-0xfdc> diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-blx-plt.s b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-blx-plt.s new file mode 100644 index 0000000..1932034 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-blx-plt.s @@ -0,0 +1,10 @@ + .syntax unified + .globl foo + .type foo,%function + .thumb_func +foo: + nop @ 0x00 + movw r0,#0 @ 0x02 + movw r0,#0 @ 0x06 + movw r0,#0 @ 0x0a + blx bar @ 0x0e diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-blx-rel-arm.d b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-blx-rel-arm.d new file mode 100644 index 0000000..fcb3bab --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-blx-rel-arm.d @@ -0,0 +1,79 @@ + +.*: file format .* + + +Disassembly of section \.text: + +00008f00 <targetfn>: + 8f00: e12fff1e bx lr + 8f04: e320f000 nop \{0\} + +00008f08 <_start>: + 8f08: bf00 nop + 8f0a: eb01 0002 add\.w r0, r1, r2 + 8f0e: f7ff eff8 blx 8f00 <targetfn> + 8f12: eb01 0002 add\.w r0, r1, r2 + 8f16: f7ff eff4 blx 8f00 <targetfn> + 8f1a: eb01 0002 add\.w r0, r1, r2 + 8f1e: f7ff eff0 blx 8f00 <targetfn> + 8f22: eb01 0002 add\.w r0, r1, r2 + 8f26: f7ff efec blx 8f00 <targetfn> + 8f2a: eb01 0002 add\.w r0, r1, r2 + 8f2e: f7ff efe8 blx 8f00 <targetfn> + 8f32: eb01 0002 add\.w r0, r1, r2 + 8f36: f7ff efe4 blx 8f00 <targetfn> + 8f3a: eb01 0002 add\.w r0, r1, r2 + 8f3e: f7ff efe0 blx 8f00 <targetfn> + 8f42: eb01 0002 add\.w r0, r1, r2 + 8f46: f7ff efdc blx 8f00 <targetfn> + 8f4a: eb01 0002 add\.w r0, r1, r2 + 8f4e: f7ff efd8 blx 8f00 <targetfn> + 8f52: eb01 0002 add\.w r0, r1, r2 + 8f56: f7ff efd4 blx 8f00 <targetfn> + 8f5a: eb01 0002 add\.w r0, r1, r2 + 8f5e: f7ff efd0 blx 8f00 <targetfn> + 8f62: eb01 0002 add\.w r0, r1, r2 + 8f66: f7ff efcc blx 8f00 <targetfn> + 8f6a: eb01 0002 add\.w r0, r1, r2 + 8f6e: f7ff efc8 blx 8f00 <targetfn> + 8f72: eb01 0002 add\.w r0, r1, r2 + 8f76: f7ff efc4 blx 8f00 <targetfn> + 8f7a: eb01 0002 add\.w r0, r1, r2 + 8f7e: f7ff efc0 blx 8f00 <targetfn> + 8f82: eb01 0002 add\.w r0, r1, r2 + 8f86: f7ff efbc blx 8f00 <targetfn> + 8f8a: eb01 0002 add\.w r0, r1, r2 + 8f8e: f7ff efb8 blx 8f00 <targetfn> + 8f92: eb01 0002 add\.w r0, r1, r2 + 8f96: f7ff efb4 blx 8f00 <targetfn> + 8f9a: eb01 0002 add\.w r0, r1, r2 + 8f9e: f7ff efb0 blx 8f00 <targetfn> + 8fa2: eb01 0002 add\.w r0, r1, r2 + 8fa6: f7ff efac blx 8f00 <targetfn> + 8faa: eb01 0002 add\.w r0, r1, r2 + 8fae: f7ff efa8 blx 8f00 <targetfn> + 8fb2: eb01 0002 add\.w r0, r1, r2 + 8fb6: f7ff efa4 blx 8f00 <targetfn> + 8fba: eb01 0002 add\.w r0, r1, r2 + 8fbe: f7ff efa0 blx 8f00 <targetfn> + 8fc2: eb01 0002 add\.w r0, r1, r2 + 8fc6: f7ff ef9c blx 8f00 <targetfn> + 8fca: eb01 0002 add\.w r0, r1, r2 + 8fce: f7ff ef98 blx 8f00 <targetfn> + 8fd2: eb01 0002 add\.w r0, r1, r2 + 8fd6: f7ff ef94 blx 8f00 <targetfn> + 8fda: eb01 0002 add\.w r0, r1, r2 + 8fde: f7ff ef90 blx 8f00 <targetfn> + 8fe2: eb01 0002 add\.w r0, r1, r2 + 8fe6: f7ff ef8c blx 8f00 <targetfn> + 8fea: eb01 0002 add\.w r0, r1, r2 + 8fee: f7ff ef88 blx 8f00 <targetfn> + 8ff2: eb01 0002 add\.w r0, r1, r2 + 8ff6: f7ff ef84 blx 8f00 <targetfn> + 8ffa: eb01 0002 add\.w r0, r1, r2 + 8ffe: f000 e808 blx 9010 <_start\+0x108> + 9002: eb01 0002 add\.w r0, r1, r2 + 9006: f7ff ef7c blx 8f00 <targetfn> + 900a: 4770 bx lr + 900c: f3af 8000 nop\.w + 9010: eaffffba b 8f00 <targetfn> diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-blx-rel-thumb.d b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-blx-rel-thumb.d new file mode 100644 index 0000000..8cbd3e0 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-blx-rel-thumb.d @@ -0,0 +1,80 @@ + +.*: file format .* + + +Disassembly of section \.text: + +00008f00 <targetfn>: + 8f00: 4770 bx lr + 8f02: bf00 nop + 8f04: f3af 8000 nop\.w + +00008f08 <_start>: + 8f08: bf00 nop + 8f0a: eb01 0002 add\.w r0, r1, r2 + 8f0e: f7ff fff7 bl 8f00 <targetfn> + 8f12: eb01 0002 add\.w r0, r1, r2 + 8f16: f7ff fff3 bl 8f00 <targetfn> + 8f1a: eb01 0002 add\.w r0, r1, r2 + 8f1e: f7ff ffef bl 8f00 <targetfn> + 8f22: eb01 0002 add\.w r0, r1, r2 + 8f26: f7ff ffeb bl 8f00 <targetfn> + 8f2a: eb01 0002 add\.w r0, r1, r2 + 8f2e: f7ff ffe7 bl 8f00 <targetfn> + 8f32: eb01 0002 add\.w r0, r1, r2 + 8f36: f7ff ffe3 bl 8f00 <targetfn> + 8f3a: eb01 0002 add\.w r0, r1, r2 + 8f3e: f7ff ffdf bl 8f00 <targetfn> + 8f42: eb01 0002 add\.w r0, r1, r2 + 8f46: f7ff ffdb bl 8f00 <targetfn> + 8f4a: eb01 0002 add\.w r0, r1, r2 + 8f4e: f7ff ffd7 bl 8f00 <targetfn> + 8f52: eb01 0002 add\.w r0, r1, r2 + 8f56: f7ff ffd3 bl 8f00 <targetfn> + 8f5a: eb01 0002 add\.w r0, r1, r2 + 8f5e: f7ff ffcf bl 8f00 <targetfn> + 8f62: eb01 0002 add\.w r0, r1, r2 + 8f66: f7ff ffcb bl 8f00 <targetfn> + 8f6a: eb01 0002 add\.w r0, r1, r2 + 8f6e: f7ff ffc7 bl 8f00 <targetfn> + 8f72: eb01 0002 add\.w r0, r1, r2 + 8f76: f7ff ffc3 bl 8f00 <targetfn> + 8f7a: eb01 0002 add\.w r0, r1, r2 + 8f7e: f7ff ffbf bl 8f00 <targetfn> + 8f82: eb01 0002 add\.w r0, r1, r2 + 8f86: f7ff ffbb bl 8f00 <targetfn> + 8f8a: eb01 0002 add\.w r0, r1, r2 + 8f8e: f7ff ffb7 bl 8f00 <targetfn> + 8f92: eb01 0002 add\.w r0, r1, r2 + 8f96: f7ff ffb3 bl 8f00 <targetfn> + 8f9a: eb01 0002 add\.w r0, r1, r2 + 8f9e: f7ff ffaf bl 8f00 <targetfn> + 8fa2: eb01 0002 add\.w r0, r1, r2 + 8fa6: f7ff ffab bl 8f00 <targetfn> + 8faa: eb01 0002 add\.w r0, r1, r2 + 8fae: f7ff ffa7 bl 8f00 <targetfn> + 8fb2: eb01 0002 add\.w r0, r1, r2 + 8fb6: f7ff ffa3 bl 8f00 <targetfn> + 8fba: eb01 0002 add\.w r0, r1, r2 + 8fbe: f7ff ff9f bl 8f00 <targetfn> + 8fc2: eb01 0002 add\.w r0, r1, r2 + 8fc6: f7ff ff9b bl 8f00 <targetfn> + 8fca: eb01 0002 add\.w r0, r1, r2 + 8fce: f7ff ff97 bl 8f00 <targetfn> + 8fd2: eb01 0002 add\.w r0, r1, r2 + 8fd6: f7ff ff93 bl 8f00 <targetfn> + 8fda: eb01 0002 add\.w r0, r1, r2 + 8fde: f7ff ff8f bl 8f00 <targetfn> + 8fe2: eb01 0002 add\.w r0, r1, r2 + 8fe6: f7ff ff8b bl 8f00 <targetfn> + 8fea: eb01 0002 add\.w r0, r1, r2 + 8fee: f7ff ff87 bl 8f00 <targetfn> + 8ff2: eb01 0002 add\.w r0, r1, r2 + 8ff6: f7ff ff83 bl 8f00 <targetfn> + 8ffa: eb01 0002 add\.w r0, r1, r2 + 8ffe: f000 f807 bl 9010 <_start\+0x108> + 9002: eb01 0002 add\.w r0, r1, r2 + 9006: f7ff ff7b bl 8f00 <targetfn> + 900a: 4770 bx lr + 900c: f3af 8000 nop\.w + 9010: f7ff bf76 b\.w 8f00 <targetfn> diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-blx-rel.s b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-blx-rel.s new file mode 100644 index 0000000..efbfb4b --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-blx-rel.s @@ -0,0 +1,38 @@ + .syntax unified + .cpu cortex-a8 + .thumb + .text + + @ expansion 32 bytes + .macro bw1 +1: + add.w r0, r1, r2 + blx.w targetfn + add.w r0, r1, r2 + blx.w targetfn + add.w r0, r1, r2 + blx.w targetfn + add.w r0, r1, r2 + blx.w targetfn + .endm + + @ expansion 128 bytes + .macro bw2 + bw1 + bw1 + bw1 + bw1 + .endm + + .align 3 + .global _start + .thumb + .thumb_func + .type _start, %function +_start: + nop + + bw2 + bw2 + + bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-blx.d b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-blx.d new file mode 100644 index 0000000..4805256 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-blx.d @@ -0,0 +1,79 @@ + +.*: file format .* + + +Disassembly of section \.text: + +00008f00 <armfn>: + 8f00: e1a02413 lsl r2, r3, r4 + 8f04: e12fff1e bx lr + +00008f08 <_start>: + 8f08: bf00 nop + 8f0a: eb01 0002 add\.w r0, r1, r2 + 8f0e: f7ff eff8 blx 8f00 <armfn> + 8f12: eb01 0002 add\.w r0, r1, r2 + 8f16: f7ff eff4 blx 8f00 <armfn> + 8f1a: eb01 0002 add\.w r0, r1, r2 + 8f1e: f7ff eff0 blx 8f00 <armfn> + 8f22: eb01 0002 add\.w r0, r1, r2 + 8f26: f7ff efec blx 8f00 <armfn> + 8f2a: eb01 0002 add\.w r0, r1, r2 + 8f2e: f7ff efe8 blx 8f00 <armfn> + 8f32: eb01 0002 add\.w r0, r1, r2 + 8f36: f7ff efe4 blx 8f00 <armfn> + 8f3a: eb01 0002 add\.w r0, r1, r2 + 8f3e: f7ff efe0 blx 8f00 <armfn> + 8f42: eb01 0002 add\.w r0, r1, r2 + 8f46: f7ff efdc blx 8f00 <armfn> + 8f4a: eb01 0002 add\.w r0, r1, r2 + 8f4e: f7ff efd8 blx 8f00 <armfn> + 8f52: eb01 0002 add\.w r0, r1, r2 + 8f56: f7ff efd4 blx 8f00 <armfn> + 8f5a: eb01 0002 add\.w r0, r1, r2 + 8f5e: f7ff efd0 blx 8f00 <armfn> + 8f62: eb01 0002 add\.w r0, r1, r2 + 8f66: f7ff efcc blx 8f00 <armfn> + 8f6a: eb01 0002 add\.w r0, r1, r2 + 8f6e: f7ff efc8 blx 8f00 <armfn> + 8f72: eb01 0002 add\.w r0, r1, r2 + 8f76: f7ff efc4 blx 8f00 <armfn> + 8f7a: eb01 0002 add\.w r0, r1, r2 + 8f7e: f7ff efc0 blx 8f00 <armfn> + 8f82: eb01 0002 add\.w r0, r1, r2 + 8f86: f7ff efbc blx 8f00 <armfn> + 8f8a: eb01 0002 add\.w r0, r1, r2 + 8f8e: f7ff efb8 blx 8f00 <armfn> + 8f92: eb01 0002 add\.w r0, r1, r2 + 8f96: f7ff efb4 blx 8f00 <armfn> + 8f9a: eb01 0002 add\.w r0, r1, r2 + 8f9e: f7ff efb0 blx 8f00 <armfn> + 8fa2: eb01 0002 add\.w r0, r1, r2 + 8fa6: f7ff efac blx 8f00 <armfn> + 8faa: eb01 0002 add\.w r0, r1, r2 + 8fae: f7ff efa8 blx 8f00 <armfn> + 8fb2: eb01 0002 add\.w r0, r1, r2 + 8fb6: f7ff efa4 blx 8f00 <armfn> + 8fba: eb01 0002 add\.w r0, r1, r2 + 8fbe: f7ff efa0 blx 8f00 <armfn> + 8fc2: eb01 0002 add\.w r0, r1, r2 + 8fc6: f7ff ef9c blx 8f00 <armfn> + 8fca: eb01 0002 add\.w r0, r1, r2 + 8fce: f7ff ef98 blx 8f00 <armfn> + 8fd2: eb01 0002 add\.w r0, r1, r2 + 8fd6: f7ff ef94 blx 8f00 <armfn> + 8fda: eb01 0002 add\.w r0, r1, r2 + 8fde: f7ff ef90 blx 8f00 <armfn> + 8fe2: eb01 0002 add\.w r0, r1, r2 + 8fe6: f7ff ef8c blx 8f00 <armfn> + 8fea: eb01 0002 add\.w r0, r1, r2 + 8fee: f7ff ef88 blx 8f00 <armfn> + 8ff2: eb01 0002 add\.w r0, r1, r2 + 8ff6: f7ff ef84 blx 8f00 <armfn> + 8ffa: eb01 0002 add\.w r0, r1, r2 + 8ffe: f000 e808 blx 9010 <_start\+0x108> + 9002: eb01 0002 add\.w r0, r1, r2 + 9006: f7ff ef7c blx 8f00 <armfn> + 900a: 4770 bx lr + 900c: f3af 8000 nop\.w + 9010: eaffffba b 8f00 <armfn> diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-blx.s b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-blx.s new file mode 100644 index 0000000..5d74024 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-blx.s @@ -0,0 +1,44 @@ + .syntax unified + .cpu cortex-a8 + .text + + @ expansion 32 bytes + .macro bw1 + add.w r0, r1, r2 + blx.w armfn + add.w r0, r1, r2 + blx.w armfn + add.w r0, r1, r2 + blx.w armfn + add.w r0, r1, r2 + blx.w armfn + .endm + + @ expansion 128 bytes + .macro bw2 + bw1 + bw1 + bw1 + bw1 + .endm + + .arm + .align 2 +armfn: + mov r2, r3, asl r4 + bx lr + + .global _start + + .thumb + .thumb_func + .align 3 + .type _start, %function +_start: + nop + + @ Trigger Cortex-A8 erratum workaround with blx instructions. + bw2 + bw2 + + bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-hdr.d b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-hdr.d new file mode 100644 index 0000000..027d2a1 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-hdr.d @@ -0,0 +1,24 @@ + +.*: file format .* + + +Disassembly of section \.text: + +00000fe0 <_start>: + fe0: bf00 nop + fe2: bf00 nop + fe4: bf00 nop + fe6: bf00 nop + fe8: bf00 nop + fea: bf00 nop + fec: bf00 nop + fee: bf00 nop + ff0: bf00 nop + ff2: bf00 nop + ff4: bf00 nop + ff6: bf00 nop + ff8: bf00 nop + ffa: ea81 0002 eor.w r0, r1, r2 + ffe: f000 b80f b.w 1020 <_start\+0x40> +#... + 1020: f7ff bfde b.w fe0 <_start> diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-hdr.s b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-hdr.s new file mode 100644 index 0000000..827c0f8 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-hdr.s @@ -0,0 +1,14 @@ + .syntax unified + + .section .text, "ax" + + .align 5 + .globl _start + .thumb_func +_start: + .rept 13 + nop + .endr + eor r0, r1, r2 + b.w _start + diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-hdr.t b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-hdr.t new file mode 100644 index 0000000..d3afacb --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-hdr.t @@ -0,0 +1,10 @@ + + +SECTIONS { + . = SIZEOF_HEADERS; + . += 0xf80; + .text : { + *(.text) + } = 0 + /DISCARD/ : { *(*) } +} diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-plt.ld b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-plt.ld new file mode 100644 index 0000000..3103f67 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-fix-plt.ld @@ -0,0 +1,18 @@ +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x07000; + .hash : { *(.hash) } + .gnu.hash : { *(.gnu.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.dyn : { *(.rel.dyn) } + .rel.plt : { *(.rel.plt) } + . = 0x08000; + .plt : { *(.plt) } + . = 0x08ff0; + .text : { *(.text) } + . = 0x10000; + .dynamic : { *(.dynamic) } +} diff --git a/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-thumb-target.s b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-thumb-target.s new file mode 100644 index 0000000..96c180f --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/cortex-a8-thumb-target.s @@ -0,0 +1,10 @@ + .syntax unified + .cpu cortex-a8 + .text + .thumb + .thumb_func + .align 3 + .global targetfn + .type targetfn, %function +targetfn: + bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/data-only-map.d b/binutils-2.24/ld/testsuite/ld-arm/data-only-map.d new file mode 100644 index 0000000..706e709 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/data-only-map.d @@ -0,0 +1,13 @@ + +[^:]*: file format elf32-littlearm.* + + +Disassembly of section \.text: + +00000000 <_start>: + 0: eb01 0002 add\.w r0, r1, r2 + 4: eb010002 \.word 0xeb010002 + 8: eb01 0002 add\.w r0, r1, r2 + c: eb01 0200 add\.w r2, r1, r0 + 10: eb010002 \.word 0xeb010002 + 14: eb010002 \.word 0xeb010002 diff --git a/binutils-2.24/ld/testsuite/ld-arm/data-only-map.ld b/binutils-2.24/ld/testsuite/ld-arm/data-only-map.ld new file mode 100644 index 0000000..7d6ea92 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/data-only-map.ld @@ -0,0 +1,16 @@ +/* Script for ld testsuite */ +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + .text : + { + *(.text) + *(.after1) + *(.after2) + *(.after3) + *(.after4) + *(.after5) + } =0 +} + diff --git a/binutils-2.24/ld/testsuite/ld-arm/data-only-map.s b/binutils-2.24/ld/testsuite/ld-arm/data-only-map.s new file mode 100644 index 0000000..0c5e797 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/data-only-map.s @@ -0,0 +1,20 @@ +.syntax unified +.thumb +.global _start +_start: +add.w r0, r1, r2 + +.section .after1 +.word 0xeb010002 + +.section .after2 +add.w r0, r1, r2 + +.section .after3 +add.w r2, r1, r0 + +.section .after4 +.word 0xeb010002 + +.section .after5 +.word 0xeb010002 diff --git a/binutils-2.24/ld/testsuite/ld-arm/discard-unwind.ld b/binutils-2.24/ld/testsuite/ld-arm/discard-unwind.ld new file mode 100644 index 0000000..d8f6524 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/discard-unwind.ld @@ -0,0 +1,19 @@ +/* Script for ld testsuite */ +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + PROVIDE (__executable_start = 0x8000); . = 0x8000; + .text : + { + *(.before) + *(.text) + *(.after) + *(.ARM.extab*) + *(.glue_7) + *(.v4_bx) + } =0 + /DISCARD/ : { *(.ARM.exidx*) } + .ARM.attribues 0 : { *(.ARM.atttributes) } +} diff --git a/binutils-2.24/ld/testsuite/ld-arm/eabi-hard-float.d b/binutils-2.24/ld/testsuite/ld-arm/eabi-hard-float.d new file mode 100644 index 0000000..bc8cc3f --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/eabi-hard-float.d @@ -0,0 +1,12 @@ +#source: eabi-hard-float.s +#as: +#ld: -r +#readelf: -h +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* +# Check that we set the hard-float ABI flag directly + +ELF Header: +#... + Flags: 0x5000400, Version5 EABI, hard-float ABI +#... diff --git a/binutils-2.24/ld/testsuite/ld-arm/eabi-hard-float.s b/binutils-2.24/ld/testsuite/ld-arm/eabi-hard-float.s new file mode 100644 index 0000000..3d49794 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/eabi-hard-float.s @@ -0,0 +1,9 @@ + .cpu cortex-a9 + .fpu vfpv3 + .eabi_attribute Tag_ABI_VFP_args, 1 + .file "eabi-hard-float.s" + .globl _start + .type _start,%function +_start: + .size _start,.-_start + diff --git a/binutils-2.24/ld/testsuite/ld-arm/eabi-soft-float-ABI4.d b/binutils-2.24/ld/testsuite/ld-arm/eabi-soft-float-ABI4.d new file mode 100644 index 0000000..1804826 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/eabi-soft-float-ABI4.d @@ -0,0 +1,12 @@ +#source: eabi-soft-float.s +#as: +#ld: -r +#readelf: -h +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* +# if we compile for EABI ver4, ld should *not* set either of the float ABI flags + +ELF Header: +#... + Flags: 0x4000000, Version4 EABI +#... diff --git a/binutils-2.24/ld/testsuite/ld-arm/eabi-soft-float-r.d b/binutils-2.24/ld/testsuite/ld-arm/eabi-soft-float-r.d new file mode 100644 index 0000000..262d482 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/eabi-soft-float-r.d @@ -0,0 +1,12 @@ +#source: eabi-soft-float.s +#as: +#ld: -r +#readelf: -h +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* +# if we call "ld -r", it should *not* set either of the float ABI flags + +ELF Header: +#... + Flags: 0x5000000, Version5 EABI +#... diff --git a/binutils-2.24/ld/testsuite/ld-arm/eabi-soft-float.d b/binutils-2.24/ld/testsuite/ld-arm/eabi-soft-float.d new file mode 100644 index 0000000..6cc7086 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/eabi-soft-float.d @@ -0,0 +1,12 @@ +#source: eabi-soft-float.s +#as: +#ld: -r +#readelf: -h +# This test is only valid on ELF based ports. +# not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* +# Check that we set the soft-float ABI flag directly + +ELF Header: +#... + Flags: 0x5000200, Version5 EABI, soft-float ABI +#... diff --git a/binutils-2.24/ld/testsuite/ld-arm/eabi-soft-float.s b/binutils-2.24/ld/testsuite/ld-arm/eabi-soft-float.s new file mode 100644 index 0000000..f23fb17 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/eabi-soft-float.s @@ -0,0 +1,8 @@ + .cpu cortex-a9 + .fpu vfpv3 + .eabi_attribute Tag_ABI_VFP_args, 0 + .file "eabi-soft-float.s" + .globl _start + .type _start,%function +_start: + .size _start,.-_start diff --git a/binutils-2.24/ld/testsuite/ld-arm/emit-relocs1-vxworks.d b/binutils-2.24/ld/testsuite/ld-arm/emit-relocs1-vxworks.d new file mode 100644 index 0000000..2ea2e9a --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/emit-relocs1-vxworks.d @@ -0,0 +1,12 @@ +#source: emit-relocs1.s +#ld: -Ttext 0x10000 --defsym target=0xc000 -e0 --emit-relocs +#objdump: -dr +#... + +10000: e1a00000 nop .* + +10004: e1a00000 nop .* + +10008: e1a00000 nop .* + +1000c: e1a00000 nop .* + +10010: eaffeffa b c000 <target> + +10010: R_ARM_PC24 target-0x8 + +10014: eaffeffd b c010 <target\+0x10> + +10014: R_ARM_PC24 target\+0x8 diff --git a/binutils-2.24/ld/testsuite/ld-arm/emit-relocs1.d b/binutils-2.24/ld/testsuite/ld-arm/emit-relocs1.d new file mode 100644 index 0000000..191cb52 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/emit-relocs1.d @@ -0,0 +1,12 @@ +#source: emit-relocs1.s +#ld: -Ttext 0x10000 --defsym target=0xc000 -e0 --emit-relocs +#objdump: -dr +#... + +10000: e1a00000 nop .* + +10004: e1a00000 nop .* + +10008: e1a00000 nop .* + +1000c: e1a00000 nop .* + +10010: eaffeffa b c000 <target> + +10010: R_ARM_(JUMP|PC)24 target + +10014: eaffeffd b c010 <target\+0x10> + +10014: R_ARM_(JUMP|PC)24 target diff --git a/binutils-2.24/ld/testsuite/ld-arm/emit-relocs1.s b/binutils-2.24/ld/testsuite/ld-arm/emit-relocs1.s new file mode 100644 index 0000000..8971d4d --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/emit-relocs1.s @@ -0,0 +1,6 @@ + nop + nop + nop + nop + b target + b target+16 diff --git a/binutils-2.24/ld/testsuite/ld-arm/exec-got-1.d b/binutils-2.24/ld/testsuite/ld-arm/exec-got-1.d new file mode 100644 index 0000000..af067d3 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/exec-got-1.d @@ -0,0 +1,4 @@ + +Relocation section '\.rel\.dyn' .* + Offset .* +.* R_ARM_GLOB_DAT * 00000000 * foo diff --git a/binutils-2.24/ld/testsuite/ld-arm/exec-got-1a.s b/binutils-2.24/ld/testsuite/ld-arm/exec-got-1a.s new file mode 100644 index 0000000..6a7637c --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/exec-got-1a.s @@ -0,0 +1,5 @@ + .globl foo + .type foo,%object + .size foo,4 + .data +foo: .word 1 diff --git a/binutils-2.24/ld/testsuite/ld-arm/exec-got-1b.s b/binutils-2.24/ld/testsuite/ld-arm/exec-got-1b.s new file mode 100644 index 0000000..71546d7 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/exec-got-1b.s @@ -0,0 +1,10 @@ + .globl _start + .type _start,%function +_start: + ldr r1,1f + ldr r1,2f +1: + .word foo(GOT) +2: + .word _start(GOT) + .size _start,.-_start diff --git a/binutils-2.24/ld/testsuite/ld-arm/export-class.exp b/binutils-2.24/ld/testsuite/ld-arm/export-class.exp new file mode 100644 index 0000000..8fac9ec --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/export-class.exp @@ -0,0 +1,86 @@ +# Expect script for symbol export classes, ARM variation. +# +# Copyright 2012 Free Software Foundation, Inc. +# +# This file is part of the GNU Binutils. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, +# MA 02110-1301, USA. +# + +# +# Written by Maciej W. Rozycki <macro@codesourcery.com> +# + +# Exclude non-Linux targets; feel free to include your favorite one +# if you like. +if { ![istarget arm*-*-linux*] } { + return +} + +set testname "ARM symbol export class test" + +if [istarget arm*-*-linux-*eabi*] { + set emul armelf_linux_eabi +} else { + set emul armelf_linux +} + +# Build an auxiliary shared object with conflicting versioned symbol +# definitions. +run_ld_link_tests [list \ + [list \ + "$testname (auxiliary shared object)" \ + "-m$emul -shared -version-script ../ld-elf/export-class-lib.ver" "" \ + "-EL" \ + { ../ld-elf/export-class-lib.s } \ + {} \ + "arm-export-class-lib.so" \ + ] \ +] + +# Build a static object that pulls symbol definitions. It has to come +# first before the auxiliary shared object and other static objects on +# the linker's command line and hence we need to build it separately. +run_ld_link_tests [list \ + [list \ + "$testname (initial static object)" \ + "-m$emul -r" "" \ + "-EL" \ + { ../ld-elf/export-class-ref.s } \ + {} \ + "arm-export-class-ref-r.o" \ + ] \ +] + +# Build static objects that satisfy symbol dependencies and preempt +# shared-object symbol definitions, and link all the objects built into +# the final shared object. The command-line order of objects linked is +# important to make sure the linker correctly preempts versioned symbols +# from the auxiliary shared object and is as follows: ref, lib, dep, def. +# Get a dump to make sure symbol dependencies are resolved internally. +run_ld_link_tests [list \ + [list \ + "$testname (final shared object)" \ + "-m$emul -shared -Tdata=0x12340000 tmpdir/arm-export-class-ref-r.o tmpdir/arm-export-class-lib.so" "" \ + "-EL" \ + { ../ld-elf/export-class-dep.s ../ld-elf/export-class-def.s } \ + { \ + { readelf -r arm-export-class.rd } \ + { readelf "-x .data" arm-export-class.xd } \ + } \ + "arm-export-class.so" \ + ] \ +] diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-arm-arm-pic-veneer.d b/binutils-2.24/ld/testsuite/ld-arm/farcall-arm-arm-pic-veneer.d new file mode 100644 index 0000000..881a0ae --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-arm-arm-pic-veneer.d @@ -0,0 +1,17 @@ +.*: file format .* + +Disassembly of section .text: + +00001000 <_start>: + 1000: eb000000 bl 1008 <__bar_veneer> + 1004: 00000000 andeq r0, r0, r0 + +00001008 <__bar_veneer>: + 1008: e59fc000 ldr ip, \[pc\] ; 1010 <__bar_veneer\+0x8> + 100c: e08ff00c add pc, pc, ip + 1010: 0200000c .word 0x0200000c + 1014: 00000000 .word 0x00000000 +Disassembly of section .foo: + +02001020 <bar>: + 2001020: e12fff1e bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-arm-arm.d b/binutils-2.24/ld/testsuite/ld-arm/farcall-arm-arm.d new file mode 100644 index 0000000..7ee6d66 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-arm-arm.d @@ -0,0 +1,15 @@ +.*: file format .* + +Disassembly of section .text: + +00001000 <_start>: + 1000: eb000000 bl 1008 <__bar_veneer> + 1004: 00000000 andeq r0, r0, r0 + +00001008 <__bar_veneer>: + 1008: e51ff004 ldr pc, \[pc, #-4\] ; 100c <__bar_veneer\+0x4> + 100c: 02001020 .word 0x02001020 +Disassembly of section .foo: + +02001020 <bar>: + 2001020: e12fff1e bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-arm-arm.s b/binutils-2.24/ld/testsuite/ld-arm/farcall-arm-arm.s new file mode 100644 index 0000000..00c1e48 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-arm-arm.s @@ -0,0 +1,20 @@ +@ Test to ensure that a ARM to ARM call exceeding 32Mb generates a stub. + + .global _start + .syntax unified + +@ We will place the section .text at 0x1000. + + .text + +_start: + bl bar + +@ We will place the section .foo at 0x2001020. + + .section .foo, "xa" + + .type bar, %function +bar: + bx lr + diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-arm-nacl-pic.d b/binutils-2.24/ld/testsuite/ld-arm/farcall-arm-nacl-pic.d new file mode 100644 index 0000000..62d3421 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-arm-nacl-pic.d @@ -0,0 +1,20 @@ +.*: file format .* + +Disassembly of section \.text: + +0+1000 <_start>: +\s*1000:\s+eb000002\s+bl\s+1010 <__bar_veneer> +#... + +0+1010 <__bar_veneer>: +\s*1010:\s+e59fc00c\s+ldr\s+ip, \[pc, #12\]\s+; 1024 <__bar_veneer\+0x14> +\s*1014:\s+e08cc00f\s+add\s+ip, ip, pc +\s*1018:\s+e3ccc13f\s+bic\s+ip, ip, #-1073741809\s+; 0xc000000f +\s*101c:\s+e12fff1c\s+bx\s+ip +\s*1020:\s+e125be70\s+bkpt\s+0x5be0 +\s*1024:\s+02000004\s+.word\s+0x02000004 +#... + +\s*Disassembly of section \.foo: +\s*02001020 <bar>: +\s*2001020:\s+e12fff1e\s+bx\s+lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-arm-nacl.d b/binutils-2.24/ld/testsuite/ld-arm/farcall-arm-nacl.d new file mode 100644 index 0000000..58f2a58 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-arm-nacl.d @@ -0,0 +1,20 @@ +.*: file format .* + +Disassembly of section \.text: + +0+1000 <_start>: +\s*1000:\s+eb000002\s+bl\s+1010 <__bar_veneer> +#... + +0+1010 <__bar_veneer>: +\s*1010:\s+e59fc00c\s+ldr\s+ip, \[pc, #12\]\s+; 1024 <__bar_veneer\+0x14> +\s*1014:\s+e3ccc13f\s+bic\s+ip, ip, #-1073741809\s+; 0xc000000f +\s*1018:\s+e12fff1c\s+bx\s+ip +\s*101c:\s+e320f000\s+nop\s+\{0\} +\s*1020:\s+e125be70\s+bkpt\s+0x5be0 +\s*1024:\s+02001020\s+.word\s+0x02001020 +#... + +\s*Disassembly of section \.foo: +\s*02001020 <bar>: +\s*2001020:\s+e12fff1e\s+bx\s+lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-arm-thumb-blx-pic-veneer.d b/binutils-2.24/ld/testsuite/ld-arm/farcall-arm-thumb-blx-pic-veneer.d new file mode 100644 index 0000000..45bc01c --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-arm-thumb-blx-pic-veneer.d @@ -0,0 +1,17 @@ +.*: file format .* + +Disassembly of section .text: + +00001000 <_start>: + 1000: eb000000 bl 1008 <__bar_from_arm> + 1004: 00000000 andeq r0, r0, r0 + +00001008 <__bar_from_arm>: + 1008: e59fc004 ldr ip, \[pc, #4\] ; 1014 <__bar_from_arm\+0xc> + 100c: e08fc00c add ip, pc, ip + 1010: e12fff1c bx ip + 1014: 02000001 .word 0x02000001 +Disassembly of section .foo: + +02001014 <bar>: + 2001014: 4770 bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-arm-thumb-blx.d b/binutils-2.24/ld/testsuite/ld-arm/farcall-arm-thumb-blx.d new file mode 100644 index 0000000..993a028 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-arm-thumb-blx.d @@ -0,0 +1,15 @@ +.*: file format .* + +Disassembly of section .text: + +00001000 <_start>: + 1000: eb000000 bl 1008 <__bar_from_arm> + 1004: 00000000 andeq r0, r0, r0 + +00001008 <__bar_from_arm>: + 1008: e51ff004 ldr pc, \[pc, #-4\] ; 100c <__bar_from_arm\+0x4> + 100c: 02001015 .word 0x02001015 +Disassembly of section .foo: + +02001014 <bar>: + 2001014: 4770 bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-arm-thumb-pic-veneer.d b/binutils-2.24/ld/testsuite/ld-arm/farcall-arm-thumb-pic-veneer.d new file mode 100644 index 0000000..45bc01c --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-arm-thumb-pic-veneer.d @@ -0,0 +1,17 @@ +.*: file format .* + +Disassembly of section .text: + +00001000 <_start>: + 1000: eb000000 bl 1008 <__bar_from_arm> + 1004: 00000000 andeq r0, r0, r0 + +00001008 <__bar_from_arm>: + 1008: e59fc004 ldr ip, \[pc, #4\] ; 1014 <__bar_from_arm\+0xc> + 100c: e08fc00c add ip, pc, ip + 1010: e12fff1c bx ip + 1014: 02000001 .word 0x02000001 +Disassembly of section .foo: + +02001014 <bar>: + 2001014: 4770 bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-arm-thumb.d b/binutils-2.24/ld/testsuite/ld-arm/farcall-arm-thumb.d new file mode 100644 index 0000000..3fc02e3 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-arm-thumb.d @@ -0,0 +1,17 @@ +.*: file format .* + +Disassembly of section .text: + +00001000 <_start>: + 1000: eb000000 bl 1008 <__bar_from_arm> + 1004: 00000000 andeq r0, r0, r0 + +00001008 <__bar_from_arm>: + 1008: e59fc000 ldr ip, \[pc\] ; 1010 <__bar_from_arm\+0x8> + 100c: e12fff1c bx ip + 1010: 02001015 .word 0x02001015 + 1014: 00000000 .word 0x00000000 +Disassembly of section .foo: + +02001014 <bar>: + 2001014: 4770 bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-arm-thumb.s b/binutils-2.24/ld/testsuite/ld-arm/farcall-arm-thumb.s new file mode 100644 index 0000000..c69f31c --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-arm-thumb.s @@ -0,0 +1,20 @@ +@ Test to ensure that a ARM to Thumb call exceeding 32Mb generates a stub. + + .global _start + .global bar + .syntax unified + +@ We will place the section .text at 0x1000. + + .text + +_start: + bl bar + +@ We will place the section .foo at 0x2001010. + + .section .foo, "xa" + .thumb_func +bar: + bx lr + diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-data-nacl.d b/binutils-2.24/ld/testsuite/ld-arm/farcall-data-nacl.d new file mode 100644 index 0000000..1524fa6 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-data-nacl.d @@ -0,0 +1,24 @@ +.*: file format .* + +Disassembly of section .text: + +0+8000 <_start>: +\s*8000:\s+ea000002\s+b\s+8010 <__far_veneer> +#... + +0+8010 <__far_veneer>: +\s*8010:\s+e59fc00c\s+ldr\s+ip, \[pc, #12\]\s+; 8024 <__far_veneer\+0x14> +\s*8014:\s+e3ccc13f\s+bic\s+ip, ip, #-1073741809\s+; 0xc000000f +\s*8018:\s+e12fff1c\s+bx\s+ip +\s*801c:\s+e320f000\s+nop\s+\{0\} +\s*8020:\s+e125be70\s+bkpt\s+0x5be0 +\s*8024:\s+12340000\s+.word\s+0x12340000 +#... + +0+8030 <after>: +\s*8030:\s+11111111\s+\.word\s+0x11111111 + +Disassembly of section \.far: + +12340000 <far>: +12340000:\s+e12fff1e\s+bx\s+lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-data.d b/binutils-2.24/ld/testsuite/ld-arm/farcall-data.d new file mode 100644 index 0000000..a8b231c --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-data.d @@ -0,0 +1,19 @@ +.*: file format .* + +Disassembly of section .text: + +00008000 <_start>: + 8000: ea000000 b 8008 <__far_veneer> + 8004: 00000000 andeq r0, r0, r0 + +00008008 <__far_veneer>: + 8008: e51ff004 ldr pc, \[pc, #-4\] ; 800c <__far_veneer\+0x4> + 800c: 12340000 \.word 0x12340000 + +00008010 <after>: + 8010: 11111111 \.word 0x11111111 + +Disassembly of section \.far: + +12340000 <far>: +12340000: e12fff1e bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-data.s b/binutils-2.24/ld/testsuite/ld-arm/farcall-data.s new file mode 100644 index 0000000..ed66199 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-data.s @@ -0,0 +1,14 @@ + .syntax unified + .text + .global _start + .type _start, %function +_start: + b far + +.section .after +after: + .word 0x11111111 + + .section .far, "ax" + .type far, %function +far: bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-group-limit.d b/binutils-2.24/ld/testsuite/ld-arm/farcall-group-limit.d new file mode 100644 index 0000000..204dcd8 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-group-limit.d @@ -0,0 +1,21 @@ + +.*: file format .* + +Disassembly of section .text: + +00001000 <_start>: + 1000: eb000000 bl 1008 <__bar_veneer> + 1004: 00000000 andeq r0, r0, r0 + +00001008 <__bar_veneer>: + 1008: e51ff004 ldr pc, \[pc, #-4\] ; 100c <__bar_veneer\+0x4> + 100c: 02003020 .word 0x02003020 + +00001010 <myfunc>: + ... + 2001010: eb000802 bl 2003020 <bar> + +Disassembly of section .far: + +02003020 <bar>: + 2003020: e12fff1e bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-group-size2.d b/binutils-2.24/ld/testsuite/ld-arm/farcall-group-size2.d new file mode 100644 index 0000000..d70bcac --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-group-size2.d @@ -0,0 +1,57 @@ + +.*: file format .* + +Disassembly of section .text: + +00001000 <_start>: + 1000: eb000000 bl 1008 <__bar_from_arm> + 1004: eb000002 bl 1014 <__bar2_veneer> + +00001008 <__bar_from_arm>: + 1008: e59fc000 ldr ip, \[pc\] ; 1010 <__bar_from_arm\+0x8> + 100c: e12fff1c bx ip + 1010: 02003021 .word 0x02003021 + +00001014 <__bar2_veneer>: + 1014: e51ff004 ldr pc, \[pc, #-4\] ; 1018 <__bar2_veneer\+0x4> + 1018: 02003024 .word 0x02003024 + 101c: 00000000 .word 0x00000000 + +00001020 <myfunc>: + 1020: eb000008 bl 1048 <__bar3_veneer> + 1024: eb000004 bl 103c <__bar4_from_arm> + 1028: eb000000 bl 1030 <__bar5_from_arm> + 102c: 00000000 andeq r0, r0, r0 + +00001030 <__bar5_from_arm>: + 1030: e59fc000 ldr ip, \[pc\] ; 1038 <__bar5_from_arm\+0x8> + 1034: e12fff1c bx ip + 1038: 0200302f .word 0x0200302f + +0000103c <__bar4_from_arm>: + 103c: e59fc000 ldr ip, \[pc\] ; 1044 <__bar4_from_arm\+0x8> + 1040: e12fff1c bx ip + 1044: 0200302d .word 0x0200302d + +00001048 <__bar3_veneer>: + 1048: e51ff004 ldr pc, \[pc, #-4\] ; 104c <__bar3_veneer\+0x4> + 104c: 02003028 .word 0x02003028 + ... + +Disassembly of section .foo: + +02003020 <bar>: + 2003020: 4770 bx lr + ... + +02003024 <bar2>: + 2003024: e12fff1e bx lr + +02003028 <bar3>: + 2003028: e12fff1e bx lr + +0200302c <bar4>: + 200302c: 4770 bx lr + +0200302e <bar5>: + 200302e: 4770 bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-group.d b/binutils-2.24/ld/testsuite/ld-arm/farcall-group.d new file mode 100644 index 0000000..da811e7 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-group.d @@ -0,0 +1,56 @@ + +.*: file format .* + +Disassembly of section .text: + +[0-9a-f]+ <_start>: + +[0-9a-f]+: [0-9a-f]{8} bl [0-9a-f]+ <__bar_from_arm> + +[0-9a-f]+: [0-9a-f]{8} bl [0-9a-f]+ <__bar2_veneer> + +[0-9a-f]+ <myfunc>: + +[0-9a-f]+: [0-9a-f]{8} bl [0-9a-f]+ <__bar3_veneer> + +[0-9a-f]+: [0-9a-f]{8} bl [0-9a-f]+ <__bar4_from_arm> + +[0-9a-f]+: [0-9a-f]{8} bl [0-9a-f]+ <__bar5_from_arm> + +[0-9a-f]+: 00000000 andeq r0, r0, r0 + +[0-9a-f]+ <__bar5_from_arm>: + +[0-9a-f]+: e59fc000 ldr ip, \[pc\] ; [0-9a-f]+ <__bar5_from_arm\+0x8> + +[0-9a-f]+: e12fff1c bx ip + +[0-9a-f]+: 0200302f .word 0x0200302f + +[0-9a-f]+ <__bar4_from_arm>: + +[0-9a-f]+: e59fc000 ldr ip, \[pc\] ; [0-9a-f]+ <__bar4_from_arm\+0x8> + +[0-9a-f]+: e12fff1c bx ip + +[0-9a-f]+: 0200302d .word 0x0200302d + +[0-9a-f]+ <__bar3_veneer>: + +[0-9a-f]+: e51ff004 ldr pc, \[pc, #-4\] ; [0-9a-f]+ <__bar3_veneer\+0x4> + +[0-9a-f]+: 02003028 .word 0x02003028 + +[0-9a-f]+ <__bar_from_arm>: + +[0-9a-f]+: e59fc000 ldr ip, \[pc\] ; [0-9a-f]+ <__bar_from_arm\+0x8> + +[0-9a-f]+: e12fff1c bx ip + +[0-9a-f]+: 02003021 .word 0x02003021 + +[0-9a-f]+ <__bar2_veneer>: + +[0-9a-f]+: e51ff004 ldr pc, \[pc, #-4\] ; [0-9a-f]+ <__bar2_veneer\+0x4> + +[0-9a-f]+: 02003024 .word 0x02003024 + ... + +Disassembly of section .foo: + +[0-9a-f]+ <bar>: + +[0-9a-f]+: 4770 bx lr + ... + +[0-9a-f]+ <bar2>: + +[0-9a-f]+: e12fff1e bx lr + +[0-9a-f]+ <bar3>: + +[0-9a-f]+: e12fff1e bx lr + +[0-9a-f]+ <bar4>: + +[0-9a-f]+: 4770 bx lr + +[0-9a-f]+ <bar5>: + +[0-9a-f]+: 4770 bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-group.s b/binutils-2.24/ld/testsuite/ld-arm/farcall-group.s new file mode 100644 index 0000000..0ede36d --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-group.s @@ -0,0 +1,44 @@ +@ Test to ensure that ARM calls exceeding 32Mb generate stubs. + + .global _start + .syntax unified + +@ We will place the section .text at 0x1000. + + .text + +_start: + bl bar + bl bar2 + + +@ We will place the section .foo at 0x2003020. + + .section .foo, "xa" + + .global bar + .thumb_func +bar: + bx lr + + .arm + .global bar2 + .type bar2, %function +bar2: + bx lr + + .global bar3 + .type bar3, %function +bar3: + bx lr + + .global bar4 + .thumb_func +bar4: + bx lr + + .global bar5 + .type bar5, %function +bar5: + bx lr + diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-group2.s b/binutils-2.24/ld/testsuite/ld-arm/farcall-group2.s new file mode 100644 index 0000000..774869f --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-group2.s @@ -0,0 +1,7 @@ +@ Test to ensure that ARM calls exceeding 32Mb generate stubs. + + .text +myfunc: + bl bar3 + bl bar4 + bl bar5 diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-group3.s b/binutils-2.24/ld/testsuite/ld-arm/farcall-group3.s new file mode 100644 index 0000000..ea2ce7f --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-group3.s @@ -0,0 +1,9 @@ +@ Test to ensure that ARM calls exceeding 32Mb generate stubs, +@ and that stubs are correctly inserted between input sections +@ when one contribution size exceeds the limit. + + .text + .global bar + .global _start +_start: + bl bar diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-group4.s b/binutils-2.24/ld/testsuite/ld-arm/farcall-group4.s new file mode 100644 index 0000000..95ad035 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-group4.s @@ -0,0 +1,14 @@ +@ Test to ensure that ARM calls exceeding 32Mb generate stubs, +@ and that a large input section forces stub insertion before its +@ contribution. + + .text +myfunc: + .space 0x2000000 + bl bar + + .section .far, "xa" + .type bar, %function + .global bar +bar: + bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-mix.d b/binutils-2.24/ld/testsuite/ld-arm/farcall-mix.d new file mode 100644 index 0000000..ffeffb9 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-mix.d @@ -0,0 +1,51 @@ + +.*: file format .* + +Disassembly of section .text: + +[0-9a-f]+ <_start>: + +[0-9a-f]+: [0-9a-f]{8} bl [0-9a-f]+ <__bar_from_arm> + +[0-9a-f]+: [0-9a-f]{8} bl [0-9a-f]+ <__bar2_veneer> + +[0-9a-f]+: [0-9a-f]{8} bl [0-9a-f]+ <__bar3_veneer> + +[0-9a-f]+: [0-9a-f]{8} bl [0-9a-f]+ <__bar4_from_arm> + +[0-9a-f]+: [0-9a-f]{8} bl [0-9a-f]+ <__bar5_from_arm> + +[0-9a-f]+: 00000000 andeq r0, r0, r0 + +[0-9a-f]+ <__bar_from_arm>: + +[0-9a-f]+: e59fc000 ldr ip, \[pc\] ; [0-9a-f]+ <__bar_from_arm\+0x8> + +[0-9a-f]+: e12fff1c bx ip + +[0-9a-f]+: 02002021 .word 0x02002021 +[0-9a-f]+ <__bar3_veneer>: + +[0-9a-f]+: e51ff004 ldr pc, \[pc, #-4\] ; [0-9a-f]+ <__bar3_veneer\+0x4> + +[0-9a-f]+: 02002028 .word 0x02002028 +[0-9a-f]+ <__bar5_from_arm>: + +[0-9a-f]+: e59fc000 ldr ip, \[pc\] ; [0-9a-f]+ <__bar5_from_arm\+0x8> + +[0-9a-f]+: e12fff1c bx ip + +[0-9a-f]+: 0200202f .word 0x0200202f +[0-9a-f]+ <__bar4_from_arm>: + +[0-9a-f]+: e59fc000 ldr ip, \[pc\] ; [0-9a-f]+ <__bar4_from_arm\+0x8> + +[0-9a-f]+: e12fff1c bx ip + +[0-9a-f]+: 0200202d .word 0x0200202d + +[0-9a-f]+ <__bar2_veneer>: + +[0-9a-f]+: e51ff004 ldr pc, \[pc, #-4\] ; [0-9a-f]+ <__bar2_veneer\+0x4> + +[0-9a-f]+: 02002024 .word 0x02002024 + ... + +Disassembly of section .foo: + +[0-9a-f]+ <bar>: + +[0-9a-f]+: 4770 bx lr + ... + +[0-9a-f]+ <bar2>: + +[0-9a-f]+: e12fff1e bx lr + +[0-9a-f]+ <bar3>: + +[0-9a-f]+: e12fff1e bx lr + +[0-9a-f]+ <bar4>: + +[0-9a-f]+: 4770 bx lr + +[0-9a-f]+ <bar5>: + +[0-9a-f]+: 4770 bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-mix.s b/binutils-2.24/ld/testsuite/ld-arm/farcall-mix.s new file mode 100644 index 0000000..41b27f2 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-mix.s @@ -0,0 +1,46 @@ +@ Test to ensure that ARM calls exceeding 32Mb generate stubs. + + .global _start + .syntax unified + +@ We will place the section .text at 0x1000. + + .text + +_start: + bl bar + bl bar2 + bl bar3 + bl bar4 + bl bar5 + +@ We will place the section .foo at 0x2002020. + + .section .foo, "xa" + + .global bar + .thumb_func +bar: + bx lr + + .arm + .global bar2 + .type bar2, %function +bar2: + bx lr + + .global bar3 + .type bar3, %function +bar3: + bx lr + + .global bar4 + .thumb_func +bar4: + bx lr + + .global bar5 + .type bar5, %function +bar5: + bx lr + diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-mix2.d b/binutils-2.24/ld/testsuite/ld-arm/farcall-mix2.d new file mode 100644 index 0000000..192a2a0 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-mix2.d @@ -0,0 +1,56 @@ + +.*: file format .* + +Disassembly of section .text: + +[0-9a-f]+ <_start>: + +[0-9a-f]+: eb000000 bl [0-9a-f]+ <__bar_from_arm> + +[0-9a-f]+: eb000002 bl [0-9a-f]+ <__bar2_veneer> + +[0-9a-f]+ <__bar_from_arm>: + +[0-9a-f]+: e59fc000 ldr ip, \[pc\] ; [0-9a-f]+ <__bar_from_arm\+0x8> + +[0-9a-f]+: e12fff1c bx ip + +[0-9a-f]+: 02003021 .word 0x02003021 +[0-9a-f]+ <__bar2_veneer>: + +[0-9a-f]+: e51ff004 ldr pc, \[pc, #-4\] ; [0-9a-f]+ <__bar2_veneer\+0x4> + +[0-9a-f]+: 02003024 .word 0x02003024 + +[0-9a-f]+: 00000000 .word 0x00000000 +Disassembly of section .mytext: + +[0-9a-f]+ <__bar3_veneer-0x10>: + +[0-9a-f]+: eb000002 bl [0-9a-f]+ <__bar3_veneer> + +[0-9a-f]+: eb000003 bl [0-9a-f]+ <__bar4_from_arm> + +[0-9a-f]+: eb000005 bl [0-9a-f]+ <__bar5_from_arm> + +[0-9a-f]+: 00000000 andeq r0, r0, r0 + +[0-9a-f]+ <__bar3_veneer>: + +[0-9a-f]+: e51ff004 ldr pc, \[pc, #-4\] ; [0-9a-f]+ <__bar3_veneer\+0x4> + +[0-9a-f]+: 02003028 .word 0x02003028 + +[0-9a-f]+ <__bar4_from_arm>: + +[0-9a-f]+: e59fc000 ldr ip, \[pc\] ; [0-9a-f]+ <__bar4_from_arm\+0x8> + +[0-9a-f]+: e12fff1c bx ip + +[0-9a-f]+: 0200302d .word 0x0200302d + +[0-9a-f]+ <__bar5_from_arm>: + +[0-9a-f]+: e59fc000 ldr ip, \[pc\] ; [0-9a-f]+ <__bar5_from_arm\+0x8> + +[0-9a-f]+: e12fff1c bx ip + +[0-9a-f]+: 0200302f .word 0x0200302f + ... +Disassembly of section .foo: + +[0-9a-f]+ <bar>: + +[0-9a-f]+: 4770 bx lr + ... + +[0-9a-f]+ <bar2>: + +[0-9a-f]+: e12fff1e bx lr + +[0-9a-f]+ <bar3>: + +[0-9a-f]+: e12fff1e bx lr + +[0-9a-f]+ <bar4>: + +[0-9a-f]+: 4770 bx lr + +[0-9a-f]+ <bar5>: + +[0-9a-f]+: 4770 bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-mix2.s b/binutils-2.24/ld/testsuite/ld-arm/farcall-mix2.s new file mode 100644 index 0000000..803e8d0 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-mix2.s @@ -0,0 +1,51 @@ +@ Test to ensure that ARM calls exceeding 32Mb generate stubs. + + .global _start + .syntax unified + +@ We will place the section .text at 0x1000. + + .text + +_start: + bl bar + bl bar2 + + +@ We will place the section .mytext at 0x2000. + + .section .mytext, "xa" + bl bar3 + bl bar4 + bl bar5 + +@ We will place the section .foo at 0x2003020. + + .section .foo, "xa" + + .global bar + .thumb_func +bar: + bx lr + + .arm + .global bar2 + .type bar2, %function +bar2: + bx lr + + .global bar3 + .type bar3, %function +bar3: + bx lr + + .global bar4 + .thumb_func +bar4: + bx lr + + .global bar5 + .type bar5, %function +bar5: + bx lr + diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-mixed-app-v5.d b/binutils-2.24/ld/testsuite/ld-arm/farcall-mixed-app-v5.d new file mode 100644 index 0000000..781b972 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-mixed-app-v5.d @@ -0,0 +1,85 @@ + +tmpdir/farcall-mixed-app-v5: file format elf32-(little|big)arm +architecture: armv4t, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x.* + +Disassembly of section .plt: + +.* <.plt>: + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) + .*: e59fe004 ldr lr, \[pc, #4\] ; .* <_start-0x28> + .*: e08fe00e add lr, pc, lr + .*: e5bef008 ldr pc, \[lr, #8\]! + .*: .* + .*: e28fc6.* add ip, pc, #.* + .*: e28cca.* add ip, ip, #.* ; 0x.* + .*: e5bcf.* ldr pc, \[ip, #.*\]!.* + .*: e28fc6.* add ip, pc, #.* + .*: e28cca.* add ip, ip, #.* ; 0x.* + .*: e5bcf.* ldr pc, \[ip, #.*\]!.* + +Disassembly of section .text: + +.* <_start>: + .*: e1a0c00d mov ip, sp + .*: e92dd800 push {fp, ip, lr, pc} + .*: eb000008 bl .* <__app_func_veneer> + .*: ebfffff5 bl .* <_start-0x18> + .*: ebfffff1 bl .* <_start-0x24> + .*: e89d6800 ldm sp, {fp, sp, lr} + .*: e12fff1e bx lr + .*: e1a00000 nop ; \(mov r0, r0\) + +.* <app_tfunc_close>: + .*: b500 push {lr} + .*: f7ff efdc blx .* <_start-0x24> + .*: bd00 pop {pc} + .*: 4770 bx lr + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) + +.* <__app_func_veneer>: + .*: e51ff004 ldr pc, \[pc, #-4\] ; .* <__app_func_veneer\+0x4> + .*: 02100000 .word 0x02100000 + +Disassembly of section .far_arm: + +.* <app_func>: + .*: e1a0c00d mov ip, sp + .*: e92dd800 push {fp, ip, lr, pc} + .*: eb000008 bl .* <__lib_func1_veneer> + .*: eb000009 bl .* <__lib_func2_veneer> + .*: e89d6800 ldm sp, {fp, sp, lr} + .*: e12fff1e bx lr + .*: e1a00000 nop ; \(mov r0, r0\) + .*: e1a00000 nop ; \(mov r0, r0\) + +.* <app_func2>: + .*: e12fff1e bx lr + .*: e1a00000 nop ; \(mov r0, r0\) + .*: e1a00000 nop ; \(mov r0, r0\) + .*: e1a00000 nop ; \(mov r0, r0\) + +.* <__lib_func1_veneer>: + .*: e51ff004 ldr pc, \[pc, #-4\] ; 2100034 <__lib_func1_veneer\+0x4> + .*: 000081e8 .word 0x000081e8 +.* <__lib_func2_veneer>: + .*: e51ff004 ldr pc, \[pc, #-4\] ; 210003c <__lib_func2_veneer\+0x4> + .*: 000081dc .word 0x000081dc + +Disassembly of section .far_thumb: + +.* <app_tfunc>: + .*: b500 push {lr} + .*: f000 e806 blx .* <__lib_func2_from_thumb> + .*: bd00 pop {pc} + .*: 4770 bx lr + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) + +.* <__lib_func2_from_thumb>: + .*: e51ff004 ldr pc, \[pc, #-4\] ; 2200014 <__lib_func2_from_thumb\+0x4> + .*: 000081dc .word 0x000081dc diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-mixed-app.d b/binutils-2.24/ld/testsuite/ld-arm/farcall-mixed-app.d new file mode 100644 index 0000000..b6cc2d0 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-mixed-app.d @@ -0,0 +1,90 @@ + +tmpdir/farcall-mixed-app: file format elf32-(little|big)arm +architecture: armv4t, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x.* + +Disassembly of section .plt: + +.* <.plt>: + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) + .*: e59fe004 ldr lr, \[pc, #4\] ; .* <_start-0x28> + .*: e08fe00e add lr, pc, lr + .*: e5bef008 ldr pc, \[lr, #8\]! + .*: .* + .*: 4778 bx pc + .*: 46c0 nop ; \(mov r8, r8\) + .*: e28fc6.* add ip, pc, #.* + .*: e28cca.* add ip, ip, #.* ; 0x.* + .*: e5bcf.* ldr pc, \[ip, #.*\]!.* + .*: e28fc6.* add ip, pc, #.* + .*: e28cca.* add ip, ip, #.* ; 0x.* + .*: e5bcf.* ldr pc, \[ip, #.*\]!.* + +Disassembly of section .text: + +.* <_start>: + .*: e1a0c00d mov ip, sp + .*: e92dd800 push {fp, ip, lr, pc} + .*: eb000008 bl .* <__app_func_veneer> + .*: ebfffff6 bl .* <_start-0x14> + .*: ebfffff2 bl .* <_start-0x20> + .*: e89d6800 ldm sp, {fp, sp, lr} + .*: e12fff1e bx lr + .*: e1a00000 nop ; \(mov r0, r0\) + +.* <app_tfunc_close>: + .*: b500 push {lr} + .*: f7ff ffdb bl 81dc <_start-0x24> + .*: bd00 pop {pc} + .*: 4770 bx lr + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) + +.* <__app_func_veneer>: + .*: e51ff004 ldr pc, \[pc, #-4\] ; 8234 <__app_func_veneer\+0x4> + .*: 02100000 .word 0x02100000 + +Disassembly of section .far_arm: + +.* <app_func>: + .*: e1a0c00d mov ip, sp + .*: e92dd800 push {fp, ip, lr, pc} + .*: eb000008 bl .* <__lib_func1_veneer> + .*: eb000009 bl .* <__lib_func2_veneer> + .*: e89d6800 ldm sp, {fp, sp, lr} + .*: e12fff1e bx lr + .*: e1a00000 nop ; \(mov r0, r0\) + .*: e1a00000 nop ; \(mov r0, r0\) + +.* <app_func2>: + .*: e12fff1e bx lr + .*: e1a00000 nop ; \(mov r0, r0\) + .*: e1a00000 nop ; \(mov r0, r0\) + .*: e1a00000 nop ; \(mov r0, r0\) + +.* <__lib_func1_veneer>: + .*: e51ff004 ldr pc, \[pc, #-4\] ; 2100034 <__lib_func1_veneer\+0x4> + .*: 000081ec .word 0x000081ec +.* <__lib_func2_veneer>: + .*: e51ff004 ldr pc, \[pc, #-4\] ; 210003c <__lib_func2_veneer\+0x4> + .*: 000081e0 .word 0x000081e0 + +Disassembly of section .far_thumb: + +.* <app_tfunc>: + .*: b500 push {lr} + .*: f000 f805 bl .* <__lib_func2_from_thumb> + .*: bd00 pop {pc} + .*: 4770 bx lr + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) + +.* <__lib_func2_from_thumb>: + .*: 4778 bx pc + .*: 46c0 nop ; \(mov r8, r8\) + .*: e51ff004 ldr pc, \[pc, #-4\] ; 2200018 <__lib_func2_from_thumb\+0x8> + .*: 000081e0 .word 0x000081e0 + .*: 00000000 .word 0x00000000 diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-mixed-app.r b/binutils-2.24/ld/testsuite/ld-arm/farcall-mixed-app.r new file mode 100644 index 0000000..910a361 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-mixed-app.r @@ -0,0 +1,10 @@ + +tmpdir/farcall-mixed-app.*: file format elf32-(little|big)arm + +DYNAMIC RELOCATION RECORDS +OFFSET TYPE VALUE +.* R_ARM_COPY data_obj +.* R_ARM_JUMP_SLOT lib_func2 +.* R_ARM_JUMP_SLOT lib_func1 + + diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-mixed-app.s b/binutils-2.24/ld/testsuite/ld-arm/farcall-mixed-app.s new file mode 100644 index 0000000..e462ba3 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-mixed-app.s @@ -0,0 +1,61 @@ + .text + .p2align 4 + .globl _start +_start: + mov ip, sp + stmdb sp!, {r11, ip, lr, pc} + bl app_func + bl lib_func1 + bl lib_func2 + ldmia sp, {r11, sp, lr} + bx lr + + .p2align 4 + .globl app_tfunc_close + .type app_tfunc_close,%function + .thumb_func + .code 16 +app_tfunc_close: + push {lr} + bl lib_func2 + pop {pc} + bx lr + +@ We will place the section .far_arm at 0x2100000. + .section .far_arm, "xa" + + .arm + .p2align 4 + .globl app_func + .type app_func,%function +app_func: + mov ip, sp + stmdb sp!, {r11, ip, lr, pc} + bl lib_func1 + bl lib_func2 + ldmia sp, {r11, sp, lr} + bx lr + + .arm + .p2align 4 + .globl app_func2 + .type app_func2,%function +app_func2: + bx lr + +@ We will place the section .far_thumb at 0x2200000. + .section .far_thumb, "xa" + + .p2align 4 + .globl app_tfunc + .type app_tfunc,%function + .thumb_func + .code 16 +app_tfunc: + push {lr} + bl lib_func2 + pop {pc} + bx lr + + .data + .long data_obj diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-mixed-app.sym b/binutils-2.24/ld/testsuite/ld-arm/farcall-mixed-app.sym new file mode 100644 index 0000000..093397c --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-mixed-app.sym @@ -0,0 +1,15 @@ + +Symbol table for image: + +Num +Buc: +Value +Size +Type +Bind +Vis +Ndx +Name + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +11 _edata + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +12 __bss_start__ + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +12 _end + +.. +..: ........ +4 +OBJECT +GLOBAL +DEFAULT +12 data_obj + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +12 __bss_end__ + +.. +..: 0*[^0]*.* +0 +FUNC +GLOBAL +DEFAULT +UND lib_func1 + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +11 __data_start + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +12 __end__ + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +12 __bss_start + +.. +..: .......0 +0 +FUNC +GLOBAL +DEFAULT +14 app_func2 + +.. +..: 0*[^0]*.* +0 +FUNC +GLOBAL +DEFAULT +UND lib_func2 + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +12 _bss_end__ diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-mixed-lib-v4t.d b/binutils-2.24/ld/testsuite/ld-arm/farcall-mixed-lib-v4t.d new file mode 100644 index 0000000..3be297b --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-mixed-lib-v4t.d @@ -0,0 +1,123 @@ +tmpdir/farcall-mixed-lib.so: file format elf32-(little|big)arm +architecture: armv4t, flags 0x00000150: +HAS_SYMS, DYNAMIC, D_PAGED +start address 0x.* + +Disassembly of section .plt: + +.* <.plt>: + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) + .*: e59fe004 ldr lr, \[pc, #4\] ; .* <lib_func1-0x.*> + .*: e08fe00e add lr, pc, lr + .*: e5bef008 ldr pc, \[lr, #8\]! + .*: .* .word .* + .*: 4778 bx pc + .*: 46c0 nop ; \(mov r8, r8\) + .*: e28fc6.* add ip, pc, #.* + .*: e28cca.* add ip, ip, #.* ; 0x.* + .*: e5bcf.* ldr pc, \[ip, #.*\]! ; .* + .*: 4778 bx pc + .*: 46c0 nop ; \(mov r8, r8\) + .*: e28fc6.* add ip, pc, #.* + .*: e28cca.* add ip, ip, #.* ; 0x.* + .*: e5bcf.* ldr pc, \[ip, #.*\]! ; 0x.* + .*: 4778 bx pc + .*: 46c0 nop ; \(mov r8, r8\) + .*: e28fc6.* add ip, pc, #.* + .*: e28cca.* add ip, ip, #.* ; 0x.* + .*: e5bcf.* ldr pc, \[ip, #.*\]! ; 0x.* + .*: 4778 bx pc + .*: 46c0 nop ; \(mov r8, r8\) + .*: e28fc6.* add ip, pc, #.* + .*: e28cca.* add ip, ip, #.* ; 0x.* + .*: e5bcf.* ldr pc, \[ip, #.*\]! ; 0x.* + +Disassembly of section .text: + +.* <lib_func1>: + .*: e1a0c00d mov ip, sp + .*: e92dd800 push {fp, ip, lr, pc} + .*: ebffff.. bl .* <lib_func1-0x.*> + .*: ebffff.. bl .* <lib_func1-0x.*> + .*: ebffff.. bl .* <lib_func1-0x.*> + .*: ebffff.. bl .* <lib_func1-0x.*> + .*: e89d6800 ldm sp, {fp, sp, lr} + .*: e12fff1e bx lr + ... + +.* <__real_lib_func2>: + .*: f000 f80e bl 1000330 <__app_func_from_thumb> + .*: f000 f81c bl 1000350 <__app_func_weak_from_thumb> + .*: f000 f822 bl 1000360 <__lib_func3_from_thumb> + .*: f000 f810 bl 1000340 <__lib_func4_from_thumb> + .*: 4770 bx lr + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) + +.* <__app_func_from_thumb>: + .*: 4778 bx pc + .*: 46c0 nop ; \(mov r8, r8\) + .*: e59fc000 ldr ip, \[pc\] ; 100033c <__app_func_from_thumb\+0xc> + .*: e08cf00f add pc, ip, pc + .*: feffff68 .word 0xfeffff68 + +.* <__lib_func4_from_thumb>: + .*: 4778 bx pc + .*: 46c0 nop ; \(mov r8, r8\) + .*: e59fc000 ldr ip, \[pc\] ; 100034c <__lib_func4_from_thumb\+0xc> + .*: e08cf00f add pc, ip, pc + .*: feffff88 .word 0xfeffff88 + +.* <__app_func_weak_from_thumb>: + .*: 4778 bx pc + .*: 46c0 nop ; \(mov r8, r8\) + .*: e59fc000 ldr ip, \[pc\] ; 100035c <__app_func_weak_from_thumb\+0xc> + .*: e08cf00f add pc, ip, pc + .*: feffff58 .word 0xfeffff58 + +.* <__lib_func3_from_thumb>: + .*: 4778 bx pc + .*: 46c0 nop ; \(mov r8, r8\) + .*: e59fc000 ldr ip, \[pc\] ; 100036c <__lib_func3_from_thumb\+0xc> + .*: e08cf00f add pc, ip, pc + .*: feffff58 .word 0xfeffff58 + ... + +.* <__real_lib_func3>: + .*: f000 f80e bl 2000390 <__app_func_from_thumb> + .*: f000 f804 bl 2000380 <__app_func_weak_from_thumb> + .*: 4770 bx lr + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) + +.* <__app_func_weak_from_thumb>: + .*: 4778 bx pc + .*: 46c0 nop ; \(mov r8, r8\) + .*: e59fc000 ldr ip, \[pc\] ; 200038c <__app_func_weak_from_thumb\+0xc> + .*: e08cf00f add pc, ip, pc + .*: fdffff28 .word 0xfdffff28 + +.* <__app_func_from_thumb>: + .*: 4778 bx pc + .*: 46c0 nop ; \(mov r8, r8\) + .*: e59fc000 ldr ip, \[pc\] ; 200039c <__app_func_from_thumb\+0xc> + .*: e08cf00f add pc, ip, pc + .*: fdffff08 .word 0xfdffff08 + +.* <lib_func3>: + .*: e59fc004 ldr ip, \[pc, #4\] ; 20003ac <lib_func3\+0xc> + .*: e08cc00f add ip, ip, pc + .*: e12fff1c bx ip + .*: ffffffc5 .word 0xffffffc5 + +.* <lib_func2>: + .*: e59fc004 ldr ip, \[pc, #4\] ; 20003bc <lib_func2\+0xc> + .*: e08cc00f add ip, ip, pc + .*: e12fff1c bx ip + .*: feffff55 .word 0xfeffff55 diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-mixed-lib.d b/binutils-2.24/ld/testsuite/ld-arm/farcall-mixed-lib.d new file mode 100644 index 0000000..05578f4 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-mixed-lib.d @@ -0,0 +1,92 @@ +tmpdir/farcall-mixed-lib.so: file format elf32-(little|big)arm +architecture: armv5t, flags 0x00000150: +HAS_SYMS, DYNAMIC, D_PAGED +start address 0x.* + +Disassembly of section .plt: + +.* <.plt>: + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) + .*: e59fe004 ldr lr, \[pc, #4\] ; .* <lib_func1-0x.*> + .*: e08fe00e add lr, pc, lr + .*: e5bef008 ldr pc, \[lr, #8\]! + .*: .* + .*: e28fc6.* add ip, pc, #.* + .*: e28cca.* add ip, ip, #.* ; 0x.* + .*: e5bcf.* ldr pc, \[ip, #.*\]!.* + .*: e28fc6.* add ip, pc, #.* + .*: e28cca.* add ip, ip, #.* ; 0x.* + .*: e5bcf.* ldr pc, \[ip, #.*\]!.* + .*: e28fc6.* add ip, pc, #.* + .*: e28cca.* add ip, ip, #.* ; 0x.* + .*: e5bcf.* ldr pc, \[ip, #.*\]!.* + .*: e28fc6.* add ip, pc, #.* + .*: e28cca.* add ip, ip, #.* ; 0x.* + .*: e5bcf.* ldr pc, \[ip, #.*\]!.* + +Disassembly of section .text: + +.* <lib_func1>: + .*: e1a0c00d mov ip, sp + .*: e92dd800 push {fp, ip, lr, pc} + .*: ebffff.. bl .* <lib_func1-0x..?> + .*: ebffff.. bl .* <lib_func1-0x..?> + .*: ebfffff. bl .* <lib_func1-0x..?> + .*: ebfffff. bl .* <lib_func1-0x..?> + .*: e89d6800 ldm sp, {fp, sp, lr} + .*: e12fff1e bx lr + ... + +.* <lib_func2>: + .*: f000 e820 blx 1000344 <__app_func_from_thumb> + .*: f000 e812 blx 100032c <__app_func_weak_from_thumb> + .*: f000 e80a blx 1000320 <__lib_func3_from_thumb> + .*: f000 e814 blx 1000338 <__lib_func4_from_thumb> + .*: 4770 bx lr + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) + +.* <__lib_func3_from_thumb>: + .*: e59fc000 ldr ip, \[pc\] ; 1000328 <__lib_func3_from_thumb\+0x8> + .*: e08ff00c add pc, pc, ip + .*: feffff90 .word 0xfeffff90 + +.* <__app_func_weak_from_thumb>: + .*: e59fc000 ldr ip, \[pc\] ; 1000334 <__app_func_weak_from_thumb\+0x8> + .*: e08ff00c add pc, pc, ip + .*: feffff78 .word 0xfeffff78 + +.* <__lib_func4_from_thumb>: + .*: e59fc000 ldr ip, \[pc\] ; 1000340 <__lib_func4_from_thumb\+0x8> + .*: e08ff00c add pc, pc, ip + .*: feffff84 .word 0xfeffff84 + +.* <__app_func_from_thumb>: + .*: e59fc000 ldr ip, \[pc\] ; 100034c <__app_func_from_thumb\+0x8> + .*: e08ff00c add pc, pc, ip + .*: feffff54 .word 0xfeffff54 + ... + +.* <lib_func3>: + .*: f000 e80c blx 200037c <__app_func_from_thumb> + .*: f000 e804 blx 2000370 <__app_func_weak_from_thumb> + .*: 4770 bx lr + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) + +.* <__app_func_weak_from_thumb>: + .*: e59fc000 ldr ip, \[pc\] ; 2000378 <__app_func_weak_from_thumb\+0x8> + .*: e08ff00c add pc, pc, ip + .*: fdffff34 .word 0xfdffff34 + +.* <__app_func_from_thumb>: + .*: e59fc000 ldr ip, \[pc\] ; 2000384 <__app_func_from_thumb\+0x8> + .*: e08ff00c add pc, pc, ip + .*: fdffff1c .word 0xfdffff1c + ... diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-mixed-lib.r b/binutils-2.24/ld/testsuite/ld-arm/farcall-mixed-lib.r new file mode 100644 index 0000000..a44f83b --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-mixed-lib.r @@ -0,0 +1,8 @@ + +tmpdir/farcall-mixed-lib.so: file format elf32-(little|big)arm + +DYNAMIC RELOCATION RECORDS +OFFSET TYPE VALUE +.* R_ARM_JUMP_SLOT app_func2 + + diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-mixed-lib1.s b/binutils-2.24/ld/testsuite/ld-arm/farcall-mixed-lib1.s new file mode 100644 index 0000000..dea26b9 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-mixed-lib1.s @@ -0,0 +1,34 @@ +@ Create a large shared library so that calls through PLT to an undef +@ symbol require insertion of a long branch stub. +@ Check also calls to an undef weak symbol. + + .text + + .p2align 4 + .globl lib_func1 + .type lib_func1, %function +lib_func1: + mov ip, sp + stmdb sp!, {r11, ip, lr, pc} + bl app_func + .weak app_func_weak + bl app_func_weak + bl lib_func3 + bl lib_func4 + ldmia sp, {r11, sp, lr} + bx lr + .size lib_func1, . - lib_func1 + + .space 0x1000000 + .p2align 4 + .globl lib_func2 + .type lib_func2, %function + .thumb_func + .code 16 +lib_func2: + bl app_func + bl app_func_weak + bl lib_func3 + bl lib_func4 + bx lr + .size lib_func2, . - lib_func2 diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-mixed-lib2.s b/binutils-2.24/ld/testsuite/ld-arm/farcall-mixed-lib2.s new file mode 100644 index 0000000..b75c534 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-mixed-lib2.s @@ -0,0 +1,18 @@ +@ Create a large shared library so that calls through PLT to an undef +@ symbol require insertion of a long branch stub. +@ Check also calls to an undef weak symbol. + + .text + + .space 0x1000000 + .p2align 4 + .globl lib_func3 + .type lib_func3, %function + .thumb_func + .code 16 +lib_func3: + bl app_func + .weak app_func_weak + bl app_func_weak + bx lr + .size lib_func3, . - lib_func3 diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-section.d b/binutils-2.24/ld/testsuite/ld-arm/farcall-section.d new file mode 100644 index 0000000..4e6d37d --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-section.d @@ -0,0 +1,5 @@ +#name: ARM-ARM farcall to symbol of type STT_SECTION +#source: farcall-section.s +#as: +#ld: -Ttext 0x1000 --section-start .foo=0x2001014 +#error: .*\(.text\+0x0\): relocation truncated to fit: R_ARM_CALL against `.foo' diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-section.s b/binutils-2.24/ld/testsuite/ld-arm/farcall-section.s new file mode 100644 index 0000000..31c9038 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-section.s @@ -0,0 +1,20 @@ +@ Test to ensure that a ARM to ARM call exceeding 32Mb generates an error +@ if the destination is of type STT_SECTION (eg non-global symbol) + + .global _start + .syntax unified + +@ We will place the section .text at 0x1000. + + .text + +_start: + bl bar + +@ We will place the section .foo at 0x2001020. + + .section .foo, "xa" + +bar: + bx lr + diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-arm-blx-pic-veneer.d b/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-arm-blx-pic-veneer.d new file mode 100644 index 0000000..ba10356 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-arm-blx-pic-veneer.d @@ -0,0 +1,18 @@ +.*: file format .* + +Disassembly of section .text: + +01c01010 <_start>: + 1c01010: f300 e802 blx 1f01018 <__bar_from_thumb> + \.\.\. + 1f01014: f0ff effe blx 2001014 <bar> + +01f01018 <__bar_from_thumb>: + 1f01018: e59fc000 ldr ip, \[pc\] ; 1f01020 <__bar_from_thumb\+0x8> + 1f0101c: e08ff00c add pc, pc, ip + 1f01020: 000ffff0 .word 0x000ffff0 + 1f01024: 00000000 .word 0x00000000 +Disassembly of section .foo: + +02001014 <bar>: + 2001014: e12fff1e bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-arm-blx.d b/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-arm-blx.d new file mode 100644 index 0000000..4a2b36a --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-arm-blx.d @@ -0,0 +1,16 @@ +.*: file format .* + +Disassembly of section .text: + +01c01010 <_start>: + 1c01010: f300 e802 blx 1f01018 <__bar_from_thumb> + \.\.\. + 1f01014: f0ff effe blx 2001014 <bar> + +01f01018 <__bar_from_thumb>: + 1f01018: e51ff004 ldr pc, \[pc, #-4\] ; 1f0101c <__bar_from_thumb\+0x4> + 1f0101c: 02001014 .word 0x02001014 +Disassembly of section .foo: + +02001014 <bar>: + 2001014: e12fff1e bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-arm-pic-veneer.d b/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-arm-pic-veneer.d new file mode 100644 index 0000000..aff4df7 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-arm-pic-veneer.d @@ -0,0 +1,20 @@ +.*: file format .* + +Disassembly of section .text: + +01c01010 <_start>: + 1c01010: f300 f802 bl 1f01018 <__bar_from_thumb> + ... + 1f01014: f000 f800 bl 1f01018 <__bar_from_thumb> + +01f01018 <__bar_from_thumb>: + 1f01018: 4778 bx pc + 1f0101a: 46c0 nop ; \(mov r8, r8\) + 1f0101c: e59fc000 ldr ip, \[pc\] ; 1f01024 <__bar_from_thumb\+0xc> + 1f01020: e08cf00f add pc, ip, pc + 1f01024: 000fffec .word 0x000fffec + +Disassembly of section .foo: + +02001014 <bar>: + 2001014: e12fff1e bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-arm-short.d b/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-arm-short.d new file mode 100644 index 0000000..4e19039 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-arm-short.d @@ -0,0 +1,17 @@ +.*: file format .* + +Disassembly of section .text: + +00001000 <_start>: + 1000: f000 f802 bl 1008 <__bar_from_thumb> + 1004: 0000 movs r0, r0 + \.\.\. + +00001008 <__bar_from_thumb>: + 1008: 4778 bx pc + 100a: 46c0 nop ; \(mov r8, r8\) + 100c: ea000400 b 2014 <bar> +Disassembly of section .foo: + +00002014 <bar>: + 2014: e12fff1e bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-arm-short.s b/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-arm-short.s new file mode 100644 index 0000000..1865380 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-arm-short.s @@ -0,0 +1,21 @@ +@ Test to ensure that a Thumb to ARM call within 4Mb does not generate a stub. + + .global _start + .syntax unified + +@ We will place the section .text at 0x1000. + + .text + .thumb_func +_start: + bl bar + +@ We will place the section .foo at 0x2014. + + .section .foo, "xa" + + .arm + .type bar, %function +bar: + bx lr + diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-arm.d b/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-arm.d new file mode 100644 index 0000000..5dc377a --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-arm.d @@ -0,0 +1,25 @@ +.*: file format .* + +Disassembly of section .text: + +01c01010 <_start>: + 1c01010: f300 f802 bl 1f01018 <__bar_from_thumb> + \.\.\. + 1f01014: f000 f806 bl 1f01024 <__bar_from_thumb> + +01f01018 <__bar_from_thumb>: + 1f01018: 4778 bx pc + 1f0101a: 46c0 nop ; \(mov r8, r8\) + 1f0101c: e51ff004 ldr pc, \[pc, #-4\] ; 1f01020 <__bar_from_thumb\+0x8> + 1f01020: 02001014 .word 0x02001014 + +01f01024 <__bar_from_thumb>: + 1f01024: 4778 bx pc + 1f01026: 46c0 nop ; \(mov r8, r8\) + 1f01028: ea03fff9 b 2001014 <bar> + 1f0102c: 00000000 andeq r0, r0, r0 + +Disassembly of section .foo: + +02001014 <bar>: + 2001014: e12fff1e bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-arm.s b/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-arm.s new file mode 100644 index 0000000..1fd6a07 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-arm.s @@ -0,0 +1,27 @@ +@ Test to ensure that a Thumb to ARM call exceeding 4Mb generates a stub. +@ Check that we can generate two types of stub in the same section. + + .global _start + .syntax unified + +@ We will place the section .text at 0x1c01010. + + .text + .thumb_func +_start: + .global bar + bl bar +@ This call is close enough to generate a "short branch" stub +@ or no stub if blx is available. + .space 0x0300000 + bl bar + +@ We will place the section .foo at 0x2001014. + + .section .foo, "xa" + + .arm + .type bar, %function +bar: + bx lr + diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-thumb-blx-pic-veneer.d b/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-thumb-blx-pic-veneer.d new file mode 100644 index 0000000..27b208e --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-thumb-blx-pic-veneer.d @@ -0,0 +1,18 @@ +.*: file format .* + +Disassembly of section .text: + +00001000 <_start>: + 1000: f000 e802 blx 1008 <__bar_veneer> + 1004: 0000 movs r0, r0 + \.\.\. + +00001008 <__bar_veneer>: + 1008: e59fc004 ldr ip, \[pc, #4\] ; 1014 <__bar_veneer\+0xc> + 100c: e08fc00c add ip, pc, ip + 1010: e12fff1c bx ip + 1014: 02000001 .word 0x02000001 +Disassembly of section .foo: + +02001014 <bar>: + 2001014: 4770 bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-thumb-blx.d b/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-thumb-blx.d new file mode 100644 index 0000000..7998746 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-thumb-blx.d @@ -0,0 +1,16 @@ +.*: file format .* + +Disassembly of section .text: + +00001000 <_start>: + 1000: f000 e802 blx 1008 <__bar_veneer> + 1004: 0000 movs r0, r0 + \.\.\. + +00001008 <__bar_veneer>: + 1008: e51ff004 ldr pc, \[pc, #-4\] ; 100c <__bar_veneer\+0x4> + 100c: 02001015 .word 0x02001015 +Disassembly of section .foo: + +02001014 <bar>: + 2001014: 4770 bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-thumb-m-pic-veneer.d b/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-thumb-m-pic-veneer.d new file mode 100644 index 0000000..974c1e9 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-thumb-m-pic-veneer.d @@ -0,0 +1,22 @@ +.*: file format .* + +Disassembly of section .text: + +00001000 <_start>: + 1000: f000 f802 bl 1008 <__bar_veneer> + 1004: 0000 movs r0, r0 + ... + +00001008 <__bar_veneer>: + 1008: b401 push {r0} + 100a: 4802 ldr r0, \[pc, #8\] ; \(1014 <__bar_veneer\+0xc>\) + 100c: 46fc mov ip, pc + 100e: 4484 add ip, r0 + 1010: bc01 pop {r0} + 1012: 4760 bx ip + 1014: 02000005 .word 0x02000005 + +Disassembly of section .foo: + +02001014 <bar>: + 2001014: 4770 bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-thumb-m.d b/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-thumb-m.d new file mode 100644 index 0000000..e63b3f8 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-thumb-m.d @@ -0,0 +1,21 @@ +.*: file format .* + +Disassembly of section .text: + +00001000 <_start>: + 1000: f000 f802 bl 1008 <__bar_veneer> + 1004: 0000 movs r0, r0 + \.\.\. + +00001008 <__bar_veneer>: + 1008: b401 push {r0} + 100a: 4802 ldr r0, \[pc, #8\] ; \(1014 <__bar_veneer\+0xc>\) + 100c: 4684 mov ip, r0 + 100e: bc01 pop {r0} + 1010: 4760 bx ip + 1012: bf00 nop + 1014: 02001015 .word 0x02001015 +Disassembly of section .foo: + +02001014 <bar>: + 2001014: 4770 bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-thumb-pic-veneer.d b/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-thumb-pic-veneer.d new file mode 100644 index 0000000..8b14599 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-thumb-pic-veneer.d @@ -0,0 +1,22 @@ +.*: file format .* + +Disassembly of section .text: + +00001000 <_start>: + 1000: f000 f802 bl 1008 <__bar_veneer> + 1004: 0000 movs r0, r0 + ... + +00001008 <__bar_veneer>: + 1008: 4778 bx pc + 100a: 46c0 nop ; \(mov r8, r8\) + 100c: e59fc004 ldr ip, \[pc, #4\] ; 1018 <__bar_veneer\+0x10> + 1010: e08fc00c add ip, pc, ip + 1014: e12fff1c bx ip + 1018: 01fffffd .word 0x01fffffd + 101c: 00000000 .word 0x00000000 + +Disassembly of section .foo: + +02001014 <bar>: + 2001014: 4770 bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-thumb.d b/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-thumb.d new file mode 100644 index 0000000..4f4c2c9 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-thumb.d @@ -0,0 +1,19 @@ +.*: file format .* + +Disassembly of section .text: + +00001000 <_start>: + 1000: f000 f802 bl 1008 <__bar_veneer> + 1004: 0000 movs r0, r0 + \.\.\. + +00001008 <__bar_veneer>: + 1008: 4778 bx pc + 100a: 46c0 nop ; \(mov r8, r8\) + 100c: e59fc000 ldr ip, \[pc\] ; 1014 <__bar_veneer\+0xc> + 1010: e12fff1c bx ip + 1014: 02001015 .word 0x02001015 +Disassembly of section .foo: + +02001014 <bar>: + 2001014: 4770 bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-thumb.s b/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-thumb.s new file mode 100644 index 0000000..650b1a6 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/farcall-thumb-thumb.s @@ -0,0 +1,19 @@ +@ Test to ensure that a Thumb to Thumb call exceeding 4Mb generates a stub. + + .global _start + .syntax unified + +@ We will place the section .text at 0x1000. + + .text + .thumb_func +_start: + bl bar + +@ We will place the section .foo at 0x02001014. + + .section .foo, "xa" + .thumb_func +bar: + bx lr + diff --git a/binutils-2.24/ld/testsuite/ld-arm/fix-arm1176-off.d b/binutils-2.24/ld/testsuite/ld-arm/fix-arm1176-off.d new file mode 100644 index 0000000..89f01e2 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/fix-arm1176-off.d @@ -0,0 +1,17 @@ + +.*: file format elf32-littlearm.* + + +Disassembly of section .foo: + +[0-9a-f]+ <_start>: + +[0-9a-f]+: f000 e800 blx 2001018 <__func_to_branch_to_veneer> + +[0-9a-f]+ <__func_to_branch_to_veneer>: + +[0-9a-f]+: e51ff004 ldr pc, \[pc, #-4\] ; 200101c <__func_to_branch_to_veneer\+0x4> + +[0-9a-f]+: ........ .word 0x........ + +Disassembly of section .text: + +[0-9a-f]+ <func_to_branch_to>: + +[0-9a-f]+: e12fff1e bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/fix-arm1176-on.d b/binutils-2.24/ld/testsuite/ld-arm/fix-arm1176-on.d new file mode 100644 index 0000000..6417a33 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/fix-arm1176-on.d @@ -0,0 +1,20 @@ + +.+: file format elf32-littlearm.* + + +Disassembly of section .foo: + +[0-9a-f]+ <_start>: + +[0-9a-f]+: f000 f800 bl 2001018 <__func_to_branch_to_veneer> + +[0-9a-f]+ <__func_to_branch_to_veneer>: + +[0-9a-f]+: 4778 bx pc + +[0-9a-f]+: 46c0 nop ; \(mov r8, r8\) + +[0-9a-f]+: e51ff004 ldr pc, \[pc, #-4\] ; 2001020 <__func_to_branch_to_veneer\+0x8> + +[0-9a-f]+: ........ .word 0x........ + +[0-9a-f]+: 00000000 .word 0x00000000 + +Disassembly of section .text: + +[0-9a-f]+ <func_to_branch_to>: + +[0-9a-f]+: e12fff1e bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/fix-arm1176.s b/binutils-2.24/ld/testsuite/ld-arm/fix-arm1176.s new file mode 100644 index 0000000..96e0328 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/fix-arm1176.s @@ -0,0 +1,15 @@ + .syntax unified + .globl _start + .globl func_to_branch_to + + .arm + .text +func_to_branch_to: + bx lr + + .thumb + .section .foo, "xa" + .thumb_func +_start: + bl func_to_branch_to + diff --git a/binutils-2.24/ld/testsuite/ld-arm/gc-hidden-1.d b/binutils-2.24/ld/testsuite/ld-arm/gc-hidden-1.d new file mode 100644 index 0000000..fe77abc --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/gc-hidden-1.d @@ -0,0 +1,25 @@ +#target: arm*-*-*eabi* +#source: main.s +#source: gcdfn.s +#source: hidfn.s +#ld: --gc-sections --shared --version-script hideall.ld +#objdump: -dRT + +# See PR ld/13990: a forced-local PLT reference to a +# forced-local symbol is GC'ed, trigging a BFD_ASSERT. + +.*: file format elf32-.* + +DYNAMIC SYMBOL TABLE: +0+124 l d .text 0+ .text +0+ g DO \*ABS\* 0+ NS NS + +Disassembly of section .text: + +0+124 <_start>: + 124: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) + 128: eb000000 bl 130 <hidfn> + 12c: e8bd8000 ldmfd sp!, {pc} + +0+130 <hidfn>: + 130: e8bd8000 ldmfd sp!, {pc} diff --git a/binutils-2.24/ld/testsuite/ld-arm/gc-thumb-lib.s b/binutils-2.24/ld/testsuite/ld-arm/gc-thumb-lib.s new file mode 100644 index 0000000..2065d35 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/gc-thumb-lib.s @@ -0,0 +1,6 @@ + .data + .globl foo + .type foo,%object + .size foo,4 +foo: + .word 0 diff --git a/binutils-2.24/ld/testsuite/ld-arm/gc-thumb.d b/binutils-2.24/ld/testsuite/ld-arm/gc-thumb.d new file mode 100644 index 0000000..9a75562 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/gc-thumb.d @@ -0,0 +1,2 @@ + +There are no relocations in this file\. diff --git a/binutils-2.24/ld/testsuite/ld-arm/gc-thumb.s b/binutils-2.24/ld/testsuite/ld-arm/gc-thumb.s new file mode 100644 index 0000000..4051f8d --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/gc-thumb.s @@ -0,0 +1,11 @@ + .arch armv7-a + .syntax unified + .text + .globl _start +_start: + mov pc,lr + + .section .text.foo,"ax",%progbits + .thumb + movw r0,#:lower16:foo-. + movt r0,#:upper16:foo-. diff --git a/binutils-2.24/ld/testsuite/ld-arm/gc-unwind.d b/binutils-2.24/ld/testsuite/ld-arm/gc-unwind.d new file mode 100644 index 0000000..fbb7911 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/gc-unwind.d @@ -0,0 +1,5 @@ + +.*: file format.* + +Contents of section .data: + [^ ]* 22222222 .* diff --git a/binutils-2.24/ld/testsuite/ld-arm/gc-unwind.s b/binutils-2.24/ld/testsuite/ld-arm/gc-unwind.s new file mode 100644 index 0000000..c5326c2 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/gc-unwind.s @@ -0,0 +1,38 @@ +@ Test -gc-sections and unwinding tables. .data.eh should be pulled in +@ via the EH tables, .data.foo should not. +.text +.global _start +.fnstart +_start: +bx lr +.personality my_pr +.handlerdata +.word 0 +.fnend + +.section .data.foo +my_foo: +.word 0x11111111 + +.section .text.foo +.fnstart +foo: +bx lr +.personality my_pr +.handlerdata +.word my_foo +.fnend + +.section .data.eh +my_eh: +.word 0x22222222 + +.section .text.eh +.fnstart +my_pr: +bx lr +.personality my_pr +.handlerdata +.word my_eh +.fnend + diff --git a/binutils-2.24/ld/testsuite/ld-arm/gcdfn.s b/binutils-2.24/ld/testsuite/ld-arm/gcdfn.s new file mode 100644 index 0000000..f2afae7 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/gcdfn.s @@ -0,0 +1,8 @@ + .text + .globl gcdfn + .type gcdfn, %function +gcdfn: + str lr, [sp, #-4]! + bl hidfn(PLT) + ldmfd sp!, {pc} + .size gcdfn, . - gcdfn diff --git a/binutils-2.24/ld/testsuite/ld-arm/group-relocs-alu-bad-2.d b/binutils-2.24/ld/testsuite/ld-arm/group-relocs-alu-bad-2.d new file mode 100644 index 0000000..1f86ae4 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/group-relocs-alu-bad-2.d @@ -0,0 +1,4 @@ +#name: ALU group relocations failure test +#source: group-relocs-alu-bad-2.s +#ld: -Ttext 0x8000 --section-start foo=0x1208000 +#error: Overflow whilst splitting 0x1234 for group relocation diff --git a/binutils-2.24/ld/testsuite/ld-arm/group-relocs-alu-bad-2.s b/binutils-2.24/ld/testsuite/ld-arm/group-relocs-alu-bad-2.s new file mode 100644 index 0000000..4d28689 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/group-relocs-alu-bad-2.s @@ -0,0 +1,16 @@ +@ Test intended to fail for ALU group relocations. + +@ We will place .text at 0x8000. + + .text + .globl _start + +_start: + add r0, r0, #:sb_g0:(bar) + +@ We will place the section foo at 0x1208000 but that should be irrelevant +@ for sb_g* relocations. + + .section foo + .set bar,foo + 0x1234 + diff --git a/binutils-2.24/ld/testsuite/ld-arm/group-relocs-alu-bad.d b/binutils-2.24/ld/testsuite/ld-arm/group-relocs-alu-bad.d new file mode 100644 index 0000000..0346db1 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/group-relocs-alu-bad.d @@ -0,0 +1,4 @@ +#name: ALU group relocations failure test +#source: group-relocs-alu-bad.s +#ld: -Ttext 0x8000 --section-start foo=0x9010 +#error: Overflow whilst splitting 0x1010 for group relocation diff --git a/binutils-2.24/ld/testsuite/ld-arm/group-relocs-alu-bad.s b/binutils-2.24/ld/testsuite/ld-arm/group-relocs-alu-bad.s new file mode 100644 index 0000000..e644669 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/group-relocs-alu-bad.s @@ -0,0 +1,20 @@ +@ Test intended to fail for ALU group relocations. +@ +@ Beware when editing this file: it is carefully crafted so that +@ a specific PC-relative offset arises. + +@ We will place .text at 0x8000. + + .text + .globl _start + +_start: + add r0, r0, #:pc_g0:(bar) + +@ We will place the section foo at 0x9004. + + .section foo + +bar: + mov r0, #0 + diff --git a/binutils-2.24/ld/testsuite/ld-arm/group-relocs-ldc-bad-2.d b/binutils-2.24/ld/testsuite/ld-arm/group-relocs-ldc-bad-2.d new file mode 100644 index 0000000..e66b6d8 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/group-relocs-ldc-bad-2.d @@ -0,0 +1,4 @@ +#name: LDC group relocations failure test +#source: group-relocs-ldc-bad-2.s +#ld: -Ttext 0x8000 --section-start foo=0x118400 +#error: Overflow whilst splitting 0x123456 for group relocation diff --git a/binutils-2.24/ld/testsuite/ld-arm/group-relocs-ldc-bad-2.s b/binutils-2.24/ld/testsuite/ld-arm/group-relocs-ldc-bad-2.s new file mode 100644 index 0000000..4fa0f4d --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/group-relocs-ldc-bad-2.s @@ -0,0 +1,17 @@ +@ Test intended to fail for LDC group relocations. + +@ We will place .text at 0x8000. + + .text + .globl _start + +_start: + add r0, r0, #:sb_g0_nc:(bar) + ldc 0, c0, [r0, #:sb_g1:(bar)] + +@ We will place the section foo at 0x118400 but that should be irrelevant +@ for sb_g* relocations. + + .section foo + .set bar,foo + 0x123456 + diff --git a/binutils-2.24/ld/testsuite/ld-arm/group-relocs-ldc-bad.d b/binutils-2.24/ld/testsuite/ld-arm/group-relocs-ldc-bad.d new file mode 100644 index 0000000..d4bfb2d --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/group-relocs-ldc-bad.d @@ -0,0 +1,4 @@ +#name: LDC group relocations failure test +#source: group-relocs-ldc-bad.s +#ld: -Ttext 0x8000 --section-start foo=0x118400 +#error: Overflow whilst splitting 0x110400 for group relocation diff --git a/binutils-2.24/ld/testsuite/ld-arm/group-relocs-ldc-bad.s b/binutils-2.24/ld/testsuite/ld-arm/group-relocs-ldc-bad.s new file mode 100644 index 0000000..611255b --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/group-relocs-ldc-bad.s @@ -0,0 +1,19 @@ +@ Test intended to fail for LDC group relocations. + +@ We will place .text at 0x8000. + + .text + .globl _start + +_start: + add r0, r0, #:pc_g0_nc:(bar) + ldc 0, c0, [r0, #:pc_g1:(bar + 4)] + +@ We will place the section foo at 0x118400. +@ (The relocations above would be OK if it were at 0x118200, for example.) + + .section foo + +bar: + mov r0, #0 + diff --git a/binutils-2.24/ld/testsuite/ld-arm/group-relocs-ldr-bad-2.d b/binutils-2.24/ld/testsuite/ld-arm/group-relocs-ldr-bad-2.d new file mode 100644 index 0000000..611d826 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/group-relocs-ldr-bad-2.d @@ -0,0 +1,4 @@ +#name: LDR group relocations failure test +#source: group-relocs-ldr-bad-2.s +#ld: -Ttext 0x8000 --section-start foo=0x8001000 +#error: .*Overflow whilst splitting 0x7ff9000 for group relocation.* diff --git a/binutils-2.24/ld/testsuite/ld-arm/group-relocs-ldr-bad-2.s b/binutils-2.24/ld/testsuite/ld-arm/group-relocs-ldr-bad-2.s new file mode 100644 index 0000000..3aec8ee --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/group-relocs-ldr-bad-2.s @@ -0,0 +1,18 @@ +@ Test intended to fail for LDR group relocations. + +@ We will place .text at 0x8000. + + .text + .globl _start + +_start: + add r0, r0, #:pc_g0_nc:(bar) + ldr r1, [r0, #:pc_g1:(bar + 4)] + +@ We will place the section foo at 0x8001000. + + .section foo + +bar: + mov r0, #0 + diff --git a/binutils-2.24/ld/testsuite/ld-arm/group-relocs-ldr-bad.d b/binutils-2.24/ld/testsuite/ld-arm/group-relocs-ldr-bad.d new file mode 100644 index 0000000..76f3df1 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/group-relocs-ldr-bad.d @@ -0,0 +1,4 @@ +#name: LDR group relocations failure test +#source: group-relocs-ldr-bad.s +#ld: -Ttext 0x8000 --section-start foo=0x8001000 +#error: .*Overflow whilst splitting 0x123456 for group relocation.* diff --git a/binutils-2.24/ld/testsuite/ld-arm/group-relocs-ldr-bad.s b/binutils-2.24/ld/testsuite/ld-arm/group-relocs-ldr-bad.s new file mode 100644 index 0000000..02d01c2 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/group-relocs-ldr-bad.s @@ -0,0 +1,17 @@ +@ Test intended to fail for LDR group relocations. + +@ We will place .text at 0x8000. + + .text + .globl _start + +_start: + add r0, r0, #:sb_g0_nc:(bar) + ldr r1, [r0, #:sb_g1:(bar)] + +@ We will place the section foo at 0x8001000 but that should be irrelevant +@ for sb_g* relocations. + + .section foo + .set bar,foo + 0x123456 + diff --git a/binutils-2.24/ld/testsuite/ld-arm/group-relocs-ldrs-bad-2.d b/binutils-2.24/ld/testsuite/ld-arm/group-relocs-ldrs-bad-2.d new file mode 100644 index 0000000..9d1c900 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/group-relocs-ldrs-bad-2.d @@ -0,0 +1,4 @@ +#name: LDRS group relocations failure test +#source: group-relocs-ldrs-bad-2.s +#ld: -Ttext 0x8000 --section-start foo=0x8000100 +#error: Overflow whilst splitting 0x7ff8100 for group relocation diff --git a/binutils-2.24/ld/testsuite/ld-arm/group-relocs-ldrs-bad-2.s b/binutils-2.24/ld/testsuite/ld-arm/group-relocs-ldrs-bad-2.s new file mode 100644 index 0000000..3578060 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/group-relocs-ldrs-bad-2.s @@ -0,0 +1,17 @@ +@ Test intended to fail for LDRS group relocations. + +@ We will place .text at 0x8000. + + .text + .globl _start + +_start: + add r0, r0, #:pc_g0_nc:(bar) + ldrd r2, [r0, #:pc_g1:(bar + 4)] + +@ We will place the section foo at 0x8000100. + + .section foo + +bar: + mov r0, #0 diff --git a/binutils-2.24/ld/testsuite/ld-arm/group-relocs-ldrs-bad.d b/binutils-2.24/ld/testsuite/ld-arm/group-relocs-ldrs-bad.d new file mode 100644 index 0000000..e5296f9 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/group-relocs-ldrs-bad.d @@ -0,0 +1,4 @@ +#name: LDRS group relocations failure test +#source: group-relocs-ldrs-bad.s +#ld: -Ttext 0x8000 --section-start foo=0x8000100 +#error: Overflow whilst splitting 0x123456 for group relocation diff --git a/binutils-2.24/ld/testsuite/ld-arm/group-relocs-ldrs-bad.s b/binutils-2.24/ld/testsuite/ld-arm/group-relocs-ldrs-bad.s new file mode 100644 index 0000000..02cf560 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/group-relocs-ldrs-bad.s @@ -0,0 +1,17 @@ +@ Test intended to fail for LDRS group relocations. + +@ We will place .text at 0x8000. + + .text + .globl _start + +_start: + add r0, r0, #:sb_g0_nc:(bar) + ldrd r2, [r0, #:sb_g1:(bar)] + +@ We will place the section foo at 0x8000100 but that should be irrelevant +@ for sb_g* relocations. + + .section foo + .set bar,foo + 0x123456 + diff --git a/binutils-2.24/ld/testsuite/ld-arm/group-relocs.d b/binutils-2.24/ld/testsuite/ld-arm/group-relocs.d new file mode 100644 index 0000000..d928261 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/group-relocs.d @@ -0,0 +1,67 @@ + +tmpdir/group-relocs: file format elf32-(little|big)arm.* + +Disassembly of section .text: + +00008000 <_start>: + 8000: e28f00bc add r0, pc, #188 ; 0xbc + 8004: e28f0c6e add r0, pc, #28160 ; 0x6e00 + 8008: e28000ec add r0, r0, #236 ; 0xec + 800c: e28f08ff add r0, pc, #16711680 ; 0xff0000 + 8010: e2800c6e add r0, r0, #28160 ; 0x6e00 + 8014: e28000e4 add r0, r0, #228 ; 0xe4 + 8018: e280000c add r0, r0, #12 + 801c: e2800cee add r0, r0, #60928 ; 0xee00 + 8020: e28000f0 add r0, r0, #240 ; 0xf0 + 8024: e28008ff add r0, r0, #16711680 ; 0xff0000 + 8028: e2800cee add r0, r0, #60928 ; 0xee00 + 802c: e28000f0 add r0, r0, #240 ; 0xf0 + 8030: e28f0c6e add r0, pc, #28160 ; 0x6e00 + 8034: e59010c0 ldr r1, \[r0, #192\].* + 8038: e28f08ff add r0, pc, #16711680 ; 0xff0000 + 803c: e2800c6e add r0, r0, #28160 ; 0x6e00 + 8040: e59010b8 ldr r1, \[r0, #184\].* + 8044: e590100c ldr r1, \[r0, #12\] + 8048: e2800cee add r0, r0, #60928 ; 0xee00 + 804c: e59010f0 ldr r1, \[r0, #240\].* + 8050: e28008ff add r0, r0, #16711680 ; 0xff0000 + 8054: e2800cee add r0, r0, #60928 ; 0xee00 + 8058: e59010f0 ldr r1, \[r0, #240\].* + 805c: e1cf26d0 ldrd r2, \[pc, #96\].* + 8060: e28f0c6e add r0, pc, #28160 ; 0x6e00 + 8064: e1c029d0 ldrd r2, \[r0, #144\].* + 8068: e28f08ff add r0, pc, #16711680 ; 0xff0000 + 806c: e2800c6e add r0, r0, #28160 ; 0x6e00 + 8070: e1c028d8 ldrd r2, \[r0, #136\].* + 8074: e1c020dc ldrd r2, \[r0, #12\] + 8078: e2800cee add r0, r0, #60928 ; 0xee00 + 807c: e1c02fd0 ldrd r2, \[r0, #240\].* + 8080: e28008ff add r0, r0, #16711680 ; 0xff0000 + 8084: e2800cee add r0, r0, #60928 ; 0xee00 + 8088: e1c02fd0 ldrd r2, \[r0, #240\].* + 808c: ed9f000c ldc 0, cr0, \[pc, #48\].* + 8090: e28f0c6e add r0, pc, #28160 ; 0x6e00 + 8094: ed900018 ldc 0, cr0, \[r0, #96\].* + 8098: e28f08ff add r0, pc, #16711680 ; 0xff0000 + 809c: e2800c6e add r0, r0, #28160 ; 0x6e00 + 80a0: ed900016 ldc 0, cr0, \[r0, #88\].* + 80a4: ed900003 ldc 0, cr0, \[r0, #12\] + 80a8: e2800cee add r0, r0, #60928 ; 0xee00 + 80ac: ed90003c ldc 0, cr0, \[r0, #240\].* + 80b0: e28008ff add r0, r0, #16711680 ; 0xff0000 + 80b4: e2800cee add r0, r0, #60928 ; 0xee00 + 80b8: ed90003c ldc 0, cr0, \[r0, #240\].* + +000080bc <one_group_needed_alu_pc>: + 80bc: e3a00000 mov r0, #0 + +Disassembly of section alpha: + +0000eef0 <two_groups_needed_alu_pc>: + eef0: e3a00000 mov r0, #0 + +Disassembly of section beta: + +00ffeef0 <three_groups_needed_alu_pc>: + ffeef0: e3a00000 mov r0, #0 +#... diff --git a/binutils-2.24/ld/testsuite/ld-arm/group-relocs.s b/binutils-2.24/ld/testsuite/ld-arm/group-relocs.s new file mode 100644 index 0000000..7b226c7 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/group-relocs.s @@ -0,0 +1,173 @@ +@ Tests for group relocations. +@ +@ Beware when editing this file: it is carefully crafted so that +@ specific PC- and SB-relative offsets arise. +@ +@ Note that the gas tests have already checked that group relocations are +@ handled in the same way for local and external symbols. + +@ We will place .text at 0x8000. + + .text + .globl _start + +_start: + @ ALU, PC-relative + + @ Instructions start at .text + 0x0 + add r0, r15, #:pc_g0:(one_group_needed_alu_pc) + + @ Instructions start at .text + 0x4 + add r0, r15, #:pc_g0_nc:(two_groups_needed_alu_pc) + add r0, r0, #:pc_g1:(two_groups_needed_alu_pc + 4) + + @ Instructions start at .text + 0xc + add r0, r15, #:pc_g0_nc:(three_groups_needed_alu_pc) + add r0, r0, #:pc_g1_nc:(three_groups_needed_alu_pc + 4) + add r0, r0, #:pc_g2:(three_groups_needed_alu_pc + 8) + + @ ALU, SB-relative + + @ Instructions start at .text + 0x18 + add r0, r0, #:sb_g0:(one_group_needed_alu_sb) + + @ Instructions start at .text + 0x1c + add r0, r0, #:sb_g0_nc:(two_groups_needed_alu_sb) + add r0, r0, #:sb_g1:(two_groups_needed_alu_sb) + + @ Instructions start at .text + 0x24 + add r0, r0, #:sb_g0_nc:(three_groups_needed_alu_sb) + add r0, r0, #:sb_g1_nc:(three_groups_needed_alu_sb) + add r0, r0, #:sb_g2:(three_groups_needed_alu_sb) + + @ LDR, PC-relative + + @ Instructions start at .text + 0x30 + add r0, pc, #:pc_g0_nc:(two_groups_needed_ldr_pc) + ldr r1, [r0, #:pc_g1:(two_groups_needed_ldr_pc + 4)] + + @ Instructions start at .text + 0x38 + add r0, pc, #:pc_g0_nc:(three_groups_needed_ldr_pc) + add r0, r0, #:pc_g1_nc:(three_groups_needed_ldr_pc + 4) + ldr r1, [r0, #:pc_g2:(three_groups_needed_ldr_pc + 8)] + + @ LDR, SB-relative + + @ Instructions start at .text + 0x44 + ldr r1, [r0, #:sb_g0:(one_group_needed_ldr_sb)] + + @ Instructions start at .text + 0x48 + add r0, r0, #:sb_g0_nc:(two_groups_needed_ldr_sb) + ldr r1, [r0, #:sb_g1:(two_groups_needed_ldr_sb)] + + @ Instructions start at .text + 0x50 + add r0, r0, #:sb_g0_nc:(three_groups_needed_ldr_sb) + add r0, r0, #:sb_g1_nc:(three_groups_needed_ldr_sb) + ldr r1, [r0, #:sb_g2:(three_groups_needed_ldr_sb)] + + @ LDRS, PC-relative + + @ Instructions start at .text + 0x5c + ldrd r2, [pc, #:pc_g0:(one_group_needed_ldrs_pc)] + + @ Instructions start at .text + 0x60 + add r0, pc, #:pc_g0_nc:(two_groups_needed_ldrs_pc) + ldrd r2, [r0, #:pc_g1:(two_groups_needed_ldrs_pc + 4)] + + @ Instructions start at .text + 0x68 + add r0, pc, #:pc_g0_nc:(three_groups_needed_ldrs_pc) + add r0, r0, #:pc_g1_nc:(three_groups_needed_ldrs_pc + 4) + ldrd r2, [r0, #:pc_g2:(three_groups_needed_ldrs_pc + 8)] + + @ LDRS, SB-relative + + @ Instructions start at .text + 0x74 + ldrd r2, [r0, #:sb_g0:(one_group_needed_ldrs_sb)] + + @ Instructions start at .text + 0x78 + add r0, r0, #:sb_g0_nc:(two_groups_needed_ldrs_sb) + ldrd r2, [r0, #:sb_g1:(two_groups_needed_ldrs_sb)] + + @ Instructions start at .text + 0x80 + add r0, r0, #:sb_g0_nc:(three_groups_needed_ldrs_sb) + add r0, r0, #:sb_g1_nc:(three_groups_needed_ldrs_sb) + ldrd r2, [r0, #:sb_g2:(three_groups_needed_ldrs_sb)] + + @ LDC, PC-relative + + @ Instructions start at .text + 0x8c + ldc 0, c0, [pc, #:pc_g0:(one_group_needed_ldc_pc)] + + @ Instructions start at .text + 0x90 + add r0, pc, #:pc_g0_nc:(two_groups_needed_ldc_pc) + ldc 0, c0, [r0, #:pc_g1:(two_groups_needed_ldc_pc + 4)] + + @ Instructions start at .text + 0x98 + add r0, pc, #:pc_g0_nc:(three_groups_needed_ldc_pc) + add r0, r0, #:pc_g1_nc:(three_groups_needed_ldc_pc + 4) + ldc 0, c0, [r0, #:pc_g2:(three_groups_needed_ldc_pc + 8)] + + @ LDC, SB-relative + + @ Instructions start at .text + 0xa4 + ldc 0, c0, [r0, #:sb_g0:(one_group_needed_ldc_sb)] + + @ Instructions start at .text + 0xa8 + add r0, r0, #:sb_g0_nc:(two_groups_needed_ldc_sb) + ldc 0, c0, [r0, #:sb_g1:(two_groups_needed_ldc_sb)] + + @ Instructions start at .text + 0xb0 + add r0, r0, #:sb_g0_nc:(three_groups_needed_ldc_sb) + add r0, r0, #:sb_g1_nc:(three_groups_needed_ldc_sb) + ldc 0, c0, [r0, #:sb_g2:(three_groups_needed_ldc_sb)] + +@ This point in the file is .text + 0xbc. + +one_group_needed_alu_pc: +one_group_needed_ldrs_pc: +one_group_needed_ldc_pc: + mov r0, #0 + +@ We will place the section .data at 0x03000000 + + .data + + .word 0, 0, 0 +one_group_needed_alu_sb: +one_group_needed_ldr_sb: +one_group_needed_ldrs_sb: +one_group_needed_ldc_sb: + .word 1 @ Offset 0xc + .fill 0xeef0 - 16, 1, 0 +two_groups_needed_alu_sb: +two_groups_needed_ldr_sb: +two_groups_needed_ldrs_sb: +two_groups_needed_ldc_sb: + .word 2 @ Offset 0xeef0 + .fill 0xffeef0 - 0xeef0 - 4, 1, 0 +three_groups_needed_alu_sb: +three_groups_needed_ldr_sb: +three_groups_needed_ldrs_sb: +three_groups_needed_ldc_sb: + .word 3 @ Offset 0xffeef0 + +@ We will place the section alpha at 0xeef0. + + .section alpha, "x" + +two_groups_needed_alu_pc: +two_groups_needed_ldr_pc: +two_groups_needed_ldrs_pc: +two_groups_needed_ldc_pc: + mov r0, #0 + +@ We will place the section beta at 0xffeef0. + + .section beta, "x" + +three_groups_needed_alu_pc: +three_groups_needed_ldr_pc: +three_groups_needed_ldrs_pc: +three_groups_needed_ldc_pc: + mov r0, #0 + diff --git a/binutils-2.24/ld/testsuite/ld-arm/hideall.ld b/binutils-2.24/ld/testsuite/ld-arm/hideall.ld new file mode 100644 index 0000000..077d6b5 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/hideall.ld @@ -0,0 +1 @@ +NS { local: *; }; diff --git a/binutils-2.24/ld/testsuite/ld-arm/hidfn.s b/binutils-2.24/ld/testsuite/ld-arm/hidfn.s new file mode 100644 index 0000000..a66b558 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/hidfn.s @@ -0,0 +1,7 @@ + .text + .globl hidfn + .hidden hidfn + .type hidfn, %function +hidfn: + ldmfd sp!, {pc} + .size hidfn, . - hidfn diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-1.dd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-1.dd new file mode 100644 index 0000000..14b1482 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-1.dd @@ -0,0 +1,139 @@ + +.* + + +Disassembly of section \.iplt: + +00009000 <f3-0xc>: +#------------------------------------------------------------------------------ +#------ f1's .iplt entry +#------------------------------------------------------------------------------ + 9000: e28fc600 add ip, pc, #0, 12 + 9004: e28cca08 add ip, ip, #8, 20 ; 0x8000 + 9008: e5bcf004 ldr pc, \[ip, #4\]! + +0000900c <f3>: + 900c: e28fc600 add ip, pc, #0, 12 + 9010: e28cca07 add ip, ip, #28672 ; 0x7000 + 9014: e5bcfffc ldr pc, \[ip, #4092\]! ; 0xffc + +00009018 <f2>: + 9018: e28fc600 add ip, pc, #0, 12 + 901c: e28cca07 add ip, ip, #28672 ; 0x7000 + 9020: e5bcfff4 ldr pc, \[ip, #4084\]! ; 0xff4 + +Disassembly of section \.text: + +0000a000 <f1>: + a000: e1a0f00e mov pc, lr + a004: e1a0f00e mov pc, lr + a008: e1a0f00e mov pc, lr + +0000a00c <_start>: + a00c: eb0017fb bl 10000 <foo> + a010: e59f400c ldr r4, \[pc, #12\] ; a024 <_start\+0x18> + a014: e59f400c ldr r4, \[pc, #12\] ; a028 <_start\+0x1c> + a018: e59f400c ldr r4, \[pc, #12\] ; a02c <_start\+0x20> + a01c: e59f400c ldr r4, \[pc, #12\] ; a030 <_start\+0x24> + a020: e59f500c ldr r5, \[pc, #12\] ; a034 <_start\+0x28> +#------------------------------------------------------------------------------ +#------ foo +#------------------------------------------------------------------------------ + a024: 00010000 \.word 0x00010000 +#------------------------------------------------------------------------------ +#------ PC-relative offset of foo +#------------------------------------------------------------------------------ + a028: 00005fd8 \.word 0x00005fd8 +#------------------------------------------------------------------------------ +#------ GP-relative offset of foo +#------------------------------------------------------------------------------ + a02c: fffff000 \.word 0xfffff000 +#------------------------------------------------------------------------------ +#------ .got offset for foo +#------------------------------------------------------------------------------ + a030: 00000020 \.word 0x00000020 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for foo +#------------------------------------------------------------------------------ + a034: 00006fe4 \.word 0x00006fe4 +#------------------------------------------------------------------------------ +#------ f1's .iplt entry +#------------------------------------------------------------------------------ + a038: ebfffbf0 bl 9000 <__irel_end\+0xfe8> + a03c: e59f400c ldr r4, \[pc, #12\] ; a050 <_start\+0x44> + a040: e59f400c ldr r4, \[pc, #12\] ; a054 <_start\+0x48> + a044: e59f400c ldr r4, \[pc, #12\] ; a058 <_start\+0x4c> + a048: e59f400c ldr r4, \[pc, #12\] ; a05c <_start\+0x50> + a04c: e59f500c ldr r5, \[pc, #12\] ; a060 <_start\+0x54> +#------------------------------------------------------------------------------ +#------ f1's .iplt entry +#------------------------------------------------------------------------------ + a050: 00009000 \.word 0x00009000 +#------------------------------------------------------------------------------ +#------ PC-relative offset of f1's .iplt entry +#------------------------------------------------------------------------------ + a054: ffffefac \.word 0xffffefac +#------------------------------------------------------------------------------ +#------ GP-relative offset of f1's .iplt entry +#------------------------------------------------------------------------------ + a058: ffff8000 \.word 0xffff8000 +#------------------------------------------------------------------------------ +#------ .got offset for f1's .iplt entry +#------------------------------------------------------------------------------ + a05c: 0000001c \.word 0x0000001c +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for f1's .iplt entry +#------------------------------------------------------------------------------ + a060: 00006fbc \.word 0x00006fbc + a064: ebfffbeb bl 9018 <f2> + a068: e59f400c ldr r4, \[pc, #12\] ; a07c <_start\+0x70> + a06c: e59f400c ldr r4, \[pc, #12\] ; a080 <_start\+0x74> + a070: e59f400c ldr r4, \[pc, #12\] ; a084 <_start\+0x78> + a074: e59f400c ldr r4, \[pc, #12\] ; a088 <_start\+0x7c> + a078: e59f500c ldr r5, \[pc, #12\] ; a08c <_start\+0x80> +#------------------------------------------------------------------------------ +#------ f2 +#------------------------------------------------------------------------------ + a07c: 00009018 \.word 0x00009018 +#------------------------------------------------------------------------------ +#------ PC-relative offset of f2 +#------------------------------------------------------------------------------ + a080: ffffef98 \.word 0xffffef98 +#------------------------------------------------------------------------------ +#------ GP-relative offset of f2 +#------------------------------------------------------------------------------ + a084: ffff8018 \.word 0xffff8018 +#------------------------------------------------------------------------------ +#------ .got offset for f2 +#------------------------------------------------------------------------------ + a088: 00000028 \.word 0x00000028 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for f2 +#------------------------------------------------------------------------------ + a08c: 00006f9c \.word 0x00006f9c + a090: ebfffbdd bl 900c <f3> + a094: e59f400c ldr r4, \[pc, #12\] ; a0a8 <_start\+0x9c> + a098: e59f400c ldr r4, \[pc, #12\] ; a0ac <_start\+0xa0> + a09c: e59f400c ldr r4, \[pc, #12\] ; a0b0 <_start\+0xa4> + a0a0: e59f400c ldr r4, \[pc, #12\] ; a0b4 <_start\+0xa8> + a0a4: e59f500c ldr r5, \[pc, #12\] ; a0b8 <_start\+0xac> +#------------------------------------------------------------------------------ +#------ f3 +#------------------------------------------------------------------------------ + a0a8: 0000900c \.word 0x0000900c +#------------------------------------------------------------------------------ +#------ PC-relative offset of f3 +#------------------------------------------------------------------------------ + a0ac: ffffef60 \.word 0xffffef60 +#------------------------------------------------------------------------------ +#------ GP-relative offset of f3 +#------------------------------------------------------------------------------ + a0b0: ffff800c \.word 0xffff800c +#------------------------------------------------------------------------------ +#------ .got offset for f3 +#------------------------------------------------------------------------------ + a0b4: 00000024 \.word 0x00000024 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for f3 +#------------------------------------------------------------------------------ + a0b8: 00006f6c \.word 0x00006f6c diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-1.gd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-1.gd new file mode 100644 index 0000000..ff51d37 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-1.gd @@ -0,0 +1,29 @@ + +.* + +Contents of section \.data: +#------------------------------------------------------------------------------ +#------ 00010000: foo +#------------------------------------------------------------------------------ + 10000 44332211 00800000 18800000 .* +Contents of section \.got: +#------------------------------------------------------------------------------ +#------ 00011000: .got.plt +#------ 00011004: reserved .got.plt entry +#------ 00011008: reserved .got.plt entry +#------ 0001100c: f1's .igot.plt entry [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 11000 00000000 00000000 00000000 00a00000 .* +#------------------------------------------------------------------------------ +#------ 00011010: f3's .igot.plt pointer to 0xa008 [R_ARM_IRELATIVE] +#------ 00011014: f2's .igot.plt pointer to 0xa004 [R_ARM_IRELATIVE] +#------ 00011018: .got entry for foo +#------ 0001101c: .got entry for f1's .iplt entry +#------------------------------------------------------------------------------ + 11010 08a00000 04a00000 00000100 00900000 .* +#------------------------------------------------------------------------------ +#------ 00011020: .got entry for foo +#------ 00011024: .got entry for f3 +#------ 00011028: .got entry for f2 +#------------------------------------------------------------------------------ + 11020 00000100 0c900000 18900000 .* diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-1.rd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-1.rd new file mode 100644 index 0000000..2644123 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-1.rd @@ -0,0 +1,8 @@ + +There is no dynamic section in this file\. + +Relocation section '\.rel\.dyn' at offset 0x8000 contains 3 entries: + Offset Info Type Sym\.Value Sym\. Name +0001100c ......a0 R_ARM_IRELATIVE +00011014 ......a0 R_ARM_IRELATIVE +00011010 ......a0 R_ARM_IRELATIVE diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-1.s b/binutils-2.24/ld/testsuite/ld-arm/ifunc-1.s new file mode 100644 index 0000000..7745c54 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-1.s @@ -0,0 +1,48 @@ + .macro define,name + .type \name,%gnu_indirect_function +\name: + mov pc,lr + .size \name,.-\name + .endm + + .macro test_relocs,name + bl \name + ldr r4,1f + ldr r4,2f + ldr r4,3f + ldr r4,4f + ldr r5,5f +1: + .word \name +2: + .word \name-. +3: + .word \name(GOTOFF) +4: + .word \name(GOT) +5: + .word \name(GOT_PREL) + .endm + + .global f2 + + .global f3 + .hidden f3 + + define f1 + define f2 + define f3 + + .globl _start +_start: + test_relocs foo + test_relocs f1 + test_relocs f2 + test_relocs f3 + .size _start,.-_start + + .data +foo: + .word 0x11223344 + .word __irel_start + .word __irel_end diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-10.dd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-10.dd new file mode 100644 index 0000000..105b09b --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-10.dd @@ -0,0 +1,951 @@ + +.* + + +Disassembly of section \.plt: + +00009000 <\.plt>: + 9000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) + 9004: e59fe004 ldr lr, \[pc, #4\] ; 9010 <atf3-0x110> + 9008: e08fe00e add lr, pc, lr + 900c: e5bef008 ldr pc, \[lr, #8\]! +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got.plt +#------------------------------------------------------------------------------ + 9010: 00007ff0 \.word 0x00007ff0 +#------------------------------------------------------------------------------ +#------ thumb entry to atf2's .plt entry +#------------------------------------------------------------------------------ + 9014: 4778 bx pc + 9016: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ atf2's .plt entry +#------------------------------------------------------------------------------ + 9018: e28fc600 add ip, pc, #0, 12 + 901c: e28cca07 add ip, ip, #28672 ; 0x7000 + 9020: e5bcffec ldr pc, \[ip, #4076\]! ; 0xfec +#------------------------------------------------------------------------------ +#------ aaf4's .plt entry +#------------------------------------------------------------------------------ + 9024: e28fc600 add ip, pc, #0, 12 + 9028: e28cca07 add ip, ip, #28672 ; 0x7000 + 902c: e5bcffe4 ldr pc, \[ip, #4068\]! ; 0xfe4 +#------------------------------------------------------------------------------ +#------ thumb entry to ttf2's .plt entry +#------------------------------------------------------------------------------ + 9030: 4778 bx pc + 9032: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ ttf2's .plt entry +#------------------------------------------------------------------------------ + 9034: e28fc600 add ip, pc, #0, 12 + 9038: e28cca07 add ip, ip, #28672 ; 0x7000 + 903c: e5bcffd8 ldr pc, \[ip, #4056\]! ; 0xfd8 +#------------------------------------------------------------------------------ +#------ thumb entry to tbf2's .plt entry +#------------------------------------------------------------------------------ + 9040: 4778 bx pc + 9042: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ tbf2's .plt entry +#------------------------------------------------------------------------------ + 9044: e28fc600 add ip, pc, #0, 12 + 9048: e28cca07 add ip, ip, #28672 ; 0x7000 + 904c: e5bcffcc ldr pc, \[ip, #4044\]! ; 0xfcc +#------------------------------------------------------------------------------ +#------ taf2's .plt entry +#------------------------------------------------------------------------------ + 9050: e28fc600 add ip, pc, #0, 12 + 9054: e28cca07 add ip, ip, #28672 ; 0x7000 + 9058: e5bcffc4 ldr pc, \[ip, #4036\]! ; 0xfc4 +#------------------------------------------------------------------------------ +#------ aaf2's .plt entry +#------------------------------------------------------------------------------ + 905c: e28fc600 add ip, pc, #0, 12 + 9060: e28cca07 add ip, ip, #28672 ; 0x7000 + 9064: e5bcffbc ldr pc, \[ip, #4028\]! ; 0xfbc +#------------------------------------------------------------------------------ +#------ thumb entry to abf4's .plt entry +#------------------------------------------------------------------------------ + 9068: 4778 bx pc + 906a: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ abf4's .plt entry +#------------------------------------------------------------------------------ + 906c: e28fc600 add ip, pc, #0, 12 + 9070: e28cca07 add ip, ip, #28672 ; 0x7000 + 9074: e5bcffb0 ldr pc, \[ip, #4016\]! ; 0xfb0 +#------------------------------------------------------------------------------ +#------ thumb entry to tbf4's .plt entry +#------------------------------------------------------------------------------ + 9078: 4778 bx pc + 907a: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ tbf4's .plt entry +#------------------------------------------------------------------------------ + 907c: e28fc600 add ip, pc, #0, 12 + 9080: e28cca07 add ip, ip, #28672 ; 0x7000 + 9084: e5bcffa4 ldr pc, \[ip, #4004\]! ; 0xfa4 +#------------------------------------------------------------------------------ +#------ thumb entry to ttf4's .plt entry +#------------------------------------------------------------------------------ + 9088: 4778 bx pc + 908a: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ ttf4's .plt entry +#------------------------------------------------------------------------------ + 908c: e28fc600 add ip, pc, #0, 12 + 9090: e28cca07 add ip, ip, #28672 ; 0x7000 + 9094: e5bcff98 ldr pc, \[ip, #3992\]! ; 0xf98 +#------------------------------------------------------------------------------ +#------ thumb entry to atf4's .plt entry +#------------------------------------------------------------------------------ + 9098: 4778 bx pc + 909a: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ atf4's .plt entry +#------------------------------------------------------------------------------ + 909c: e28fc600 add ip, pc, #0, 12 + 90a0: e28cca07 add ip, ip, #28672 ; 0x7000 + 90a4: e5bcff8c ldr pc, \[ip, #3980\]! ; 0xf8c +#------------------------------------------------------------------------------ +#------ taf4's .plt entry +#------------------------------------------------------------------------------ + 90a8: e28fc600 add ip, pc, #0, 12 + 90ac: e28cca07 add ip, ip, #28672 ; 0x7000 + 90b0: e5bcff84 ldr pc, \[ip, #3972\]! ; 0xf84 +#------------------------------------------------------------------------------ +#------ thumb entry to abf2's .plt entry +#------------------------------------------------------------------------------ + 90b4: 4778 bx pc + 90b6: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ abf2's .plt entry +#------------------------------------------------------------------------------ + 90b8: e28fc600 add ip, pc, #0, 12 + 90bc: e28cca07 add ip, ip, #28672 ; 0x7000 + 90c0: e5bcff78 ldr pc, \[ip, #3960\]! ; 0xf78 + +Disassembly of section \.iplt: + +000090c4 <atf3-0x5c>: +#------------------------------------------------------------------------------ +#------ aaf1's .iplt entry +#------------------------------------------------------------------------------ + 90c4: e28fc600 add ip, pc, #0, 12 + 90c8: e28cca07 add ip, ip, #28672 ; 0x7000 + 90cc: e5bcff70 ldr pc, \[ip, #3952\]! ; 0xf70 +#------------------------------------------------------------------------------ +#------ thumb entry to atf1's .iplt entry +#------------------------------------------------------------------------------ + 90d0: 4778 bx pc + 90d2: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ atf1's .iplt entry +#------------------------------------------------------------------------------ + 90d4: e28fc600 add ip, pc, #0, 12 + 90d8: e28cca07 add ip, ip, #28672 ; 0x7000 + 90dc: e5bcff64 ldr pc, \[ip, #3940\]! ; 0xf64 +#------------------------------------------------------------------------------ +#------ thumb entry to abf1's .iplt entry +#------------------------------------------------------------------------------ + 90e0: 4778 bx pc + 90e2: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ abf1's .iplt entry +#------------------------------------------------------------------------------ + 90e4: e28fc600 add ip, pc, #0, 12 + 90e8: e28cca07 add ip, ip, #28672 ; 0x7000 + 90ec: e5bcff58 ldr pc, \[ip, #3928\]! ; 0xf58 +#------------------------------------------------------------------------------ +#------ taf1's .iplt entry +#------------------------------------------------------------------------------ + 90f0: e28fc600 add ip, pc, #0, 12 + 90f4: e28cca07 add ip, ip, #28672 ; 0x7000 + 90f8: e5bcff50 ldr pc, \[ip, #3920\]! ; 0xf50 +#------------------------------------------------------------------------------ +#------ thumb entry to ttf1's .iplt entry +#------------------------------------------------------------------------------ + 90fc: 4778 bx pc + 90fe: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ ttf1's .iplt entry +#------------------------------------------------------------------------------ + 9100: e28fc600 add ip, pc, #0, 12 + 9104: e28cca07 add ip, ip, #28672 ; 0x7000 + 9108: e5bcff44 ldr pc, \[ip, #3908\]! ; 0xf44 +#------------------------------------------------------------------------------ +#------ thumb entry to tbf1's .iplt entry +#------------------------------------------------------------------------------ + 910c: 4778 bx pc + 910e: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ tbf1's .iplt entry +#------------------------------------------------------------------------------ + 9110: e28fc600 add ip, pc, #0, 12 + 9114: e28cca07 add ip, ip, #28672 ; 0x7000 + 9118: e5bcff38 ldr pc, \[ip, #3896\]! ; 0xf38 +#------------------------------------------------------------------------------ +#------ thumb entry to atf3 +#------------------------------------------------------------------------------ + 911c: 4778 bx pc + 911e: 46c0 nop ; \(mov r8, r8\) + +00009120 <atf3>: + 9120: e28fc600 add ip, pc, #0, 12 + 9124: e28cca07 add ip, ip, #28672 ; 0x7000 + 9128: e5bcff2c ldr pc, \[ip, #3884\]! ; 0xf2c +#------------------------------------------------------------------------------ +#------ thumb entry to abf3 +#------------------------------------------------------------------------------ + 912c: 4778 bx pc + 912e: 46c0 nop ; \(mov r8, r8\) + +00009130 <abf3>: + 9130: e28fc600 add ip, pc, #0, 12 + 9134: e28cca07 add ip, ip, #28672 ; 0x7000 + 9138: e5bcff20 ldr pc, \[ip, #3872\]! ; 0xf20 +#------------------------------------------------------------------------------ +#------ thumb entry to ttf3 +#------------------------------------------------------------------------------ + 913c: 4778 bx pc + 913e: 46c0 nop ; \(mov r8, r8\) + +00009140 <ttf3>: + 9140: e28fc600 add ip, pc, #0, 12 + 9144: e28cca07 add ip, ip, #28672 ; 0x7000 + 9148: e5bcff14 ldr pc, \[ip, #3860\]! ; 0xf14 +#------------------------------------------------------------------------------ +#------ thumb entry to tbf3 +#------------------------------------------------------------------------------ + 914c: 4778 bx pc + 914e: 46c0 nop ; \(mov r8, r8\) + +00009150 <tbf3>: + 9150: e28fc600 add ip, pc, #0, 12 + 9154: e28cca07 add ip, ip, #28672 ; 0x7000 + 9158: e5bcff08 ldr pc, \[ip, #3848\]! ; 0xf08 + +0000915c <taf3>: + 915c: e28fc600 add ip, pc, #0, 12 + 9160: e28cca07 add ip, ip, #28672 ; 0x7000 + 9164: e5bcff00 ldr pc, \[ip, #3840\]! ; 0xf00 + +00009168 <aaf3>: + 9168: e28fc600 add ip, pc, #0, 12 + 916c: e28cca07 add ip, ip, #28672 ; 0x7000 + 9170: e5bcfef8 ldr pc, \[ip, #3832\]! ; 0xef8 + +Disassembly of section \.text: + +0000a000 <aaf1>: + a000: e1a0f00e mov pc, lr + +0000a004 <atf1>: + a004: e1a0f00e mov pc, lr + +0000a008 <abf1>: + a008: e1a0f00e mov pc, lr + +0000a00c <taf1>: + a00c: 46f7 mov pc, lr + +0000a00e <ttf1>: + a00e: 46f7 mov pc, lr + +0000a010 <tbf1>: + a010: 46f7 mov pc, lr + a012: 0000 movs r0, r0 + a014: e1a0f00e mov pc, lr + a018: e1a0f00e mov pc, lr + a01c: e1a0f00e mov pc, lr + a020: 46f7 mov pc, lr + a022: 46f7 mov pc, lr + a024: 46f7 mov pc, lr + \.\.\. + +0000a028 <_start>: + a028: eb0017f4 bl 10000 <foo> + a02c: ea0017f3 b 10000 <foo> + a030: 0a0017f2 beq 10000 <foo> + a034: e59f4000 ldr r4, \[pc\] ; a03c <_start\+0x14> + a038: e59f4000 ldr r4, \[pc\] ; a040 <_start\+0x18> +#------------------------------------------------------------------------------ +#------ .got offset for foo +#------------------------------------------------------------------------------ + a03c: 00000088 \.word 0x00000088 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for foo +#------------------------------------------------------------------------------ + a040: 0000702c \.word 0x0000702c +#------------------------------------------------------------------------------ +#------ aaf1's .iplt entry +#------------------------------------------------------------------------------ + a044: ebfffc1e bl 90c4 <atf3-0x5c> +#------------------------------------------------------------------------------ +#------ aaf1's .iplt entry +#------------------------------------------------------------------------------ + a048: eafffc1d b 90c4 <atf3-0x5c> +#------------------------------------------------------------------------------ +#------ aaf1's .iplt entry +#------------------------------------------------------------------------------ + a04c: 0afffc1c beq 90c4 <atf3-0x5c> + a050: e59f4000 ldr r4, \[pc\] ; a058 <_start\+0x30> + a054: e59f4000 ldr r4, \[pc\] ; a05c <_start\+0x34> +#------------------------------------------------------------------------------ +#------ .got offset for aaf1's .iplt entry +#------------------------------------------------------------------------------ + a058: 00000070 \.word 0x00000070 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for aaf1's .iplt entry +#------------------------------------------------------------------------------ + a05c: 00007014 \.word 0x00007014 +#------------------------------------------------------------------------------ +#------ taf1's .iplt entry +#------------------------------------------------------------------------------ + a060: ebfffc22 bl 90f0 <atf3-0x30> +#------------------------------------------------------------------------------ +#------ taf1's .iplt entry +#------------------------------------------------------------------------------ + a064: eafffc21 b 90f0 <atf3-0x30> +#------------------------------------------------------------------------------ +#------ taf1's .iplt entry +#------------------------------------------------------------------------------ + a068: 0afffc20 beq 90f0 <atf3-0x30> + a06c: e59f4000 ldr r4, \[pc\] ; a074 <_start\+0x4c> + a070: e59f4000 ldr r4, \[pc\] ; a078 <_start\+0x50> +#------------------------------------------------------------------------------ +#------ .got offset for taf1's .iplt entry +#------------------------------------------------------------------------------ + a074: 0000007c \.word 0x0000007c +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for taf1's .iplt entry +#------------------------------------------------------------------------------ + a078: 00007004 \.word 0x00007004 +#------------------------------------------------------------------------------ +#------ abf1's .iplt entry +#------------------------------------------------------------------------------ + a07c: ebfffc18 bl 90e4 <atf3-0x3c> +#------------------------------------------------------------------------------ +#------ abf1's .iplt entry +#------------------------------------------------------------------------------ + a080: eafffc17 b 90e4 <atf3-0x3c> +#------------------------------------------------------------------------------ +#------ abf1's .iplt entry +#------------------------------------------------------------------------------ + a084: 0afffc16 beq 90e4 <atf3-0x3c> + a088: e59f4000 ldr r4, \[pc\] ; a090 <_start\+0x68> + a08c: e59f4000 ldr r4, \[pc\] ; a094 <_start\+0x6c> +#------------------------------------------------------------------------------ +#------ .got offset for abf1's .iplt entry +#------------------------------------------------------------------------------ + a090: 00000078 \.word 0x00000078 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for abf1's .iplt entry +#------------------------------------------------------------------------------ + a094: 00006fe4 \.word 0x00006fe4 +#------------------------------------------------------------------------------ +#------ tbf1's .iplt entry +#------------------------------------------------------------------------------ + a098: ebfffc1c bl 9110 <atf3-0x10> +#------------------------------------------------------------------------------ +#------ tbf1's .iplt entry +#------------------------------------------------------------------------------ + a09c: eafffc1b b 9110 <atf3-0x10> +#------------------------------------------------------------------------------ +#------ tbf1's .iplt entry +#------------------------------------------------------------------------------ + a0a0: 0afffc1a beq 9110 <atf3-0x10> + a0a4: e59f4000 ldr r4, \[pc\] ; a0ac <_start\+0x84> + a0a8: e59f4000 ldr r4, \[pc\] ; a0b0 <_start\+0x88> +#------------------------------------------------------------------------------ +#------ .got offset for tbf1's .iplt entry +#------------------------------------------------------------------------------ + a0ac: 00000084 \.word 0x00000084 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for tbf1's .iplt entry +#------------------------------------------------------------------------------ + a0b0: 00006fd4 \.word 0x00006fd4 +#------------------------------------------------------------------------------ +#------ aaf2's .plt entry +#------------------------------------------------------------------------------ + a0b4: ebfffbe8 bl 905c <atf3-0xc4> +#------------------------------------------------------------------------------ +#------ aaf2's .plt entry +#------------------------------------------------------------------------------ + a0b8: eafffbe7 b 905c <atf3-0xc4> +#------------------------------------------------------------------------------ +#------ aaf2's .plt entry +#------------------------------------------------------------------------------ + a0bc: 0afffbe6 beq 905c <atf3-0xc4> + a0c0: e59f4000 ldr r4, \[pc\] ; a0c8 <_start\+0xa0> + a0c4: e59f4000 ldr r4, \[pc\] ; a0cc <_start\+0xa4> +#------------------------------------------------------------------------------ +#------ .got offset for aaf2 +#------------------------------------------------------------------------------ + a0c8: 000000a8 \.word 0x000000a8 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for aaf2 +#------------------------------------------------------------------------------ + a0cc: 00006fdc \.word 0x00006fdc +#------------------------------------------------------------------------------ +#------ taf2's .plt entry +#------------------------------------------------------------------------------ + a0d0: ebfffbde bl 9050 <atf3-0xd0> +#------------------------------------------------------------------------------ +#------ taf2's .plt entry +#------------------------------------------------------------------------------ + a0d4: eafffbdd b 9050 <atf3-0xd0> +#------------------------------------------------------------------------------ +#------ taf2's .plt entry +#------------------------------------------------------------------------------ + a0d8: 0afffbdc beq 9050 <atf3-0xd0> + a0dc: e59f4000 ldr r4, \[pc\] ; a0e4 <_start\+0xbc> + a0e0: e59f4000 ldr r4, \[pc\] ; a0e8 <_start\+0xc0> +#------------------------------------------------------------------------------ +#------ .got offset for taf2 +#------------------------------------------------------------------------------ + a0e4: 000000a4 \.word 0x000000a4 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for taf2 +#------------------------------------------------------------------------------ + a0e8: 00006fbc \.word 0x00006fbc +#------------------------------------------------------------------------------ +#------ abf2's .plt entry +#------------------------------------------------------------------------------ + a0ec: ebfffbf1 bl 90b8 <atf3-0x68> +#------------------------------------------------------------------------------ +#------ abf2's .plt entry +#------------------------------------------------------------------------------ + a0f0: eafffbf0 b 90b8 <atf3-0x68> +#------------------------------------------------------------------------------ +#------ abf2's .plt entry +#------------------------------------------------------------------------------ + a0f4: 0afffbef beq 90b8 <atf3-0x68> + a0f8: e59f4000 ldr r4, \[pc\] ; a100 <_start\+0xd8> + a0fc: e59f4000 ldr r4, \[pc\] ; a104 <_start\+0xdc> +#------------------------------------------------------------------------------ +#------ .got offset for abf2 +#------------------------------------------------------------------------------ + a100: 000000d0 \.word 0x000000d0 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for abf2 +#------------------------------------------------------------------------------ + a104: 00006fcc \.word 0x00006fcc +#------------------------------------------------------------------------------ +#------ tbf2's .plt entry +#------------------------------------------------------------------------------ + a108: ebfffbcd bl 9044 <atf3-0xdc> +#------------------------------------------------------------------------------ +#------ tbf2's .plt entry +#------------------------------------------------------------------------------ + a10c: eafffbcc b 9044 <atf3-0xdc> +#------------------------------------------------------------------------------ +#------ tbf2's .plt entry +#------------------------------------------------------------------------------ + a110: 0afffbcb beq 9044 <atf3-0xdc> + a114: e59f4000 ldr r4, \[pc\] ; a11c <_start\+0xf4> + a118: e59f4000 ldr r4, \[pc\] ; a120 <_start\+0xf8> +#------------------------------------------------------------------------------ +#------ .got offset for tbf2 +#------------------------------------------------------------------------------ + a11c: 00000098 \.word 0x00000098 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for tbf2 +#------------------------------------------------------------------------------ + a120: 00006f78 \.word 0x00006f78 + a124: ebfffc0f bl 9168 <aaf3> + a128: eafffc0e b 9168 <aaf3> + a12c: 0afffc0d beq 9168 <aaf3> + a130: e59f4000 ldr r4, \[pc\] ; a138 <_start\+0x110> + a134: e59f4000 ldr r4, \[pc\] ; a13c <_start\+0x114> +#------------------------------------------------------------------------------ +#------ .got offset for aaf3 +#------------------------------------------------------------------------------ + a138: 000000c4 \.word 0x000000c4 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for aaf3 +#------------------------------------------------------------------------------ + a13c: 00006f88 \.word 0x00006f88 + a140: ebfffc05 bl 915c <taf3> + a144: eafffc04 b 915c <taf3> + a148: 0afffc03 beq 915c <taf3> + a14c: e59f4000 ldr r4, \[pc\] ; a154 <_start\+0x12c> + a150: e59f4000 ldr r4, \[pc\] ; a158 <_start\+0x130> +#------------------------------------------------------------------------------ +#------ .got offset for taf3 +#------------------------------------------------------------------------------ + a154: 000000b4 \.word 0x000000b4 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for taf3 +#------------------------------------------------------------------------------ + a158: 00006f5c \.word 0x00006f5c + a15c: ebfffbf3 bl 9130 <abf3> + a160: eafffbf2 b 9130 <abf3> + a164: 0afffbf1 beq 9130 <abf3> + a168: e59f4000 ldr r4, \[pc\] ; a170 <_start\+0x148> + a16c: e59f4000 ldr r4, \[pc\] ; a174 <_start\+0x14c> +#------------------------------------------------------------------------------ +#------ .got offset for abf3 +#------------------------------------------------------------------------------ + a170: 000000a0 \.word 0x000000a0 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for abf3 +#------------------------------------------------------------------------------ + a174: 00006f2c \.word 0x00006f2c + a178: ebfffbf4 bl 9150 <tbf3> + a17c: eafffbf3 b 9150 <tbf3> + a180: 0afffbf2 beq 9150 <tbf3> + a184: e59f4000 ldr r4, \[pc\] ; a18c <_start\+0x164> + a188: e59f4000 ldr r4, \[pc\] ; a190 <_start\+0x168> +#------------------------------------------------------------------------------ +#------ .got offset for tbf3 +#------------------------------------------------------------------------------ + a18c: 000000b0 \.word 0x000000b0 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for tbf3 +#------------------------------------------------------------------------------ + a190: 00006f20 \.word 0x00006f20 +#------------------------------------------------------------------------------ +#------ aaf4's .plt entry +#------------------------------------------------------------------------------ + a194: ebfffba2 bl 9024 <atf3-0xfc> +#------------------------------------------------------------------------------ +#------ aaf4's .plt entry +#------------------------------------------------------------------------------ + a198: eafffba1 b 9024 <atf3-0xfc> +#------------------------------------------------------------------------------ +#------ aaf4's .plt entry +#------------------------------------------------------------------------------ + a19c: 0afffba0 beq 9024 <atf3-0xfc> + a1a0: e59f4000 ldr r4, \[pc\] ; a1a8 <_start\+0x180> + a1a4: e59f4000 ldr r4, \[pc\] ; a1ac <_start\+0x184> +#------------------------------------------------------------------------------ +#------ .got offset for aaf4 +#------------------------------------------------------------------------------ + a1a8: 00000090 \.word 0x00000090 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for aaf4 +#------------------------------------------------------------------------------ + a1ac: 00006ee4 \.word 0x00006ee4 +#------------------------------------------------------------------------------ +#------ taf4's .plt entry +#------------------------------------------------------------------------------ + a1b0: ebfffbbc bl 90a8 <atf3-0x78> +#------------------------------------------------------------------------------ +#------ taf4's .plt entry +#------------------------------------------------------------------------------ + a1b4: eafffbbb b 90a8 <atf3-0x78> +#------------------------------------------------------------------------------ +#------ taf4's .plt entry +#------------------------------------------------------------------------------ + a1b8: 0afffbba beq 90a8 <atf3-0x78> + a1bc: e59f4000 ldr r4, \[pc\] ; a1c4 <_start\+0x19c> + a1c0: e59f4000 ldr r4, \[pc\] ; a1c8 <_start\+0x1a0> +#------------------------------------------------------------------------------ +#------ .got offset for taf4 +#------------------------------------------------------------------------------ + a1c4: 000000cc \.word 0x000000cc +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for taf4 +#------------------------------------------------------------------------------ + a1c8: 00006f04 \.word 0x00006f04 +#------------------------------------------------------------------------------ +#------ abf4's .plt entry +#------------------------------------------------------------------------------ + a1cc: ebfffba6 bl 906c <atf3-0xb4> +#------------------------------------------------------------------------------ +#------ abf4's .plt entry +#------------------------------------------------------------------------------ + a1d0: eafffba5 b 906c <atf3-0xb4> +#------------------------------------------------------------------------------ +#------ abf4's .plt entry +#------------------------------------------------------------------------------ + a1d4: 0afffba4 beq 906c <atf3-0xb4> + a1d8: e59f4000 ldr r4, \[pc\] ; a1e0 <_start\+0x1b8> + a1dc: e59f4000 ldr r4, \[pc\] ; a1e4 <_start\+0x1bc> +#------------------------------------------------------------------------------ +#------ .got offset for abf4 +#------------------------------------------------------------------------------ + a1e0: 000000b8 \.word 0x000000b8 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for abf4 +#------------------------------------------------------------------------------ + a1e4: 00006ed4 \.word 0x00006ed4 +#------------------------------------------------------------------------------ +#------ tbf4's .plt entry +#------------------------------------------------------------------------------ + a1e8: ebfffba3 bl 907c <atf3-0xa4> +#------------------------------------------------------------------------------ +#------ tbf4's .plt entry +#------------------------------------------------------------------------------ + a1ec: eafffba2 b 907c <atf3-0xa4> +#------------------------------------------------------------------------------ +#------ tbf4's .plt entry +#------------------------------------------------------------------------------ + a1f0: 0afffba1 beq 907c <atf3-0xa4> + a1f4: e59f4000 ldr r4, \[pc\] ; a1fc <_start\+0x1d4> + a1f8: e59f4000 ldr r4, \[pc\] ; a200 <_start\+0x1d8> +#------------------------------------------------------------------------------ +#------ .got offset for tbf4 +#------------------------------------------------------------------------------ + a1fc: 000000bc \.word 0x000000bc +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for tbf4 +#------------------------------------------------------------------------------ + a200: 00006ebc \.word 0x00006ebc + +0000a204 <_thumb>: + a204: f005 fefc bl 10000 <foo> + a208: f005 befa b\.w 10000 <foo> + a20c: f005 86f8 beq\.w 10000 <foo> + a210: 4c00 ldr r4, \[pc, #0\] ; \(a214 <_thumb\+0x10>\) + a212: 4c01 ldr r4, \[pc, #4\] ; \(a218 <_thumb\+0x14>\) +#------------------------------------------------------------------------------ +#------ .got offset for foo +#------------------------------------------------------------------------------ + a214: 00000088 \.word 0x00000088 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for foo +#------------------------------------------------------------------------------ + a218: 00006e54 \.word 0x00006e54 +#------------------------------------------------------------------------------ +#------ atf1's .iplt entry +#------------------------------------------------------------------------------ + a21c: f7fe ef5a blx 90d4 <atf3-0x4c> +#------------------------------------------------------------------------------ +#------ thumb entry to atf1's .iplt entry +#------------------------------------------------------------------------------ + a220: f7fe bf56 b\.w 90d0 <atf3-0x50> +#------------------------------------------------------------------------------ +#------ thumb entry to atf1's .iplt entry +#------------------------------------------------------------------------------ + a224: f43e af54 beq\.w 90d0 <atf3-0x50> + a228: 4c00 ldr r4, \[pc, #0\] ; \(a22c <_thumb\+0x28>\) + a22a: 4c01 ldr r4, \[pc, #4\] ; \(a230 <_thumb\+0x2c>\) +#------------------------------------------------------------------------------ +#------ .got offset for atf1's .iplt entry +#------------------------------------------------------------------------------ + a22c: 00000074 \.word 0x00000074 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for atf1's .iplt entry +#------------------------------------------------------------------------------ + a230: 00006e44 \.word 0x00006e44 +#------------------------------------------------------------------------------ +#------ ttf1's .iplt entry +#------------------------------------------------------------------------------ + a234: f7fe ef64 blx 9100 <atf3-0x20> +#------------------------------------------------------------------------------ +#------ thumb entry to ttf1's .iplt entry +#------------------------------------------------------------------------------ + a238: f7fe bf60 b\.w 90fc <atf3-0x24> +#------------------------------------------------------------------------------ +#------ thumb entry to ttf1's .iplt entry +#------------------------------------------------------------------------------ + a23c: f43e af5e beq\.w 90fc <atf3-0x24> + a240: 4c00 ldr r4, \[pc, #0\] ; \(a244 <_thumb\+0x40>\) + a242: 4c01 ldr r4, \[pc, #4\] ; \(a248 <_thumb\+0x44>\) +#------------------------------------------------------------------------------ +#------ .got offset for ttf1's .iplt entry +#------------------------------------------------------------------------------ + a244: 00000080 \.word 0x00000080 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for ttf1's .iplt entry +#------------------------------------------------------------------------------ + a248: 00006e38 \.word 0x00006e38 +#------------------------------------------------------------------------------ +#------ abf1's .iplt entry +#------------------------------------------------------------------------------ + a24c: f7fe ef4a blx 90e4 <atf3-0x3c> +#------------------------------------------------------------------------------ +#------ thumb entry to abf1's .iplt entry +#------------------------------------------------------------------------------ + a250: f7fe bf46 b\.w 90e0 <atf3-0x40> +#------------------------------------------------------------------------------ +#------ thumb entry to abf1's .iplt entry +#------------------------------------------------------------------------------ + a254: f43e af44 beq\.w 90e0 <atf3-0x40> + a258: 4c00 ldr r4, \[pc, #0\] ; \(a25c <_thumb\+0x58>\) + a25a: 4c01 ldr r4, \[pc, #4\] ; \(a260 <_thumb\+0x5c>\) +#------------------------------------------------------------------------------ +#------ .got offset for abf1's .iplt entry +#------------------------------------------------------------------------------ + a25c: 00000078 \.word 0x00000078 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for abf1's .iplt entry +#------------------------------------------------------------------------------ + a260: 00006e18 \.word 0x00006e18 +#------------------------------------------------------------------------------ +#------ tbf1's .iplt entry +#------------------------------------------------------------------------------ + a264: f7fe ef54 blx 9110 <atf3-0x10> +#------------------------------------------------------------------------------ +#------ thumb entry to tbf1's .iplt entry +#------------------------------------------------------------------------------ + a268: f7fe bf50 b\.w 910c <atf3-0x14> +#------------------------------------------------------------------------------ +#------ thumb entry to tbf1's .iplt entry +#------------------------------------------------------------------------------ + a26c: f43e af4e beq\.w 910c <atf3-0x14> + a270: 4c00 ldr r4, \[pc, #0\] ; \(a274 <_thumb\+0x70>\) + a272: 4c01 ldr r4, \[pc, #4\] ; \(a278 <_thumb\+0x74>\) +#------------------------------------------------------------------------------ +#------ .got offset for tbf1's .iplt entry +#------------------------------------------------------------------------------ + a274: 00000084 \.word 0x00000084 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for tbf1's .iplt entry +#------------------------------------------------------------------------------ + a278: 00006e0c \.word 0x00006e0c +#------------------------------------------------------------------------------ +#------ atf2's .plt entry +#------------------------------------------------------------------------------ + a27c: f7fe eecc blx 9018 <atf3-0x108> +#------------------------------------------------------------------------------ +#------ thumb entry to atf2's .plt entry +#------------------------------------------------------------------------------ + a280: f7fe bec8 b\.w 9014 <atf3-0x10c> +#------------------------------------------------------------------------------ +#------ thumb entry to atf2's .plt entry +#------------------------------------------------------------------------------ + a284: f43e aec6 beq\.w 9014 <atf3-0x10c> + a288: 4c00 ldr r4, \[pc, #0\] ; \(a28c <_thumb\+0x88>\) + a28a: 4c01 ldr r4, \[pc, #4\] ; \(a290 <_thumb\+0x8c>\) +#------------------------------------------------------------------------------ +#------ .got offset for atf2 +#------------------------------------------------------------------------------ + a28c: 0000008c \.word 0x0000008c +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for atf2 +#------------------------------------------------------------------------------ + a290: 00006dfc \.word 0x00006dfc +#------------------------------------------------------------------------------ +#------ ttf2's .plt entry +#------------------------------------------------------------------------------ + a294: f7fe eece blx 9034 <atf3-0xec> +#------------------------------------------------------------------------------ +#------ thumb entry to ttf2's .plt entry +#------------------------------------------------------------------------------ + a298: f7fe beca b\.w 9030 <atf3-0xf0> +#------------------------------------------------------------------------------ +#------ thumb entry to ttf2's .plt entry +#------------------------------------------------------------------------------ + a29c: f43e aec8 beq\.w 9030 <atf3-0xf0> + a2a0: 4c00 ldr r4, \[pc, #0\] ; \(a2a4 <_thumb\+0xa0>\) + a2a2: 4c01 ldr r4, \[pc, #4\] ; \(a2a8 <_thumb\+0xa4>\) +#------------------------------------------------------------------------------ +#------ .got offset for ttf2 +#------------------------------------------------------------------------------ + a2a4: 00000094 \.word 0x00000094 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for ttf2 +#------------------------------------------------------------------------------ + a2a8: 00006dec \.word 0x00006dec +#------------------------------------------------------------------------------ +#------ abf2's .plt entry +#------------------------------------------------------------------------------ + a2ac: f7fe ef04 blx 90b8 <atf3-0x68> +#------------------------------------------------------------------------------ +#------ thumb entry to abf2's .plt entry +#------------------------------------------------------------------------------ + a2b0: f7fe bf00 b\.w 90b4 <atf3-0x6c> +#------------------------------------------------------------------------------ +#------ thumb entry to abf2's .plt entry +#------------------------------------------------------------------------------ + a2b4: f43e aefe beq\.w 90b4 <atf3-0x6c> + a2b8: 4c00 ldr r4, \[pc, #0\] ; \(a2bc <_thumb\+0xb8>\) + a2ba: 4c01 ldr r4, \[pc, #4\] ; \(a2c0 <_thumb\+0xbc>\) +#------------------------------------------------------------------------------ +#------ .got offset for abf2 +#------------------------------------------------------------------------------ + a2bc: 000000d0 \.word 0x000000d0 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for abf2 +#------------------------------------------------------------------------------ + a2c0: 00006e10 \.word 0x00006e10 +#------------------------------------------------------------------------------ +#------ tbf2's .plt entry +#------------------------------------------------------------------------------ + a2c4: f7fe eebe blx 9044 <atf3-0xdc> +#------------------------------------------------------------------------------ +#------ thumb entry to tbf2's .plt entry +#------------------------------------------------------------------------------ + a2c8: f7fe beba b\.w 9040 <atf3-0xe0> +#------------------------------------------------------------------------------ +#------ thumb entry to tbf2's .plt entry +#------------------------------------------------------------------------------ + a2cc: f43e aeb8 beq\.w 9040 <atf3-0xe0> + a2d0: 4c00 ldr r4, \[pc, #0\] ; \(a2d4 <_thumb\+0xd0>\) + a2d2: 4c01 ldr r4, \[pc, #4\] ; \(a2d8 <_thumb\+0xd4>\) +#------------------------------------------------------------------------------ +#------ .got offset for tbf2 +#------------------------------------------------------------------------------ + a2d4: 00000098 \.word 0x00000098 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for tbf2 +#------------------------------------------------------------------------------ + a2d8: 00006dc0 \.word 0x00006dc0 + a2dc: f7fe ef20 blx 9120 <atf3> +#------------------------------------------------------------------------------ +#------ thumb entry to atf3 +#------------------------------------------------------------------------------ + a2e0: f7fe bf1c b\.w 911c <atf3-0x4> +#------------------------------------------------------------------------------ +#------ thumb entry to atf3 +#------------------------------------------------------------------------------ + a2e4: f43e af1a beq\.w 911c <atf3-0x4> + a2e8: 4c00 ldr r4, \[pc, #0\] ; \(a2ec <_thumb\+0xe8>\) + a2ea: 4c01 ldr r4, \[pc, #4\] ; \(a2f0 <_thumb\+0xec>\) +#------------------------------------------------------------------------------ +#------ .got offset for atf3 +#------------------------------------------------------------------------------ + a2ec: 0000009c \.word 0x0000009c +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for atf3 +#------------------------------------------------------------------------------ + a2f0: 00006dac \.word 0x00006dac + a2f4: f7fe ef24 blx 9140 <ttf3> +#------------------------------------------------------------------------------ +#------ thumb entry to ttf3 +#------------------------------------------------------------------------------ + a2f8: f7fe bf20 b\.w 913c <abf3\+0xc> +#------------------------------------------------------------------------------ +#------ thumb entry to ttf3 +#------------------------------------------------------------------------------ + a2fc: f43e af1e beq\.w 913c <abf3\+0xc> + a300: 4c00 ldr r4, \[pc, #0\] ; \(a304 <_thumb\+0x100>\) + a302: 4c01 ldr r4, \[pc, #4\] ; \(a308 <_thumb\+0x104>\) +#------------------------------------------------------------------------------ +#------ .got offset for ttf3 +#------------------------------------------------------------------------------ + a304: 000000ac \.word 0x000000ac +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for ttf3 +#------------------------------------------------------------------------------ + a308: 00006da4 \.word 0x00006da4 + a30c: f7fe ef10 blx 9130 <abf3> +#------------------------------------------------------------------------------ +#------ thumb entry to abf3 +#------------------------------------------------------------------------------ + a310: f7fe bf0c b\.w 912c <atf3\+0xc> +#------------------------------------------------------------------------------ +#------ thumb entry to abf3 +#------------------------------------------------------------------------------ + a314: f43e af0a beq\.w 912c <atf3\+0xc> + a318: 4c00 ldr r4, \[pc, #0\] ; \(a31c <_thumb\+0x118>\) + a31a: 4c01 ldr r4, \[pc, #4\] ; \(a320 <_thumb\+0x11c>\) +#------------------------------------------------------------------------------ +#------ .got offset for abf3 +#------------------------------------------------------------------------------ + a31c: 000000a0 \.word 0x000000a0 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for abf3 +#------------------------------------------------------------------------------ + a320: 00006d80 \.word 0x00006d80 + a324: f7fe ef14 blx 9150 <tbf3> +#------------------------------------------------------------------------------ +#------ thumb entry to tbf3 +#------------------------------------------------------------------------------ + a328: f7fe bf10 b\.w 914c <ttf3\+0xc> +#------------------------------------------------------------------------------ +#------ thumb entry to tbf3 +#------------------------------------------------------------------------------ + a32c: f43e af0e beq\.w 914c <ttf3\+0xc> + a330: 4c00 ldr r4, \[pc, #0\] ; \(a334 <_thumb\+0x130>\) + a332: 4c01 ldr r4, \[pc, #4\] ; \(a338 <_thumb\+0x134>\) +#------------------------------------------------------------------------------ +#------ .got offset for tbf3 +#------------------------------------------------------------------------------ + a334: 000000b0 \.word 0x000000b0 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for tbf3 +#------------------------------------------------------------------------------ + a338: 00006d78 \.word 0x00006d78 +#------------------------------------------------------------------------------ +#------ atf4's .plt entry +#------------------------------------------------------------------------------ + a33c: f7fe eeae blx 909c <atf3-0x84> +#------------------------------------------------------------------------------ +#------ thumb entry to atf4's .plt entry +#------------------------------------------------------------------------------ + a340: f7fe beaa b\.w 9098 <atf3-0x88> +#------------------------------------------------------------------------------ +#------ thumb entry to atf4's .plt entry +#------------------------------------------------------------------------------ + a344: f43e aea8 beq\.w 9098 <atf3-0x88> + a348: 4c00 ldr r4, \[pc, #0\] ; \(a34c <_thumb\+0x148>\) + a34a: 4c01 ldr r4, \[pc, #4\] ; \(a350 <_thumb\+0x14c>\) +#------------------------------------------------------------------------------ +#------ .got offset for atf4 +#------------------------------------------------------------------------------ + a34c: 000000c8 \.word 0x000000c8 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for atf4 +#------------------------------------------------------------------------------ + a350: 00006d78 \.word 0x00006d78 +#------------------------------------------------------------------------------ +#------ ttf4's .plt entry +#------------------------------------------------------------------------------ + a354: f7fe ee9a blx 908c <atf3-0x94> +#------------------------------------------------------------------------------ +#------ thumb entry to ttf4's .plt entry +#------------------------------------------------------------------------------ + a358: f7fe be96 b\.w 9088 <atf3-0x98> +#------------------------------------------------------------------------------ +#------ thumb entry to ttf4's .plt entry +#------------------------------------------------------------------------------ + a35c: f43e ae94 beq\.w 9088 <atf3-0x98> + a360: 4c00 ldr r4, \[pc, #0\] ; \(a364 <_thumb\+0x160>\) + a362: 4c01 ldr r4, \[pc, #4\] ; \(a368 <_thumb\+0x164>\) +#------------------------------------------------------------------------------ +#------ .got offset for ttf4 +#------------------------------------------------------------------------------ + a364: 000000c0 \.word 0x000000c0 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for ttf4 +#------------------------------------------------------------------------------ + a368: 00006d58 \.word 0x00006d58 +#------------------------------------------------------------------------------ +#------ abf4's .plt entry +#------------------------------------------------------------------------------ + a36c: f7fe ee7e blx 906c <atf3-0xb4> +#------------------------------------------------------------------------------ +#------ thumb entry to abf4's .plt entry +#------------------------------------------------------------------------------ + a370: f7fe be7a b\.w 9068 <atf3-0xb8> +#------------------------------------------------------------------------------ +#------ thumb entry to abf4's .plt entry +#------------------------------------------------------------------------------ + a374: f43e ae78 beq\.w 9068 <atf3-0xb8> + a378: 4c00 ldr r4, \[pc, #0\] ; \(a37c <_thumb\+0x178>\) + a37a: 4c01 ldr r4, \[pc, #4\] ; \(a380 <_thumb\+0x17c>\) +#------------------------------------------------------------------------------ +#------ .got offset for abf4 +#------------------------------------------------------------------------------ + a37c: 000000b8 \.word 0x000000b8 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for abf4 +#------------------------------------------------------------------------------ + a380: 00006d38 \.word 0x00006d38 +#------------------------------------------------------------------------------ +#------ tbf4's .plt entry +#------------------------------------------------------------------------------ + a384: f7fe ee7a blx 907c <atf3-0xa4> +#------------------------------------------------------------------------------ +#------ thumb entry to tbf4's .plt entry +#------------------------------------------------------------------------------ + a388: f7fe be76 b\.w 9078 <atf3-0xa8> +#------------------------------------------------------------------------------ +#------ thumb entry to tbf4's .plt entry +#------------------------------------------------------------------------------ + a38c: f43e ae74 beq\.w 9078 <atf3-0xa8> + a390: 4c00 ldr r4, \[pc, #0\] ; \(a394 <_thumb\+0x190>\) + a392: 4c01 ldr r4, \[pc, #4\] ; \(a398 <_thumb\+0x194>\) +#------------------------------------------------------------------------------ +#------ .got offset for tbf4 +#------------------------------------------------------------------------------ + a394: 000000bc \.word 0x000000bc +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for tbf4 +#------------------------------------------------------------------------------ + a398: 00006d24 \.word 0x00006d24 diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-10.gd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-10.gd new file mode 100644 index 0000000..be3e09f --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-10.gd @@ -0,0 +1,188 @@ + +.* + +Contents of section \.data: +#------------------------------------------------------------------------------ +#------ 00010000: foo +#------ 00010004: contains aaf1's .iplt entry +#------ 00010008: contains PC-relative offset of aaf1's .iplt entry +#------ 0001000c: contains atf1's .iplt entry +#------------------------------------------------------------------------------ + 10000 44332211 c4900000 bc90ffff d4900000 .* +#------------------------------------------------------------------------------ +#------ 00010010: contains PC-relative offset of atf1's .iplt entry +#------ 00010014: contains abf1's .iplt entry +#------ 00010018: contains PC-relative offset of abf1's .iplt entry +#------ 0001001c: contains taf1's .iplt entry +#------------------------------------------------------------------------------ + 10010 c490ffff e4900000 cc90ffff f0900000 .* +#------------------------------------------------------------------------------ +#------ 00010020: contains PC-relative offset of taf1's .iplt entry +#------ 00010024: contains ttf1's .iplt entry +#------ 00010028: contains PC-relative offset of ttf1's .iplt entry +#------ 0001002c: contains tbf1's .iplt entry +#------------------------------------------------------------------------------ + 10020 d090ffff 00910000 d890ffff 10910000 .* +#------------------------------------------------------------------------------ +#------ 00010030: contains PC-relative offset of tbf1's .iplt entry +#------ 00010034: contains aaf2's .plt entry +#------ 00010038: contains PC-relative offset of aaf2's .plt entry +#------ 0001003c: contains atf2's .plt entry +#------------------------------------------------------------------------------ + 10030 e090ffff 5c900000 2490ffff 18900000 .* +#------------------------------------------------------------------------------ +#------ 00010040: contains PC-relative offset of atf2's .plt entry +#------ 00010044: contains abf2's .plt entry +#------ 00010048: contains PC-relative offset of abf2's .plt entry +#------ 0001004c: contains taf2's .plt entry +#------------------------------------------------------------------------------ + 10040 d88fffff b8900000 7090ffff 50900000 .* +#------------------------------------------------------------------------------ +#------ 00010050: contains PC-relative offset of taf2's .plt entry +#------ 00010054: contains ttf2's .plt entry +#------ 00010058: contains PC-relative offset of ttf2's .plt entry +#------ 0001005c: contains tbf2's .plt entry +#------------------------------------------------------------------------------ + 10050 0090ffff 34900000 dc8fffff 44900000 .* +#------------------------------------------------------------------------------ +#------ 00010060: contains PC-relative offset of tbf2's .plt entry +#------ 00010064: contains aaf3 +#------ 00010068: contains PC-relative offset of aaf3 +#------ 0001006c: contains atf3 +#------------------------------------------------------------------------------ + 10060 e48fffff 68910000 0091ffff 20910000 .* +#------------------------------------------------------------------------------ +#------ 00010070: contains PC-relative offset of atf3 +#------ 00010074: contains abf3 +#------ 00010078: contains PC-relative offset of abf3 +#------ 0001007c: contains taf3 +#------------------------------------------------------------------------------ + 10070 b090ffff 30910000 b890ffff 5c910000 .* +#------------------------------------------------------------------------------ +#------ 00010080: contains PC-relative offset of taf3 +#------ 00010084: contains ttf3 +#------ 00010088: contains PC-relative offset of ttf3 +#------ 0001008c: contains tbf3 +#------------------------------------------------------------------------------ + 10080 dc90ffff 40910000 b890ffff 50910000 .* +#------------------------------------------------------------------------------ +#------ 00010090: contains PC-relative offset of tbf3 +#------ 00010094: contains aaf4's .plt entry +#------ 00010098: contains PC-relative offset of aaf4's .plt entry +#------ 0001009c: contains atf4's .plt entry +#------------------------------------------------------------------------------ + 10090 c090ffff 24900000 8c8fffff 9c900000 .* +#------------------------------------------------------------------------------ +#------ 000100a0: contains PC-relative offset of atf4's .plt entry +#------ 000100a4: contains abf4's .plt entry +#------ 000100a8: contains PC-relative offset of abf4's .plt entry +#------ 000100ac: contains taf4's .plt entry +#------------------------------------------------------------------------------ + 100a0 fc8fffff 6c900000 c48fffff a8900000 .* +#------------------------------------------------------------------------------ +#------ 000100b0: contains PC-relative offset of taf4's .plt entry +#------ 000100b4: contains ttf4's .plt entry +#------ 000100b8: contains PC-relative offset of ttf4's .plt entry +#------ 000100bc: contains tbf4's .plt entry +#------------------------------------------------------------------------------ + 100b0 f88fffff 8c900000 d48fffff 7c900000 .* +#------------------------------------------------------------------------------ +#------ 000100c0: contains PC-relative offset of tbf4's .plt entry +#------------------------------------------------------------------------------ + 100c0 bc8fffff .* +Contents of section \.got: +#------------------------------------------------------------------------------ +#------ 00011000: .got.plt +#------ 00011004: reserved .got.plt entry +#------ 00011008: reserved .got.plt entry +#------ 0001100c: atf2's .got.plt entry [R_ARM_JUMP_SLOT] +#------------------------------------------------------------------------------ + 11000 00200100 00000000 00000000 00900000 .* +#------------------------------------------------------------------------------ +#------ 00011010: aaf4's .got.plt entry [R_ARM_JUMP_SLOT] +#------ 00011014: ttf2's .got.plt entry [R_ARM_JUMP_SLOT] +#------ 00011018: tbf2's .got.plt entry [R_ARM_JUMP_SLOT] +#------ 0001101c: taf2's .got.plt entry [R_ARM_JUMP_SLOT] +#------------------------------------------------------------------------------ + 11010 00900000 00900000 00900000 00900000 .* +#------------------------------------------------------------------------------ +#------ 00011020: aaf2's .got.plt entry [R_ARM_JUMP_SLOT] +#------ 00011024: abf4's .got.plt entry [R_ARM_JUMP_SLOT] +#------ 00011028: tbf4's .got.plt entry [R_ARM_JUMP_SLOT] +#------ 0001102c: ttf4's .got.plt entry [R_ARM_JUMP_SLOT] +#------------------------------------------------------------------------------ + 11020 00900000 00900000 00900000 00900000 .* +#------------------------------------------------------------------------------ +#------ 00011030: atf4's .got.plt entry [R_ARM_JUMP_SLOT] +#------ 00011034: taf4's .got.plt entry [R_ARM_JUMP_SLOT] +#------ 00011038: abf2's .got.plt entry [R_ARM_JUMP_SLOT] +#------ 0001103c: aaf1's .igot.plt entry [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 11030 00900000 00900000 00900000 00a00000 .* +#------------------------------------------------------------------------------ +#------ 00011040: atf1's .igot.plt entry [R_ARM_IRELATIVE] +#------ 00011044: abf1's .igot.plt entry [R_ARM_IRELATIVE] +#------ 00011048: taf1's .igot.plt entry [R_ARM_IRELATIVE] +#------ 0001104c: ttf1's .igot.plt entry [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 11040 04a00000 08a00000 0da00000 0fa00000 .* +#------------------------------------------------------------------------------ +#------ 00011050: tbf1's .igot.plt entry [R_ARM_IRELATIVE] +#------ 00011054: atf3's .igot.plt pointer to 0xa018 [R_ARM_IRELATIVE] +#------ 00011058: abf3's .igot.plt pointer to 0xa01c [R_ARM_IRELATIVE] +#------ 0001105c: ttf3's .igot.plt pointer to 0xa023 [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 11050 11a00000 18a00000 1ca00000 23a00000 .* +#------------------------------------------------------------------------------ +#------ 00011060: tbf3's .igot.plt pointer to 0xa025 [R_ARM_IRELATIVE] +#------ 00011064: taf3's .igot.plt pointer to 0xa021 [R_ARM_IRELATIVE] +#------ 00011068: aaf3's .igot.plt pointer to 0xa014 [R_ARM_IRELATIVE] +#------ 0001106c: .got entry for foo +#------------------------------------------------------------------------------ + 11060 25a00000 21a00000 14a00000 00000100 .* +#------------------------------------------------------------------------------ +#------ 00011070: .got entry for aaf1's .iplt entry +#------ 00011074: .got entry for atf1's .iplt entry +#------ 00011078: .got entry for abf1's .iplt entry +#------ 0001107c: .got entry for taf1's .iplt entry +#------------------------------------------------------------------------------ + 11070 c4900000 d4900000 e4900000 f0900000 .* +#------------------------------------------------------------------------------ +#------ 00011080: .got entry for ttf1's .iplt entry +#------ 00011084: .got entry for tbf1's .iplt entry +#------ 00011088: .got entry for foo +#------ 0001108c: .got entry for atf2 [R_ARM_GLOB_DAT] +#------------------------------------------------------------------------------ + 11080 00910000 10910000 00000100 00000000 .* +#------------------------------------------------------------------------------ +#------ 00011090: .got entry for aaf4 [R_ARM_GLOB_DAT] +#------ 00011094: .got entry for ttf2 [R_ARM_GLOB_DAT] +#------ 00011098: .got entry for tbf2 [R_ARM_GLOB_DAT] +#------ 0001109c: .got entry for atf3 +#------------------------------------------------------------------------------ + 11090 00000000 00000000 00000000 20910000 .* +#------------------------------------------------------------------------------ +#------ 000110a0: .got entry for abf3 +#------ 000110a4: .got entry for taf2 [R_ARM_GLOB_DAT] +#------ 000110a8: .got entry for aaf2 [R_ARM_GLOB_DAT] +#------ 000110ac: .got entry for ttf3 +#------------------------------------------------------------------------------ + 110a0 30910000 00000000 00000000 40910000 .* +#------------------------------------------------------------------------------ +#------ 000110b0: .got entry for tbf3 +#------ 000110b4: .got entry for taf3 +#------ 000110b8: .got entry for abf4 [R_ARM_GLOB_DAT] +#------ 000110bc: .got entry for tbf4 [R_ARM_GLOB_DAT] +#------------------------------------------------------------------------------ + 110b0 50910000 5c910000 00000000 00000000 .* +#------------------------------------------------------------------------------ +#------ 000110c0: .got entry for ttf4 [R_ARM_GLOB_DAT] +#------ 000110c4: .got entry for aaf3 +#------ 000110c8: .got entry for atf4 [R_ARM_GLOB_DAT] +#------ 000110cc: .got entry for taf4 [R_ARM_GLOB_DAT] +#------------------------------------------------------------------------------ + 110c0 00000000 68910000 00000000 00000000 .* +#------------------------------------------------------------------------------ +#------ 000110d0: .got entry for abf2 [R_ARM_GLOB_DAT] +#------------------------------------------------------------------------------ + 110d0 00000000 .* diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-10.rd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-10.rd new file mode 100644 index 0000000..8846197 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-10.rd @@ -0,0 +1,42 @@ + +Relocation section '\.rel\.dyn' at offset 0x8000 contains 24 entries: + Offset Info Type Sym\.Value Sym\. Name +0001103c ......a0 R_ARM_IRELATIVE +00011040 ......a0 R_ARM_IRELATIVE +00011044 ......a0 R_ARM_IRELATIVE +00011048 ......a0 R_ARM_IRELATIVE +0001104c ......a0 R_ARM_IRELATIVE +00011050 ......a0 R_ARM_IRELATIVE +00011054 ......a0 R_ARM_IRELATIVE +00011058 ......a0 R_ARM_IRELATIVE +0001105c ......a0 R_ARM_IRELATIVE +00011060 ......a0 R_ARM_IRELATIVE +00011064 ......a0 R_ARM_IRELATIVE +00011068 ......a0 R_ARM_IRELATIVE +0001108c ......15 R_ARM_GLOB_DAT 00009018 atf2 +00011090 ......15 R_ARM_GLOB_DAT 00009024 aaf4 +00011094 ......15 R_ARM_GLOB_DAT 00009034 ttf2 +00011098 ......15 R_ARM_GLOB_DAT 00009044 tbf2 +000110a4 ......15 R_ARM_GLOB_DAT 00009050 taf2 +000110a8 ......15 R_ARM_GLOB_DAT 0000905c aaf2 +000110b8 ......15 R_ARM_GLOB_DAT 0000906c abf4 +000110bc ......15 R_ARM_GLOB_DAT 0000907c tbf4 +000110c0 ......15 R_ARM_GLOB_DAT 0000908c ttf4 +000110c8 ......15 R_ARM_GLOB_DAT 0000909c atf4 +000110cc ......15 R_ARM_GLOB_DAT 000090a8 taf4 +000110d0 ......15 R_ARM_GLOB_DAT 000090b8 abf2 + +Relocation section '\.rel\.plt' at offset 0x80c0 contains 12 entries: + Offset Info Type Sym\.Value Sym\. Name +0001100c ......16 R_ARM_JUMP_SLOT 00009018 atf2 +00011010 ......16 R_ARM_JUMP_SLOT 00009024 aaf4 +00011014 ......16 R_ARM_JUMP_SLOT 00009034 ttf2 +00011018 ......16 R_ARM_JUMP_SLOT 00009044 tbf2 +0001101c ......16 R_ARM_JUMP_SLOT 00009050 taf2 +00011020 ......16 R_ARM_JUMP_SLOT 0000905c aaf2 +00011024 ......16 R_ARM_JUMP_SLOT 0000906c abf4 +00011028 ......16 R_ARM_JUMP_SLOT 0000907c tbf4 +0001102c ......16 R_ARM_JUMP_SLOT 0000908c ttf4 +00011030 ......16 R_ARM_JUMP_SLOT 0000909c atf4 +00011034 ......16 R_ARM_JUMP_SLOT 000090a8 taf4 +00011038 ......16 R_ARM_JUMP_SLOT 000090b8 abf2 diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-10.s b/binutils-2.24/ld/testsuite/ld-arm/ifunc-10.s new file mode 100644 index 0000000..5b1912f --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-10.s @@ -0,0 +1,90 @@ + .syntax unified + .arch armv6t2 + + .macro define,name,type + .type \name,%gnu_indirect_function + \type +\name: + mov pc,lr + .size \name,.-\name + .endm + + .macro define2,name + define aa\name,.arm + define at\name,.arm + define ab\name,.arm + define ta\name,.thumb_func + define tt\name,.thumb_func + define tb\name,.thumb_func + .endm + + .macro test_relocs,name,width + bl \name(PLT) + b\width \name + beq\width \name + ldr r4,1f + ldr r4,2f +1: + .word \name(GOT) +2: + .word \name(GOT_PREL) + .endm + + .macro test_relocs2,name,type,width + test_relocs a\type\name,\width + test_relocs t\type\name,\width + test_relocs ab\name,\width + test_relocs tb\name,\width + .endm + + .macro diff,name + .word \name + .word \name-. + .endm + + .macro alldirs,doit,name + \doit aa\name + \doit at\name + \doit ab\name + \doit ta\name + \doit tt\name + \doit tb\name + .endm + + define2 f1 + # f2 provided by ifunc-4.so + define2 f3 + # f4 provided by ifunc-4.so + + alldirs .globl,f3 + alldirs .hidden,f3 + + .globl _start + .type _start,%function + .arm +_start: + test_relocs foo + test_relocs2 f1,a, + test_relocs2 f2,a, + test_relocs2 f3,a, + test_relocs2 f4,a, + .size _start,.-_start + + .globl _thumb + .type _thumb,%function + .thumb_func +_thumb: + test_relocs foo + test_relocs2 f1,t,.w + test_relocs2 f2,t,.w + test_relocs2 f3,t,.w + test_relocs2 f4,t,.w + .size _thumb,.-_thumb + + .data +foo: + .word 0x11223344 + alldirs diff,f1 + alldirs diff,f2 + alldirs diff,f3 + alldirs diff,f4 diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-11.dd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-11.dd new file mode 100644 index 0000000..89a7530 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-11.dd @@ -0,0 +1,95 @@ + +.* + + +Disassembly of section \.text: + +0000a000 <f1>: + a000: e1a0f00e mov pc, lr + +0000a004 <f2>: + a004: e1a0f00e mov pc, lr + +0000a008 <f3>: + a008: e1a0f00e mov pc, lr + +0000a00c <f1t>: + a00c: 46f7 mov pc, lr + +0000a00e <f2t>: + a00e: 46f7 mov pc, lr + +0000a010 <f3t>: + a010: 46f7 mov pc, lr + +0000a012 <_start>: + a012: f8df 4004 ldr\.w r4, \[pc, #4\] ; a018 <_start\+0x6> + a016: 4c01 ldr r4, \[pc, #4\] ; \(a01c <_start\+0xa>\) +#------------------------------------------------------------------------------ +#------ .got offset for foo +#------------------------------------------------------------------------------ + a018: 00000018 \.word 0x00000018 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for foo +#------------------------------------------------------------------------------ + a01c: 00006ff0 \.word 0x00006ff0 + a020: 4c00 ldr r4, \[pc, #0\] ; \(a024 <_start\+0x12>\) + a022: 4c01 ldr r4, \[pc, #4\] ; \(a028 <_start\+0x16>\) +#------------------------------------------------------------------------------ +#------ .got offset for f1 +#------------------------------------------------------------------------------ + a024: 00000010 \.word 0x00000010 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for f1 +#------------------------------------------------------------------------------ + a028: 00006fe8 \.word 0x00006fe8 + a02c: 4c00 ldr r4, \[pc, #0\] ; \(a030 <_start\+0x1e>\) + a02e: 4c01 ldr r4, \[pc, #4\] ; \(a034 <_start\+0x22>\) +#------------------------------------------------------------------------------ +#------ .got offset for f2 +#------------------------------------------------------------------------------ + a030: 00000024 \.word 0x00000024 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for f2 +#------------------------------------------------------------------------------ + a034: 00006ff0 \.word 0x00006ff0 + a038: 4c00 ldr r4, \[pc, #0\] ; \(a03c <_start\+0x2a>\) + a03a: 4c01 ldr r4, \[pc, #4\] ; \(a040 <_start\+0x2e>\) +#------------------------------------------------------------------------------ +#------ .got offset for f3 +#------------------------------------------------------------------------------ + a03c: 00000020 \.word 0x00000020 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for f3 +#------------------------------------------------------------------------------ + a040: 00006fe0 \.word 0x00006fe0 + a044: 4c00 ldr r4, \[pc, #0\] ; \(a048 <_start\+0x36>\) + a046: 4c01 ldr r4, \[pc, #4\] ; \(a04c <_start\+0x3a>\) +#------------------------------------------------------------------------------ +#------ .got offset for f1t +#------------------------------------------------------------------------------ + a048: 00000014 \.word 0x00000014 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for f1t +#------------------------------------------------------------------------------ + a04c: 00006fc8 \.word 0x00006fc8 + a050: 4c00 ldr r4, \[pc, #0\] ; \(a054 <_start\+0x42>\) + a052: 4c01 ldr r4, \[pc, #4\] ; \(a058 <_start\+0x46>\) +#------------------------------------------------------------------------------ +#------ .got offset for f2t +#------------------------------------------------------------------------------ + a054: 0000001c \.word 0x0000001c +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for f2t +#------------------------------------------------------------------------------ + a058: 00006fc4 \.word 0x00006fc4 + a05c: 4c00 ldr r4, \[pc, #0\] ; \(a060 <_start\+0x4e>\) + a05e: 4c01 ldr r4, \[pc, #4\] ; \(a064 <_start\+0x52>\) +#------------------------------------------------------------------------------ +#------ .got offset for f3t +#------------------------------------------------------------------------------ + a060: 00000028 \.word 0x00000028 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for f3t +#------------------------------------------------------------------------------ + a064: 00006fc4 \.word 0x00006fc4 diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-11.gd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-11.gd new file mode 100644 index 0000000..aea1583 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-11.gd @@ -0,0 +1,29 @@ + +.* + +Contents of section \.data: +#------------------------------------------------------------------------------ +#------ 00010000: foo +#------------------------------------------------------------------------------ + 10000 44332211 00800000 30800000 .* +Contents of section \.got: +#------------------------------------------------------------------------------ +#------ 00011000: .got.plt +#------ 00011004: reserved .got.plt entry +#------ 00011008: reserved .got.plt entry +#------ 0001100c: .got entry for foo +#------------------------------------------------------------------------------ + 11000 00000000 00000000 00000000 00000100 .* +#------------------------------------------------------------------------------ +#------ 00011010: .got entry for f1 [R_ARM_IRELATIVE] +#------ 00011014: .got entry for f1t [R_ARM_IRELATIVE] +#------ 00011018: .got entry for foo +#------ 0001101c: .got entry for f2t [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 11010 00a00000 0da00000 00000100 0fa00000 .* +#------------------------------------------------------------------------------ +#------ 00011020: .got entry for f3 [R_ARM_IRELATIVE] +#------ 00011024: .got entry for f2 [R_ARM_IRELATIVE] +#------ 00011028: .got entry for f3t [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 11020 08a00000 04a00000 11a00000 .* diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-11.rd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-11.rd new file mode 100644 index 0000000..82ce9b7 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-11.rd @@ -0,0 +1,11 @@ + +There is no dynamic section in this file\. + +Relocation section '\.rel\.dyn' at offset 0x8000 contains 6 entries: + Offset Info Type Sym\.Value Sym\. Name +00011010 ......a0 R_ARM_IRELATIVE +00011024 ......a0 R_ARM_IRELATIVE +00011020 ......a0 R_ARM_IRELATIVE +00011014 ......a0 R_ARM_IRELATIVE +0001101c ......a0 R_ARM_IRELATIVE +00011028 ......a0 R_ARM_IRELATIVE diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-11.s b/binutils-2.24/ld/testsuite/ld-arm/ifunc-11.s new file mode 100644 index 0000000..36ebc24 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-11.s @@ -0,0 +1,52 @@ + .syntax unified + .arch armv6t2 + + .macro define,name,type + .type \name,%gnu_indirect_function + \type +\name: + mov pc,lr + .size \name,.-\name + .endm + + .macro test_relocs,name + ldr r4,1f + ldr r4,2f +1: + .word \name(GOT) +2: + .word \name(GOT_PREL) + .endm + + .global f2 + .global f2t + + .global f3 + .hidden f3 + .global f3t + .hidden f3t + + define f1,.arm + define f2,.arm + define f3,.arm + + define f1t,.thumb_func + define f2t,.thumb_func + define f3t,.thumb_func + + .globl _start +_start: + test_relocs foo + test_relocs f1 + test_relocs f2 + test_relocs f3 + test_relocs f1t + test_relocs f2t + test_relocs f3t + .size _start,.-_start + + .data +foo: + .word 0x11223344 + .word __irel_start + .word __irel_end diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-12.dd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-12.dd new file mode 100644 index 0000000..89a7530 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-12.dd @@ -0,0 +1,95 @@ + +.* + + +Disassembly of section \.text: + +0000a000 <f1>: + a000: e1a0f00e mov pc, lr + +0000a004 <f2>: + a004: e1a0f00e mov pc, lr + +0000a008 <f3>: + a008: e1a0f00e mov pc, lr + +0000a00c <f1t>: + a00c: 46f7 mov pc, lr + +0000a00e <f2t>: + a00e: 46f7 mov pc, lr + +0000a010 <f3t>: + a010: 46f7 mov pc, lr + +0000a012 <_start>: + a012: f8df 4004 ldr\.w r4, \[pc, #4\] ; a018 <_start\+0x6> + a016: 4c01 ldr r4, \[pc, #4\] ; \(a01c <_start\+0xa>\) +#------------------------------------------------------------------------------ +#------ .got offset for foo +#------------------------------------------------------------------------------ + a018: 00000018 \.word 0x00000018 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for foo +#------------------------------------------------------------------------------ + a01c: 00006ff0 \.word 0x00006ff0 + a020: 4c00 ldr r4, \[pc, #0\] ; \(a024 <_start\+0x12>\) + a022: 4c01 ldr r4, \[pc, #4\] ; \(a028 <_start\+0x16>\) +#------------------------------------------------------------------------------ +#------ .got offset for f1 +#------------------------------------------------------------------------------ + a024: 00000010 \.word 0x00000010 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for f1 +#------------------------------------------------------------------------------ + a028: 00006fe8 \.word 0x00006fe8 + a02c: 4c00 ldr r4, \[pc, #0\] ; \(a030 <_start\+0x1e>\) + a02e: 4c01 ldr r4, \[pc, #4\] ; \(a034 <_start\+0x22>\) +#------------------------------------------------------------------------------ +#------ .got offset for f2 +#------------------------------------------------------------------------------ + a030: 00000024 \.word 0x00000024 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for f2 +#------------------------------------------------------------------------------ + a034: 00006ff0 \.word 0x00006ff0 + a038: 4c00 ldr r4, \[pc, #0\] ; \(a03c <_start\+0x2a>\) + a03a: 4c01 ldr r4, \[pc, #4\] ; \(a040 <_start\+0x2e>\) +#------------------------------------------------------------------------------ +#------ .got offset for f3 +#------------------------------------------------------------------------------ + a03c: 00000020 \.word 0x00000020 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for f3 +#------------------------------------------------------------------------------ + a040: 00006fe0 \.word 0x00006fe0 + a044: 4c00 ldr r4, \[pc, #0\] ; \(a048 <_start\+0x36>\) + a046: 4c01 ldr r4, \[pc, #4\] ; \(a04c <_start\+0x3a>\) +#------------------------------------------------------------------------------ +#------ .got offset for f1t +#------------------------------------------------------------------------------ + a048: 00000014 \.word 0x00000014 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for f1t +#------------------------------------------------------------------------------ + a04c: 00006fc8 \.word 0x00006fc8 + a050: 4c00 ldr r4, \[pc, #0\] ; \(a054 <_start\+0x42>\) + a052: 4c01 ldr r4, \[pc, #4\] ; \(a058 <_start\+0x46>\) +#------------------------------------------------------------------------------ +#------ .got offset for f2t +#------------------------------------------------------------------------------ + a054: 0000001c \.word 0x0000001c +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for f2t +#------------------------------------------------------------------------------ + a058: 00006fc4 \.word 0x00006fc4 + a05c: 4c00 ldr r4, \[pc, #0\] ; \(a060 <_start\+0x4e>\) + a05e: 4c01 ldr r4, \[pc, #4\] ; \(a064 <_start\+0x52>\) +#------------------------------------------------------------------------------ +#------ .got offset for f3t +#------------------------------------------------------------------------------ + a060: 00000028 \.word 0x00000028 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for f3t +#------------------------------------------------------------------------------ + a064: 00006fc4 \.word 0x00006fc4 diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-12.gd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-12.gd new file mode 100644 index 0000000..721c315 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-12.gd @@ -0,0 +1,39 @@ + +.* + +Contents of section \.data: +#------------------------------------------------------------------------------ +#------ 00010000: foo +#------ 00010004: contains f1 [R_ARM_IRELATIVE] +#------ 00010008: f2 [R_ARM_ABS32] +#------ 0001000c: contains f3 [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 10000 44332211 00a00000 00000000 08a00000 .* +#------------------------------------------------------------------------------ +#------ 00010010: contains f1t [R_ARM_IRELATIVE] +#------ 00010014: f2t [R_ARM_ABS32] +#------ 00010018: contains f3t [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 10010 0da00000 00000000 11a00000 80800000 .* + 10020 80800000 .* +Contents of section \.got: +#------------------------------------------------------------------------------ +#------ 00011000: .got.plt +#------ 00011004: reserved .got.plt entry +#------ 00011008: reserved .got.plt entry +#------ 0001100c: .got entry for foo [R_ARM_RELATIVE] +#------------------------------------------------------------------------------ + 11000 00200100 00000000 00000000 00000100 .* +#------------------------------------------------------------------------------ +#------ 00011010: .got entry for f1 [R_ARM_IRELATIVE] +#------ 00011014: .got entry for f1t [R_ARM_IRELATIVE] +#------ 00011018: .got entry for foo [R_ARM_RELATIVE] +#------ 0001101c: .got entry for f2t [R_ARM_GLOB_DAT] +#------------------------------------------------------------------------------ + 11010 00a00000 0da00000 00000100 00000000 .* +#------------------------------------------------------------------------------ +#------ 00011020: .got entry for f3 [R_ARM_IRELATIVE] +#------ 00011024: .got entry for f2 [R_ARM_GLOB_DAT] +#------ 00011028: .got entry for f3t [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 11020 08a00000 00000000 11a00000 .* diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-12.rd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-12.rd new file mode 100644 index 0000000..c5d62c1 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-12.rd @@ -0,0 +1,19 @@ + +Relocation section '\.rel\.dyn' at offset 0x8000 contains 16 entries: + Offset Info Type Sym\.Value Sym\. Name +0001001c ......17 R_ARM_RELATIVE +00010020 ......17 R_ARM_RELATIVE +0001100c ......17 R_ARM_RELATIVE +00011018 ......17 R_ARM_RELATIVE +00010004 ......a0 R_ARM_IRELATIVE +0001000c ......a0 R_ARM_IRELATIVE +00010010 ......a0 R_ARM_IRELATIVE +00010018 ......a0 R_ARM_IRELATIVE +00011010 ......a0 R_ARM_IRELATIVE +00011014 ......a0 R_ARM_IRELATIVE +00011020 ......a0 R_ARM_IRELATIVE +00011028 ......a0 R_ARM_IRELATIVE +00010008 ......02 R_ARM_ABS32 f2\(\) f2 +00011024 ......15 R_ARM_GLOB_DAT f2\(\) f2 +00010014 ......02 R_ARM_ABS32 f2t\(\) f2t +0001101c ......15 R_ARM_GLOB_DAT f2t\(\) f2t diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-12.s b/binutils-2.24/ld/testsuite/ld-arm/ifunc-12.s new file mode 100644 index 0000000..388ac34 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-12.s @@ -0,0 +1,58 @@ + .syntax unified + .arch armv6t2 + + .macro define,name,type + .type \name,%gnu_indirect_function + \type +\name: + mov pc,lr + .size \name,.-\name + .endm + + .macro test_relocs,name + ldr r4,1f + ldr r4,2f +1: + .word \name(GOT) +2: + .word \name(GOT_PREL) + .endm + + .global f2 + .global f2t + + .global f3 + .hidden f3 + .global f3t + .hidden f3t + + define f1,.arm + define f2,.arm + define f3,.arm + + define f1t,.thumb_func + define f2t,.thumb_func + define f3t,.thumb_func + + .globl _start +_start: + test_relocs foo + test_relocs f1 + test_relocs f2 + test_relocs f3 + test_relocs f1t + test_relocs f2t + test_relocs f3t + .size _start,.-_start + + .data +foo: + .word 0x11223344 + .word f1 + .word f2 + .word f3 + .word f1t + .word f2t + .word f3t + .word __irel_start + .word __irel_end diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-13.dd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-13.dd new file mode 100644 index 0000000..d5df382 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-13.dd @@ -0,0 +1,89 @@ + +.* + + +Disassembly of section \.text: + +0000a000 <f1>: + a000: e1a0f00e mov pc, lr + +0000a004 <f3>: + a004: e1a0f00e mov pc, lr + +0000a008 <f1t>: + a008: 46f7 mov pc, lr + +0000a00a <f3t>: + a00a: 46f7 mov pc, lr + +0000a00c <_start>: + a00c: 4c00 ldr r4, \[pc, #0\] ; \(a010 <_start\+0x4>\) + a00e: 4c01 ldr r4, \[pc, #4\] ; \(a014 <_start\+0x8>\) +#------------------------------------------------------------------------------ +#------ .got offset for foo +#------------------------------------------------------------------------------ + a010: 00000018 \.word 0x00000018 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for foo +#------------------------------------------------------------------------------ + a014: 00006ff8 \.word 0x00006ff8 + a018: 4c00 ldr r4, \[pc, #0\] ; \(a01c <_start\+0x10>\) + a01a: 4c01 ldr r4, \[pc, #4\] ; \(a020 <_start\+0x14>\) +#------------------------------------------------------------------------------ +#------ .got offset for f1 +#------------------------------------------------------------------------------ + a01c: 00000010 \.word 0x00000010 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for f1 +#------------------------------------------------------------------------------ + a020: 00006ff0 \.word 0x00006ff0 + a024: 4c00 ldr r4, \[pc, #0\] ; \(a028 <_start\+0x1c>\) + a026: 4c01 ldr r4, \[pc, #4\] ; \(a02c <_start\+0x20>\) +#------------------------------------------------------------------------------ +#------ .got offset for f2 +#------------------------------------------------------------------------------ + a028: 00000024 \.word 0x00000024 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for f2 +#------------------------------------------------------------------------------ + a02c: 00006ff8 \.word 0x00006ff8 + a030: 4c00 ldr r4, \[pc, #0\] ; \(a034 <_start\+0x28>\) + a032: 4c01 ldr r4, \[pc, #4\] ; \(a038 <_start\+0x2c>\) +#------------------------------------------------------------------------------ +#------ .got offset for f3 +#------------------------------------------------------------------------------ + a034: 00000020 \.word 0x00000020 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for f3 +#------------------------------------------------------------------------------ + a038: 00006fe8 \.word 0x00006fe8 + a03c: 4c00 ldr r4, \[pc, #0\] ; \(a040 <_start\+0x34>\) + a03e: 4c01 ldr r4, \[pc, #4\] ; \(a044 <_start\+0x38>\) +#------------------------------------------------------------------------------ +#------ .got offset for f1t +#------------------------------------------------------------------------------ + a040: 00000014 \.word 0x00000014 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for f1t +#------------------------------------------------------------------------------ + a044: 00006fd0 \.word 0x00006fd0 + a048: 4c00 ldr r4, \[pc, #0\] ; \(a04c <_start\+0x40>\) + a04a: 4c01 ldr r4, \[pc, #4\] ; \(a050 <_start\+0x44>\) +#------------------------------------------------------------------------------ +#------ .got offset for f2t +#------------------------------------------------------------------------------ + a04c: 0000001c \.word 0x0000001c +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for f2t +#------------------------------------------------------------------------------ + a050: 00006fcc \.word 0x00006fcc + a054: 4c00 ldr r4, \[pc, #0\] ; \(a058 <_start\+0x4c>\) + a056: 4c01 ldr r4, \[pc, #4\] ; \(a05c <_start\+0x50>\) +#------------------------------------------------------------------------------ +#------ .got offset for f3t +#------------------------------------------------------------------------------ + a058: 00000028 \.word 0x00000028 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for f3t +#------------------------------------------------------------------------------ + a05c: 00006fcc \.word 0x00006fcc diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-13.gd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-13.gd new file mode 100644 index 0000000..9b5dbcb --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-13.gd @@ -0,0 +1,29 @@ + +.* + +Contents of section \.data: +#------------------------------------------------------------------------------ +#------ 00010000: foo +#------------------------------------------------------------------------------ + 10000 44332211 30800000 30800000 .* +Contents of section \.got: +#------------------------------------------------------------------------------ +#------ 00011000: .got.plt +#------ 00011004: reserved .got.plt entry +#------ 00011008: reserved .got.plt entry +#------ 0001100c: .got entry for foo +#------------------------------------------------------------------------------ + 11000 00200100 00000000 00000000 00000100 .* +#------------------------------------------------------------------------------ +#------ 00011010: .got entry for f1 [R_ARM_IRELATIVE] +#------ 00011014: .got entry for f1t [R_ARM_IRELATIVE] +#------ 00011018: .got entry for foo +#------ 0001101c: .got entry for f2t [R_ARM_GLOB_DAT] +#------------------------------------------------------------------------------ + 11010 00a00000 09a00000 00000100 00000000 .* +#------------------------------------------------------------------------------ +#------ 00011020: .got entry for f3 [R_ARM_IRELATIVE] +#------ 00011024: .got entry for f2 [R_ARM_GLOB_DAT] +#------ 00011028: .got entry for f3t [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 11020 04a00000 00000000 0ba00000 .* diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-13.rd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-13.rd new file mode 100644 index 0000000..c58ab8a --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-13.rd @@ -0,0 +1,9 @@ + +Relocation section '\.rel\.dyn' at offset 0x8000 contains 6 entries: + Offset Info Type Sym\.Value Sym\. Name +00011010 ......a0 R_ARM_IRELATIVE +00011014 ......a0 R_ARM_IRELATIVE +00011020 ......a0 R_ARM_IRELATIVE +00011028 ......a0 R_ARM_IRELATIVE +0001101c ......15 R_ARM_GLOB_DAT 00000000 f2t +00011024 ......15 R_ARM_GLOB_DAT 00000000 f2 diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-13.s b/binutils-2.24/ld/testsuite/ld-arm/ifunc-13.s new file mode 100644 index 0000000..467f06f --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-13.s @@ -0,0 +1,50 @@ + .syntax unified + .arch armv6t2 + + .macro define,name,type + .type \name,%gnu_indirect_function + \type +\name: + mov pc,lr + .size \name,.-\name + .endm + + .macro test_relocs,name + ldr r4,1f + ldr r4,2f +1: + .word \name(GOT) +2: + .word \name(GOT_PREL) + .endm + + .global f2 + .global f2t + + .global f3 + .hidden f3 + .global f3t + .hidden f3t + + define f1,.arm + define f3,.arm + + define f1t,.thumb_func + define f3t,.thumb_func + + .globl _start +_start: + test_relocs foo + test_relocs f1 + test_relocs f2 + test_relocs f3 + test_relocs f1t + test_relocs f2t + test_relocs f3t + .size _start,.-_start + + .data +foo: + .word 0x11223344 + .word __irel_start + .word __irel_end diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-14.dd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-14.dd new file mode 100644 index 0000000..861f687 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-14.dd @@ -0,0 +1,100 @@ + +.* + + +Disassembly of section \.plt: + +00009000 <\.plt>: + 9000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) + 9004: e59fe004 ldr lr, \[pc, #4\] ; 9010 <__irel_end\+0xff0> + 9008: e08fe00e add lr, pc, lr + 900c: e5bef008 ldr pc, \[lr, #8\]! +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got.plt +#------------------------------------------------------------------------------ + 9010: 00007ff0 \.word 0x00007ff0 +#------------------------------------------------------------------------------ +#------ f2t's .plt entry +#------------------------------------------------------------------------------ + 9014: e28fc600 add ip, pc, #0, 12 + 9018: e28cca07 add ip, ip, #28672 ; 0x7000 + 901c: e5bcfff0 ldr pc, \[ip, #4080\]! ; 0xff0 +#------------------------------------------------------------------------------ +#------ f2's .plt entry +#------------------------------------------------------------------------------ + 9020: e28fc600 add ip, pc, #0, 12 + 9024: e28cca07 add ip, ip, #28672 ; 0x7000 + 9028: e5bcffe8 ldr pc, \[ip, #4072\]! ; 0xfe8 + +Disassembly of section \.iplt: + +0000902c <f3-0x18>: +#------------------------------------------------------------------------------ +#------ f1's .iplt entry +#------------------------------------------------------------------------------ + 902c: e28fc600 add ip, pc, #0, 12 + 9030: e28cca07 add ip, ip, #28672 ; 0x7000 + 9034: e5bcffe0 ldr pc, \[ip, #4064\]! ; 0xfe0 +#------------------------------------------------------------------------------ +#------ f1t's .iplt entry +#------------------------------------------------------------------------------ + 9038: e28fc600 add ip, pc, #0, 12 + 903c: e28cca07 add ip, ip, #28672 ; 0x7000 + 9040: e5bcffd8 ldr pc, \[ip, #4056\]! ; 0xfd8 + +00009044 <f3>: + 9044: e28fc600 add ip, pc, #0, 12 + 9048: e28cca07 add ip, ip, #28672 ; 0x7000 + 904c: e5bcffd0 ldr pc, \[ip, #4048\]! ; 0xfd0 + +00009050 <f3t>: + 9050: e28fc600 add ip, pc, #0, 12 + 9054: e28cca07 add ip, ip, #28672 ; 0x7000 + 9058: e5bcffc8 ldr pc, \[ip, #4040\]! ; 0xfc8 + +Disassembly of section \.text: + +0000a000 <f1>: + a000: e1a0f00e mov pc, lr + a004: e1a0f00e mov pc, lr + +0000a008 <f1t>: + a008: 46f7 mov pc, lr + a00a: 46f7 mov pc, lr + +0000a00c <_start>: + a00c: f8df 4000 ldr\.w r4, \[pc\] ; a010 <_start\+0x4> +#------------------------------------------------------------------------------ +#------ PC-relative offset of foo +#------------------------------------------------------------------------------ + a010: 00005ff0 \.word 0x00005ff0 + a014: f8df 4000 ldr\.w r4, \[pc\] ; a018 <_start\+0xc> +#------------------------------------------------------------------------------ +#------ PC-relative offset of f1's .iplt entry +#------------------------------------------------------------------------------ + a018: fffff014 \.word 0xfffff014 + a01c: f8df 4000 ldr\.w r4, \[pc\] ; a020 <_start\+0x14> +#------------------------------------------------------------------------------ +#------ PC-relative offset of f2's .plt entry +#------------------------------------------------------------------------------ + a020: fffff000 \.word 0xfffff000 + a024: f8df 4000 ldr\.w r4, \[pc\] ; a028 <_start\+0x1c> +#------------------------------------------------------------------------------ +#------ PC-relative offset of f3 +#------------------------------------------------------------------------------ + a028: fffff01c \.word 0xfffff01c + a02c: f8df 4000 ldr\.w r4, \[pc\] ; a030 <_start\+0x24> +#------------------------------------------------------------------------------ +#------ PC-relative offset of f1t's .iplt entry +#------------------------------------------------------------------------------ + a030: fffff008 \.word 0xfffff008 + a034: f8df 4000 ldr\.w r4, \[pc\] ; a038 <_start\+0x2c> +#------------------------------------------------------------------------------ +#------ PC-relative offset of f2t's .plt entry +#------------------------------------------------------------------------------ + a038: ffffefdc \.word 0xffffefdc + a03c: f8df 4000 ldr\.w r4, \[pc\] ; a040 <_start\+0x34> +#------------------------------------------------------------------------------ +#------ PC-relative offset of f3t +#------------------------------------------------------------------------------ + a040: fffff010 \.word 0xfffff010 diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-14.gd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-14.gd new file mode 100644 index 0000000..c054e6b --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-14.gd @@ -0,0 +1,27 @@ + +.* + +Contents of section \.data: +#------------------------------------------------------------------------------ +#------ 00010000: foo +#------------------------------------------------------------------------------ + 10000 44332211 00800000 20800000 .* +Contents of section \.got: +#------------------------------------------------------------------------------ +#------ 00011000: .got.plt +#------ 00011004: reserved .got.plt entry +#------ 00011008: reserved .got.plt entry +#------ 0001100c: f2t's .got.plt entry [R_ARM_JUMP_SLOT] +#------------------------------------------------------------------------------ + 11000 00200100 00000000 00000000 00900000 .* +#------------------------------------------------------------------------------ +#------ 00011010: f2's .got.plt entry [R_ARM_JUMP_SLOT] +#------ 00011014: f1's .igot.plt entry [R_ARM_IRELATIVE] +#------ 00011018: f1t's .igot.plt entry [R_ARM_IRELATIVE] +#------ 0001101c: f3's .igot.plt pointer to 0xa004 [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 11010 00900000 00a00000 09a00000 04a00000 .* +#------------------------------------------------------------------------------ +#------ 00011020: f3t's .igot.plt pointer to 0xa00b [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 11020 0ba00000 .* diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-14.rd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-14.rd new file mode 100644 index 0000000..59ea29b --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-14.rd @@ -0,0 +1,12 @@ + +Relocation section '\.rel\.dyn' at offset 0x8000 contains 4 entries: + Offset Info Type Sym\.Value Sym\. Name +00011014 ......a0 R_ARM_IRELATIVE +00011018 ......a0 R_ARM_IRELATIVE +0001101c ......a0 R_ARM_IRELATIVE +00011020 ......a0 R_ARM_IRELATIVE + +Relocation section '\.rel\.plt' at offset 0x8020 contains 2 entries: + Offset Info Type Sym\.Value Sym\. Name +0001100c ......16 R_ARM_JUMP_SLOT 00009014 f2t +00011010 ......16 R_ARM_JUMP_SLOT 00009020 f2 diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-14.s b/binutils-2.24/ld/testsuite/ld-arm/ifunc-14.s new file mode 100644 index 0000000..8a166af --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-14.s @@ -0,0 +1,47 @@ + .syntax unified + .arch armv6t2 + + .macro define,name,type + .type \name,%gnu_indirect_function + \type +\name: + mov pc,lr + .size \name,.-\name + .endm + + .macro test_relocs,name + ldr r4,1f +1: + .word \name - . + .endm + + .global f2 + .global f2t + + .global f3 + .hidden f3 + .global f3t + .hidden f3t + + define f1,.arm + define f3,.arm + + define f1t,.thumb_func + define f3t,.thumb_func + + .globl _start +_start: + test_relocs foo + test_relocs f1 + test_relocs f2 + test_relocs f3 + test_relocs f1t + test_relocs f2t + test_relocs f3t + .size _start,.-_start + + .data +foo: + .word 0x11223344 + .word __irel_start + .word __irel_end diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-15.dd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-15.dd new file mode 100644 index 0000000..d764841 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-15.dd @@ -0,0 +1,100 @@ + +.* + + +Disassembly of section \.plt: + +00009000 <\.plt>: + 9000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) + 9004: e59fe004 ldr lr, \[pc, #4\] ; 9010 <__irel_end\+0xff0> + 9008: e08fe00e add lr, pc, lr + 900c: e5bef008 ldr pc, \[lr, #8\]! +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got.plt +#------------------------------------------------------------------------------ + 9010: 00007ff0 \.word 0x00007ff0 +#------------------------------------------------------------------------------ +#------ f2t's .plt entry +#------------------------------------------------------------------------------ + 9014: e28fc600 add ip, pc, #0, 12 + 9018: e28cca07 add ip, ip, #28672 ; 0x7000 + 901c: e5bcfff0 ldr pc, \[ip, #4080\]! ; 0xff0 +#------------------------------------------------------------------------------ +#------ f2's .plt entry +#------------------------------------------------------------------------------ + 9020: e28fc600 add ip, pc, #0, 12 + 9024: e28cca07 add ip, ip, #28672 ; 0x7000 + 9028: e5bcffe8 ldr pc, \[ip, #4072\]! ; 0xfe8 + +Disassembly of section \.iplt: + +0000902c <f3-0x18>: +#------------------------------------------------------------------------------ +#------ f1's .iplt entry +#------------------------------------------------------------------------------ + 902c: e28fc600 add ip, pc, #0, 12 + 9030: e28cca07 add ip, ip, #28672 ; 0x7000 + 9034: e5bcffe0 ldr pc, \[ip, #4064\]! ; 0xfe0 +#------------------------------------------------------------------------------ +#------ f1t's .iplt entry +#------------------------------------------------------------------------------ + 9038: e28fc600 add ip, pc, #0, 12 + 903c: e28cca07 add ip, ip, #28672 ; 0x7000 + 9040: e5bcffd8 ldr pc, \[ip, #4056\]! ; 0xfd8 + +00009044 <f3>: + 9044: e28fc600 add ip, pc, #0, 12 + 9048: e28cca07 add ip, ip, #28672 ; 0x7000 + 904c: e5bcffd0 ldr pc, \[ip, #4048\]! ; 0xfd0 + +00009050 <f3t>: + 9050: e28fc600 add ip, pc, #0, 12 + 9054: e28cca07 add ip, ip, #28672 ; 0x7000 + 9058: e5bcffc8 ldr pc, \[ip, #4040\]! ; 0xfc8 + +Disassembly of section \.text: + +0000a000 <f1>: + a000: e1a0f00e mov pc, lr + a004: e1a0f00e mov pc, lr + +0000a008 <f1t>: + a008: 46f7 mov pc, lr + a00a: 46f7 mov pc, lr + +0000a00c <_start>: + a00c: f8df 4000 ldr\.w r4, \[pc\] ; a010 <_start\+0x4> +#------------------------------------------------------------------------------ +#------ foo +#------------------------------------------------------------------------------ + a010: 00010000 \.word 0x00010000 + a014: f8df 4000 ldr\.w r4, \[pc\] ; a018 <_start\+0xc> +#------------------------------------------------------------------------------ +#------ f1's .iplt entry +#------------------------------------------------------------------------------ + a018: 0000902c \.word 0x0000902c + a01c: f8df 4000 ldr\.w r4, \[pc\] ; a020 <_start\+0x14> +#------------------------------------------------------------------------------ +#------ f2's .plt entry +#------------------------------------------------------------------------------ + a020: 00009020 \.word 0x00009020 + a024: f8df 4000 ldr\.w r4, \[pc\] ; a028 <_start\+0x1c> +#------------------------------------------------------------------------------ +#------ f3 +#------------------------------------------------------------------------------ + a028: 00009044 \.word 0x00009044 + a02c: f8df 4000 ldr\.w r4, \[pc\] ; a030 <_start\+0x24> +#------------------------------------------------------------------------------ +#------ f1t's .iplt entry +#------------------------------------------------------------------------------ + a030: 00009038 \.word 0x00009038 + a034: f8df 4000 ldr\.w r4, \[pc\] ; a038 <_start\+0x2c> +#------------------------------------------------------------------------------ +#------ f2t's .plt entry +#------------------------------------------------------------------------------ + a038: 00009014 \.word 0x00009014 + a03c: f8df 4000 ldr\.w r4, \[pc\] ; a040 <_start\+0x34> +#------------------------------------------------------------------------------ +#------ f3t +#------------------------------------------------------------------------------ + a040: 00009050 \.word 0x00009050 diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-15.gd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-15.gd new file mode 100644 index 0000000..c054e6b --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-15.gd @@ -0,0 +1,27 @@ + +.* + +Contents of section \.data: +#------------------------------------------------------------------------------ +#------ 00010000: foo +#------------------------------------------------------------------------------ + 10000 44332211 00800000 20800000 .* +Contents of section \.got: +#------------------------------------------------------------------------------ +#------ 00011000: .got.plt +#------ 00011004: reserved .got.plt entry +#------ 00011008: reserved .got.plt entry +#------ 0001100c: f2t's .got.plt entry [R_ARM_JUMP_SLOT] +#------------------------------------------------------------------------------ + 11000 00200100 00000000 00000000 00900000 .* +#------------------------------------------------------------------------------ +#------ 00011010: f2's .got.plt entry [R_ARM_JUMP_SLOT] +#------ 00011014: f1's .igot.plt entry [R_ARM_IRELATIVE] +#------ 00011018: f1t's .igot.plt entry [R_ARM_IRELATIVE] +#------ 0001101c: f3's .igot.plt pointer to 0xa004 [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 11010 00900000 00a00000 09a00000 04a00000 .* +#------------------------------------------------------------------------------ +#------ 00011020: f3t's .igot.plt pointer to 0xa00b [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 11020 0ba00000 .* diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-15.rd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-15.rd new file mode 100644 index 0000000..59ea29b --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-15.rd @@ -0,0 +1,12 @@ + +Relocation section '\.rel\.dyn' at offset 0x8000 contains 4 entries: + Offset Info Type Sym\.Value Sym\. Name +00011014 ......a0 R_ARM_IRELATIVE +00011018 ......a0 R_ARM_IRELATIVE +0001101c ......a0 R_ARM_IRELATIVE +00011020 ......a0 R_ARM_IRELATIVE + +Relocation section '\.rel\.plt' at offset 0x8020 contains 2 entries: + Offset Info Type Sym\.Value Sym\. Name +0001100c ......16 R_ARM_JUMP_SLOT 00009014 f2t +00011010 ......16 R_ARM_JUMP_SLOT 00009020 f2 diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-15.s b/binutils-2.24/ld/testsuite/ld-arm/ifunc-15.s new file mode 100644 index 0000000..91cb997 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-15.s @@ -0,0 +1,47 @@ + .syntax unified + .arch armv6t2 + + .macro define,name,type + .type \name,%gnu_indirect_function + \type +\name: + mov pc,lr + .size \name,.-\name + .endm + + .macro test_relocs,name + ldr r4,1f +1: + .word \name + .endm + + .global f2 + .global f2t + + .global f3 + .hidden f3 + .global f3t + .hidden f3t + + define f1,.arm + define f3,.arm + + define f1t,.thumb_func + define f3t,.thumb_func + + .globl _start +_start: + test_relocs foo + test_relocs f1 + test_relocs f2 + test_relocs f3 + test_relocs f1t + test_relocs f2t + test_relocs f3t + .size _start,.-_start + + .data +foo: + .word 0x11223344 + .word __irel_start + .word __irel_end diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-16.dd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-16.dd new file mode 100644 index 0000000..16c2a97 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-16.dd @@ -0,0 +1,88 @@ + +.* + + +Disassembly of section \.iplt: + +00009000 <f2t-0x18>: +#------------------------------------------------------------------------------ +#------ f1's .iplt entry +#------------------------------------------------------------------------------ + 9000: e28fc600 add ip, pc, #0, 12 + 9004: e28cca08 add ip, ip, #8, 20 ; 0x8000 + 9008: e5bcf004 ldr pc, \[ip, #4\]! +#------------------------------------------------------------------------------ +#------ f1t's .iplt entry +#------------------------------------------------------------------------------ + 900c: e28fc600 add ip, pc, #0, 12 + 9010: e28cca07 add ip, ip, #28672 ; 0x7000 + 9014: e5bcfffc ldr pc, \[ip, #4092\]! ; 0xffc + +00009018 <f2t>: + 9018: e28fc600 add ip, pc, #0, 12 + 901c: e28cca07 add ip, ip, #28672 ; 0x7000 + 9020: e5bcfff4 ldr pc, \[ip, #4084\]! ; 0xff4 + +00009024 <f3>: + 9024: e28fc600 add ip, pc, #0, 12 + 9028: e28cca07 add ip, ip, #28672 ; 0x7000 + 902c: e5bcffec ldr pc, \[ip, #4076\]! ; 0xfec + +00009030 <f2>: + 9030: e28fc600 add ip, pc, #0, 12 + 9034: e28cca07 add ip, ip, #28672 ; 0x7000 + 9038: e5bcffe4 ldr pc, \[ip, #4068\]! ; 0xfe4 + +0000903c <f3t>: + 903c: e28fc600 add ip, pc, #0, 12 + 9040: e28cca07 add ip, ip, #28672 ; 0x7000 + 9044: e5bcffdc ldr pc, \[ip, #4060\]! ; 0xfdc + +Disassembly of section \.text: + +0000a000 <f1>: + a000: e1a0f00e mov pc, lr + a004: e1a0f00e mov pc, lr + a008: e1a0f00e mov pc, lr + +0000a00c <f1t>: + a00c: 46f7 mov pc, lr + a00e: 46f7 mov pc, lr + a010: 46f7 mov pc, lr + +0000a012 <_start>: + a012: 4c00 ldr r4, \[pc, #0\] ; \(a014 <_start\+0x2>\) +#------------------------------------------------------------------------------ +#------ foo +#------------------------------------------------------------------------------ + a014: 00010000 \.word 0x00010000 + a018: f8df 4000 ldr\.w r4, \[pc\] ; a01c <_start\+0xa> +#------------------------------------------------------------------------------ +#------ f1's .iplt entry +#------------------------------------------------------------------------------ + a01c: 00009000 \.word 0x00009000 + a020: f8df 4000 ldr\.w r4, \[pc\] ; a024 <_start\+0x12> +#------------------------------------------------------------------------------ +#------ f2 +#------------------------------------------------------------------------------ + a024: 00009030 \.word 0x00009030 + a028: f8df 4000 ldr\.w r4, \[pc\] ; a02c <_start\+0x1a> +#------------------------------------------------------------------------------ +#------ f3 +#------------------------------------------------------------------------------ + a02c: 00009024 \.word 0x00009024 + a030: f8df 4000 ldr\.w r4, \[pc\] ; a034 <_start\+0x22> +#------------------------------------------------------------------------------ +#------ f1t's .iplt entry +#------------------------------------------------------------------------------ + a034: 0000900c \.word 0x0000900c + a038: f8df 4000 ldr\.w r4, \[pc\] ; a03c <_start\+0x2a> +#------------------------------------------------------------------------------ +#------ f2t +#------------------------------------------------------------------------------ + a03c: 00009018 \.word 0x00009018 + a040: f8df 4000 ldr\.w r4, \[pc\] ; a044 <_start\+0x32> +#------------------------------------------------------------------------------ +#------ f3t +#------------------------------------------------------------------------------ + a044: 0000903c \.word 0x0000903c diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-16.gd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-16.gd new file mode 100644 index 0000000..7c4e820 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-16.gd @@ -0,0 +1,27 @@ + +.* + +Contents of section \.data: +#------------------------------------------------------------------------------ +#------ 00010000: foo +#------------------------------------------------------------------------------ + 10000 44332211 00800000 30800000 .* +Contents of section \.got: +#------------------------------------------------------------------------------ +#------ 00011000: .got.plt +#------ 00011004: reserved .got.plt entry +#------ 00011008: reserved .got.plt entry +#------ 0001100c: f1's .igot.plt entry [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 11000 00200100 00000000 00000000 00a00000 .* +#------------------------------------------------------------------------------ +#------ 00011010: f1t's .igot.plt entry [R_ARM_IRELATIVE] +#------ 00011014: f2t's .igot.plt pointer to 0xa00f [R_ARM_IRELATIVE] +#------ 00011018: f3's .igot.plt pointer to 0xa008 [R_ARM_IRELATIVE] +#------ 0001101c: f2's .igot.plt pointer to 0xa004 [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 11010 0da00000 0fa00000 08a00000 04a00000 .* +#------------------------------------------------------------------------------ +#------ 00011020: f3t's .igot.plt pointer to 0xa011 [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 11020 11a00000 .* diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-16.rd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-16.rd new file mode 100644 index 0000000..7296316 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-16.rd @@ -0,0 +1,9 @@ + +Relocation section '\.rel\.dyn' at offset 0x8000 contains 6 entries: + Offset Info Type Sym\.Value Sym\. Name +0001100c ......a0 R_ARM_IRELATIVE +00011010 ......a0 R_ARM_IRELATIVE +00011014 ......a0 R_ARM_IRELATIVE +00011018 ......a0 R_ARM_IRELATIVE +0001101c ......a0 R_ARM_IRELATIVE +00011020 ......a0 R_ARM_IRELATIVE diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-16.s b/binutils-2.24/ld/testsuite/ld-arm/ifunc-16.s new file mode 100644 index 0000000..80fe282 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-16.s @@ -0,0 +1,49 @@ + .syntax unified + .arch armv6t2 + + .macro define,name,type + .type \name,%gnu_indirect_function + \type +\name: + mov pc,lr + .size \name,.-\name + .endm + + .macro test_relocs,name + ldr r4,1f +1: + .word \name + .endm + + .global f2 + .global f2t + + .global f3 + .hidden f3 + .global f3t + .hidden f3t + + define f1,.arm + define f2,.arm + define f3,.arm + + define f1t,.thumb_func + define f2t,.thumb_func + define f3t,.thumb_func + + .globl _start +_start: + test_relocs foo + test_relocs f1 + test_relocs f2 + test_relocs f3 + test_relocs f1t + test_relocs f2t + test_relocs f3t + .size _start,.-_start + + .data +foo: + .word 0x11223344 + .word __irel_start + .word __irel_end diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-17.dd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-17.dd new file mode 100644 index 0000000..ee5cd05 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-17.dd @@ -0,0 +1,25 @@ + +.* + + +Disassembly of section \.iplt: + +00009000 <.iplt>: +#------------------------------------------------------------------------------ +#------ appfunc1's .iplt entry +#------------------------------------------------------------------------------ + 9000: e28fc600 add ip, pc, #0, 12 + 9004: e28cca08 add ip, ip, #8, 20 ; 0x8000 + 9008: e5bcf004 ldr pc, \[ip, #4\]! + +Disassembly of section \.text: + +0000a000 <appfunc1>: + a000: 46f7 mov pc, lr + +0000a002 <appfunc2>: + a002: 46f7 mov pc, lr + +0000a004 <_start>: + a004: f7fe effc blx 9000 <appfunc1-0x1000> + a008: 00000010 \.word 0x00000010 diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-17.gd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-17.gd new file mode 100644 index 0000000..dadfc9e --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-17.gd @@ -0,0 +1,10 @@ + +.* + +Contents of section \.got: +#------------------------------------------------------------------------------ +#------ 0001100c: 0xa001 (appfunc1) +#------ 00011010: 0xa003 (appfunc2) +#------------------------------------------------------------------------------ + 11000 00000000 00000000 00000000 01a00000 .* + 11010 03a00000 .* diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-17.rd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-17.rd new file mode 100644 index 0000000..b167f45 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-17.rd @@ -0,0 +1,5 @@ + +Relocation section '\.rel\.dyn' at offset 0x8000 contains 2 entries: + Offset Info Type Sym\.Value Sym\. Name +0001100c ......a0 R_ARM_IRELATIVE +00011010 ......a0 R_ARM_IRELATIVE diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-17.s b/binutils-2.24/ld/testsuite/ld-arm/ifunc-17.s new file mode 100644 index 0000000..75c4c56 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-17.s @@ -0,0 +1,24 @@ + .syntax unified + .arch armv6t2 + + .global appfunc1 + .type appfunc1,%gnu_indirect_function + .thumb +appfunc1: + mov pc,lr + .size appfunc1,.-appfunc1 + + .global appfunc2 + .type appfunc2,%gnu_indirect_function + .thumb +appfunc2: + mov pc,lr + .size appfunc2,.-appfunc2 + + .global _start + .type _start,%function + .thumb +_start: + bl appfunc1(PLT) + .word appfunc2(GOT) + .size _start,.-_start diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-2.dd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-2.dd new file mode 100644 index 0000000..f6d57fa --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-2.dd @@ -0,0 +1,445 @@ + +.* + + +Disassembly of section \.iplt: + +00009000 <f7-0x3c>: +#------------------------------------------------------------------------------ +#------ f1's .iplt entry +#------------------------------------------------------------------------------ + 9000: e28fc600 add ip, pc, #0, 12 + 9004: e28cca08 add ip, ip, #8, 20 ; 0x8000 + 9008: e5bcf004 ldr pc, \[ip, #4\]! +#------------------------------------------------------------------------------ +#------ f2's .iplt entry +#------------------------------------------------------------------------------ + 900c: e28fc600 add ip, pc, #0, 12 + 9010: e28cca07 add ip, ip, #28672 ; 0x7000 + 9014: e5bcfffc ldr pc, \[ip, #4092\]! ; 0xffc +#------------------------------------------------------------------------------ +#------ thumb entry to f3's .iplt entry +#------------------------------------------------------------------------------ + 9018: 4778 bx pc + 901a: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ f3's .iplt entry +#------------------------------------------------------------------------------ + 901c: e28fc600 add ip, pc, #0, 12 + 9020: e28cca07 add ip, ip, #28672 ; 0x7000 + 9024: e5bcfff0 ldr pc, \[ip, #4080\]! ; 0xff0 +#------------------------------------------------------------------------------ +#------ thumb entry to f4's .iplt entry +#------------------------------------------------------------------------------ + 9028: 4778 bx pc + 902a: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ f4's .iplt entry +#------------------------------------------------------------------------------ + 902c: e28fc600 add ip, pc, #0, 12 + 9030: e28cca07 add ip, ip, #28672 ; 0x7000 + 9034: e5bcffe4 ldr pc, \[ip, #4068\]! ; 0xfe4 +#------------------------------------------------------------------------------ +#------ thumb entry to f7 +#------------------------------------------------------------------------------ + 9038: 4778 bx pc + 903a: 46c0 nop ; \(mov r8, r8\) + +0000903c <f7>: + 903c: e28fc600 add ip, pc, #0, 12 + 9040: e28cca07 add ip, ip, #28672 ; 0x7000 + 9044: e5bcffd8 ldr pc, \[ip, #4056\]! ; 0xfd8 + +00009048 <f5>: + 9048: e28fc600 add ip, pc, #0, 12 + 904c: e28cca07 add ip, ip, #28672 ; 0x7000 + 9050: e5bcffd0 ldr pc, \[ip, #4048\]! ; 0xfd0 +#------------------------------------------------------------------------------ +#------ thumb entry to f8 +#------------------------------------------------------------------------------ + 9054: 4778 bx pc + 9056: 46c0 nop ; \(mov r8, r8\) + +00009058 <f8>: + 9058: e28fc600 add ip, pc, #0, 12 + 905c: e28cca07 add ip, ip, #28672 ; 0x7000 + 9060: e5bcffc4 ldr pc, \[ip, #4036\]! ; 0xfc4 + +00009064 <f6>: + 9064: e28fc600 add ip, pc, #0, 12 + 9068: e28cca07 add ip, ip, #28672 ; 0x7000 + 906c: e5bcffbc ldr pc, \[ip, #4028\]! ; 0xfbc + +Disassembly of section \.text: + +0000a000 <f1>: + a000: e1a0f00e mov pc, lr + +0000a004 <f2>: + a004: 46f7 mov pc, lr + \.\.\. + +0000a008 <f3>: + a008: e1a0f00e mov pc, lr + +0000a00c <f4>: + a00c: 46f7 mov pc, lr + a00e: 0000 movs r0, r0 + a010: e1a0f00e mov pc, lr + a014: 46f7 mov pc, lr + a016: 0000 movs r0, r0 + a018: e1a0f00e mov pc, lr + a01c: 46f7 mov pc, lr + \.\.\. + +0000a020 <_start>: + a020: eb0017f6 bl 10000 <foo> + a024: ea0017f5 b 10000 <foo> + a028: 0a0017f4 beq 10000 <foo> + a02c: e59f4014 ldr r4, \[pc, #20\] ; a048 <_start\+0x28> + a030: e59f4014 ldr r4, \[pc, #20\] ; a04c <_start\+0x2c> + a034: e59f4014 ldr r4, \[pc, #20\] ; a050 <_start\+0x30> + a038: e59f4014 ldr r4, \[pc, #20\] ; a054 <_start\+0x34> + a03c: e59f5014 ldr r5, \[pc, #20\] ; a058 <_start\+0x38> + a040: e3004000 movw r4, #0 + a044: e3404001 movt r4, #1 +#------------------------------------------------------------------------------ +#------ foo +#------------------------------------------------------------------------------ + a048: 00010000 \.word 0x00010000 +#------------------------------------------------------------------------------ +#------ PC-relative offset of foo +#------------------------------------------------------------------------------ + a04c: 00005fb4 \.word 0x00005fb4 +#------------------------------------------------------------------------------ +#------ GP-relative offset of foo +#------------------------------------------------------------------------------ + a050: fffff000 \.word 0xfffff000 +#------------------------------------------------------------------------------ +#------ .got offset for foo +#------------------------------------------------------------------------------ + a054: 00000040 \.word 0x00000040 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for foo +#------------------------------------------------------------------------------ + a058: 00006fd4 \.word 0x00006fd4 +#------------------------------------------------------------------------------ +#------ f1's .iplt entry +#------------------------------------------------------------------------------ + a05c: ebfffbe7 bl 9000 <f7-0x3c> +#------------------------------------------------------------------------------ +#------ f1's .iplt entry +#------------------------------------------------------------------------------ + a060: eafffbe6 b 9000 <f7-0x3c> +#------------------------------------------------------------------------------ +#------ f1's .iplt entry +#------------------------------------------------------------------------------ + a064: 0afffbe5 beq 9000 <f7-0x3c> + a068: e59f4014 ldr r4, \[pc, #20\] ; a084 <_start\+0x64> + a06c: e59f4014 ldr r4, \[pc, #20\] ; a088 <_start\+0x68> + a070: e59f4014 ldr r4, \[pc, #20\] ; a08c <_start\+0x6c> + a074: e59f4014 ldr r4, \[pc, #20\] ; a090 <_start\+0x70> + a078: e59f5014 ldr r5, \[pc, #20\] ; a094 <_start\+0x74> + a07c: e3094000 movw r4, #36864 ; 0x9000 + a080: e3404000 movt r4, #0 +#------------------------------------------------------------------------------ +#------ f1's .iplt entry +#------------------------------------------------------------------------------ + a084: 00009000 \.word 0x00009000 +#------------------------------------------------------------------------------ +#------ PC-relative offset of f1's .iplt entry +#------------------------------------------------------------------------------ + a088: ffffef78 \.word 0xffffef78 +#------------------------------------------------------------------------------ +#------ GP-relative offset of f1's .iplt entry +#------------------------------------------------------------------------------ + a08c: ffff8000 \.word 0xffff8000 +#------------------------------------------------------------------------------ +#------ .got offset for f1's .iplt entry +#------------------------------------------------------------------------------ + a090: 00000030 \.word 0x00000030 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for f1's .iplt entry +#------------------------------------------------------------------------------ + a094: 00006f9c \.word 0x00006f9c +#------------------------------------------------------------------------------ +#------ f2's .iplt entry +#------------------------------------------------------------------------------ + a098: ebfffbdb bl 900c <f7-0x30> +#------------------------------------------------------------------------------ +#------ f2's .iplt entry +#------------------------------------------------------------------------------ + a09c: eafffbda b 900c <f7-0x30> +#------------------------------------------------------------------------------ +#------ f2's .iplt entry +#------------------------------------------------------------------------------ + a0a0: 0afffbd9 beq 900c <f7-0x30> + a0a4: e59f4014 ldr r4, \[pc, #20\] ; a0c0 <_start\+0xa0> + a0a8: e59f4014 ldr r4, \[pc, #20\] ; a0c4 <_start\+0xa4> + a0ac: e59f4014 ldr r4, \[pc, #20\] ; a0c8 <_start\+0xa8> + a0b0: e59f4014 ldr r4, \[pc, #20\] ; a0cc <_start\+0xac> + a0b4: e59f5014 ldr r5, \[pc, #20\] ; a0d0 <_start\+0xb0> + a0b8: e309400c movw r4, #36876 ; 0x900c + a0bc: e3404000 movt r4, #0 +#------------------------------------------------------------------------------ +#------ f2's .iplt entry +#------------------------------------------------------------------------------ + a0c0: 0000900c \.word 0x0000900c +#------------------------------------------------------------------------------ +#------ PC-relative offset of f2's .iplt entry +#------------------------------------------------------------------------------ + a0c4: ffffef48 \.word 0xffffef48 +#------------------------------------------------------------------------------ +#------ GP-relative offset of f2's .iplt entry +#------------------------------------------------------------------------------ + a0c8: ffff800c \.word 0xffff800c +#------------------------------------------------------------------------------ +#------ .got offset for f2's .iplt entry +#------------------------------------------------------------------------------ + a0cc: 00000034 \.word 0x00000034 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for f2's .iplt entry +#------------------------------------------------------------------------------ + a0d0: 00006f64 \.word 0x00006f64 + a0d4: ebfffbdb bl 9048 <f5> + a0d8: eafffbda b 9048 <f5> + a0dc: 0afffbd9 beq 9048 <f5> + a0e0: e59f4014 ldr r4, \[pc, #20\] ; a0fc <_start\+0xdc> + a0e4: e59f4014 ldr r4, \[pc, #20\] ; a100 <_start\+0xe0> + a0e8: e59f4014 ldr r4, \[pc, #20\] ; a104 <_start\+0xe4> + a0ec: e59f4014 ldr r4, \[pc, #20\] ; a108 <_start\+0xe8> + a0f0: e59f5014 ldr r5, \[pc, #20\] ; a10c <_start\+0xec> + a0f4: e3094048 movw r4, #36936 ; 0x9048 + a0f8: e3404000 movt r4, #0 +#------------------------------------------------------------------------------ +#------ f5 +#------------------------------------------------------------------------------ + a0fc: 00009048 \.word 0x00009048 +#------------------------------------------------------------------------------ +#------ PC-relative offset of f5 +#------------------------------------------------------------------------------ + a100: ffffef48 \.word 0xffffef48 +#------------------------------------------------------------------------------ +#------ GP-relative offset of f5 +#------------------------------------------------------------------------------ + a104: ffff8048 \.word 0xffff8048 +#------------------------------------------------------------------------------ +#------ .got offset for f5 +#------------------------------------------------------------------------------ + a108: 00000048 \.word 0x00000048 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for f5 +#------------------------------------------------------------------------------ + a10c: 00006f3c \.word 0x00006f3c + a110: ebfffbd3 bl 9064 <f6> + a114: eafffbd2 b 9064 <f6> + a118: 0afffbd1 beq 9064 <f6> + a11c: e59f4014 ldr r4, \[pc, #20\] ; a138 <_start\+0x118> + a120: e59f4014 ldr r4, \[pc, #20\] ; a13c <_start\+0x11c> + a124: e59f4014 ldr r4, \[pc, #20\] ; a140 <_start\+0x120> + a128: e59f4014 ldr r4, \[pc, #20\] ; a144 <_start\+0x124> + a12c: e59f5014 ldr r5, \[pc, #20\] ; a148 <_start\+0x128> + a130: e3094064 movw r4, #36964 ; 0x9064 + a134: e3404000 movt r4, #0 +#------------------------------------------------------------------------------ +#------ f6 +#------------------------------------------------------------------------------ + a138: 00009064 \.word 0x00009064 +#------------------------------------------------------------------------------ +#------ PC-relative offset of f6 +#------------------------------------------------------------------------------ + a13c: ffffef28 \.word 0xffffef28 +#------------------------------------------------------------------------------ +#------ GP-relative offset of f6 +#------------------------------------------------------------------------------ + a140: ffff8064 \.word 0xffff8064 +#------------------------------------------------------------------------------ +#------ .got offset for f6 +#------------------------------------------------------------------------------ + a144: 00000050 \.word 0x00000050 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for f6 +#------------------------------------------------------------------------------ + a148: 00006f08 \.word 0x00006f08 + +0000a14c <_thumb>: + a14c: f005 ff58 bl 10000 <foo> + a150: f005 bf56 b\.w 10000 <foo> + a154: f005 8754 beq\.w 10000 <foo> + a158: 4c04 ldr r4, \[pc, #16\] ; \(a16c <_thumb\+0x20>\) + a15a: f8df 4014 ldr\.w r4, \[pc, #20\] ; a170 <_thumb\+0x24> + a15e: 4c05 ldr r4, \[pc, #20\] ; \(a174 <_thumb\+0x28>\) + a160: 4c05 ldr r4, \[pc, #20\] ; \(a178 <_thumb\+0x2c>\) + a162: 4d06 ldr r5, \[pc, #24\] ; \(a17c <_thumb\+0x30>\) + a164: f240 0400 movw r4, #0 + a168: f2c0 0401 movt r4, #1 +#------------------------------------------------------------------------------ +#------ foo +#------------------------------------------------------------------------------ + a16c: 00010000 \.word 0x00010000 +#------------------------------------------------------------------------------ +#------ PC-relative offset of foo +#------------------------------------------------------------------------------ + a170: 00005e90 \.word 0x00005e90 +#------------------------------------------------------------------------------ +#------ GP-relative offset of foo +#------------------------------------------------------------------------------ + a174: fffff000 \.word 0xfffff000 +#------------------------------------------------------------------------------ +#------ .got offset for foo +#------------------------------------------------------------------------------ + a178: 00000040 \.word 0x00000040 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for foo +#------------------------------------------------------------------------------ + a17c: 00006eb0 \.word 0x00006eb0 +#------------------------------------------------------------------------------ +#------ f3's .iplt entry +#------------------------------------------------------------------------------ + a180: f7fe ef4c blx 901c <f7-0x20> +#------------------------------------------------------------------------------ +#------ thumb entry to f3's .iplt entry +#------------------------------------------------------------------------------ + a184: f7fe bf48 b\.w 9018 <f7-0x24> +#------------------------------------------------------------------------------ +#------ thumb entry to f3's .iplt entry +#------------------------------------------------------------------------------ + a188: f43e af46 beq\.w 9018 <f7-0x24> + a18c: 4c04 ldr r4, \[pc, #16\] ; \(a1a0 <_thumb\+0x54>\) + a18e: f8df 4014 ldr\.w r4, \[pc, #20\] ; a1a4 <_thumb\+0x58> + a192: 4c05 ldr r4, \[pc, #20\] ; \(a1a8 <_thumb\+0x5c>\) + a194: 4c05 ldr r4, \[pc, #20\] ; \(a1ac <_thumb\+0x60>\) + a196: 4d06 ldr r5, \[pc, #24\] ; \(a1b0 <_thumb\+0x64>\) + a198: f249 041c movw r4, #36892 ; 0x901c + a19c: f2c0 0400 movt r4, #0 +#------------------------------------------------------------------------------ +#------ f3's .iplt entry +#------------------------------------------------------------------------------ + a1a0: 0000901c \.word 0x0000901c +#------------------------------------------------------------------------------ +#------ PC-relative offset of f3's .iplt entry +#------------------------------------------------------------------------------ + a1a4: ffffee78 \.word 0xffffee78 +#------------------------------------------------------------------------------ +#------ GP-relative offset of f3's .iplt entry +#------------------------------------------------------------------------------ + a1a8: ffff801c \.word 0xffff801c +#------------------------------------------------------------------------------ +#------ .got offset for f3's .iplt entry +#------------------------------------------------------------------------------ + a1ac: 00000038 \.word 0x00000038 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for f3's .iplt entry +#------------------------------------------------------------------------------ + a1b0: 00006e88 \.word 0x00006e88 +#------------------------------------------------------------------------------ +#------ f4's .iplt entry +#------------------------------------------------------------------------------ + a1b4: f7fe ef3a blx 902c <f7-0x10> +#------------------------------------------------------------------------------ +#------ thumb entry to f4's .iplt entry +#------------------------------------------------------------------------------ + a1b8: f7fe bf36 b\.w 9028 <f7-0x14> +#------------------------------------------------------------------------------ +#------ thumb entry to f4's .iplt entry +#------------------------------------------------------------------------------ + a1bc: f43e af34 beq\.w 9028 <f7-0x14> + a1c0: 4c04 ldr r4, \[pc, #16\] ; \(a1d4 <_thumb\+0x88>\) + a1c2: f8df 4014 ldr\.w r4, \[pc, #20\] ; a1d8 <_thumb\+0x8c> + a1c6: 4c05 ldr r4, \[pc, #20\] ; \(a1dc <_thumb\+0x90>\) + a1c8: 4c05 ldr r4, \[pc, #20\] ; \(a1e0 <_thumb\+0x94>\) + a1ca: 4d06 ldr r5, \[pc, #24\] ; \(a1e4 <_thumb\+0x98>\) + a1cc: f249 042c movw r4, #36908 ; 0x902c + a1d0: f2c0 0400 movt r4, #0 +#------------------------------------------------------------------------------ +#------ f4's .iplt entry +#------------------------------------------------------------------------------ + a1d4: 0000902c \.word 0x0000902c +#------------------------------------------------------------------------------ +#------ PC-relative offset of f4's .iplt entry +#------------------------------------------------------------------------------ + a1d8: ffffee54 \.word 0xffffee54 +#------------------------------------------------------------------------------ +#------ GP-relative offset of f4's .iplt entry +#------------------------------------------------------------------------------ + a1dc: ffff802c \.word 0xffff802c +#------------------------------------------------------------------------------ +#------ .got offset for f4's .iplt entry +#------------------------------------------------------------------------------ + a1e0: 0000003c \.word 0x0000003c +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for f4's .iplt entry +#------------------------------------------------------------------------------ + a1e4: 00006e58 \.word 0x00006e58 + a1e8: f7fe ef28 blx 903c <f7> +#------------------------------------------------------------------------------ +#------ thumb entry to f7 +#------------------------------------------------------------------------------ + a1ec: f7fe bf24 b\.w 9038 <f7-0x4> +#------------------------------------------------------------------------------ +#------ thumb entry to f7 +#------------------------------------------------------------------------------ + a1f0: f43e af22 beq\.w 9038 <f7-0x4> + a1f4: 4c04 ldr r4, \[pc, #16\] ; \(a208 <_thumb\+0xbc>\) + a1f6: f8df 4014 ldr\.w r4, \[pc, #20\] ; a20c <_thumb\+0xc0> + a1fa: 4c05 ldr r4, \[pc, #20\] ; \(a210 <_thumb\+0xc4>\) + a1fc: 4c05 ldr r4, \[pc, #20\] ; \(a214 <_thumb\+0xc8>\) + a1fe: 4d06 ldr r5, \[pc, #24\] ; \(a218 <_thumb\+0xcc>\) + a200: f249 043c movw r4, #36924 ; 0x903c + a204: f2c0 0400 movt r4, #0 +#------------------------------------------------------------------------------ +#------ f7 +#------------------------------------------------------------------------------ + a208: 0000903c \.word 0x0000903c +#------------------------------------------------------------------------------ +#------ PC-relative offset of f7 +#------------------------------------------------------------------------------ + a20c: ffffee30 \.word 0xffffee30 +#------------------------------------------------------------------------------ +#------ GP-relative offset of f7 +#------------------------------------------------------------------------------ + a210: ffff803c \.word 0xffff803c +#------------------------------------------------------------------------------ +#------ .got offset for f7 +#------------------------------------------------------------------------------ + a214: 00000044 \.word 0x00000044 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for f7 +#------------------------------------------------------------------------------ + a218: 00006e2c \.word 0x00006e2c + a21c: f7fe ef1c blx 9058 <f8> +#------------------------------------------------------------------------------ +#------ thumb entry to f8 +#------------------------------------------------------------------------------ + a220: f7fe bf18 b\.w 9054 <f5\+0xc> +#------------------------------------------------------------------------------ +#------ thumb entry to f8 +#------------------------------------------------------------------------------ + a224: f43e af16 beq\.w 9054 <f5\+0xc> + a228: 4c04 ldr r4, \[pc, #16\] ; \(a23c <_thumb\+0xf0>\) + a22a: f8df 4014 ldr\.w r4, \[pc, #20\] ; a240 <_thumb\+0xf4> + a22e: 4c05 ldr r4, \[pc, #20\] ; \(a244 <_thumb\+0xf8>\) + a230: 4c05 ldr r4, \[pc, #20\] ; \(a248 <_thumb\+0xfc>\) + a232: 4d06 ldr r5, \[pc, #24\] ; \(a24c <_thumb\+0x100>\) + a234: f249 0458 movw r4, #36952 ; 0x9058 + a238: f2c0 0400 movt r4, #0 +#------------------------------------------------------------------------------ +#------ f8 +#------------------------------------------------------------------------------ + a23c: 00009058 \.word 0x00009058 +#------------------------------------------------------------------------------ +#------ PC-relative offset of f8 +#------------------------------------------------------------------------------ + a240: ffffee18 \.word 0xffffee18 +#------------------------------------------------------------------------------ +#------ GP-relative offset of f8 +#------------------------------------------------------------------------------ + a244: ffff8058 \.word 0xffff8058 +#------------------------------------------------------------------------------ +#------ .got offset for f8 +#------------------------------------------------------------------------------ + a248: 0000004c \.word 0x0000004c +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for f8 +#------------------------------------------------------------------------------ + a24c: 00006e00 \.word 0x00006e00 diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-2.gd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-2.gd new file mode 100644 index 0000000..0917a75 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-2.gd @@ -0,0 +1,48 @@ + +.* + +Contents of section \.data: +#------------------------------------------------------------------------------ +#------ 00010000: foo +#------------------------------------------------------------------------------ + 10000 44332211 .* +Contents of section \.got: +#------------------------------------------------------------------------------ +#------ 00011000: .got.plt +#------ 00011004: reserved .got.plt entry +#------ 00011008: reserved .got.plt entry +#------ 0001100c: f1's .igot.plt entry [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 11000 00000000 00000000 00000000 00a00000 .* +#------------------------------------------------------------------------------ +#------ 00011010: f2's .igot.plt entry [R_ARM_IRELATIVE] +#------ 00011014: f3's .igot.plt entry [R_ARM_IRELATIVE] +#------ 00011018: f4's .igot.plt entry [R_ARM_IRELATIVE] +#------ 0001101c: f7's .igot.plt pointer to 0xa018 [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 11010 05a00000 08a00000 0da00000 18a00000 .* +#------------------------------------------------------------------------------ +#------ 00011020: f5's .igot.plt pointer to 0xa010 [R_ARM_IRELATIVE] +#------ 00011024: f8's .igot.plt pointer to 0xa01d [R_ARM_IRELATIVE] +#------ 00011028: f6's .igot.plt pointer to 0xa015 [R_ARM_IRELATIVE] +#------ 0001102c: .got entry for foo +#------------------------------------------------------------------------------ + 11020 10a00000 1da00000 15a00000 00000100 .* +#------------------------------------------------------------------------------ +#------ 00011030: .got entry for f1's .iplt entry +#------ 00011034: .got entry for f2's .iplt entry +#------ 00011038: .got entry for f3's .iplt entry +#------ 0001103c: .got entry for f4's .iplt entry +#------------------------------------------------------------------------------ + 11030 00900000 0c900000 1c900000 2c900000 .* +#------------------------------------------------------------------------------ +#------ 00011040: .got entry for foo +#------ 00011044: .got entry for f7 +#------ 00011048: .got entry for f5 +#------ 0001104c: .got entry for f8 +#------------------------------------------------------------------------------ + 11040 00000100 3c900000 48900000 58900000 .* +#------------------------------------------------------------------------------ +#------ 00011050: .got entry for f6 +#------------------------------------------------------------------------------ + 11050 64900000 .* diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-2.rd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-2.rd new file mode 100644 index 0000000..7bbabf4 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-2.rd @@ -0,0 +1,13 @@ + +There is no dynamic section in this file\. + +Relocation section '\.rel\.dyn' at offset 0x8000 contains 8 entries: + Offset Info Type Sym\.Value Sym\. Name +0001100c ......a0 R_ARM_IRELATIVE +00011010 ......a0 R_ARM_IRELATIVE +00011020 ......a0 R_ARM_IRELATIVE +00011028 ......a0 R_ARM_IRELATIVE +00011014 ......a0 R_ARM_IRELATIVE +00011018 ......a0 R_ARM_IRELATIVE +0001101c ......a0 R_ARM_IRELATIVE +00011024 ......a0 R_ARM_IRELATIVE diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-2.s b/binutils-2.24/ld/testsuite/ld-arm/ifunc-2.s new file mode 100644 index 0000000..8834fbc --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-2.s @@ -0,0 +1,74 @@ + .syntax unified + .arch armv6t2 + + .macro define,name,type + .type \name,%gnu_indirect_function + \type +\name: + mov pc,lr + .size \name,.-\name + .endm + + .macro test_relocs,name,width + bl\width \name + b\width \name + beq\width \name + ldr r4,1f + ldr r4,2f + ldr r4,3f + ldr r4,4f + ldr r5,5f + movw r4,#:lower16:\name + movt r4,#:upper16:\name +1: + .word \name +2: + .word \name-. +3: + .word \name(GOTOFF) +4: + .word \name(GOT) +5: + .word \name(GOT_PREL) + .endm + + define f1,.arm + define f2,.thumb_func + define f3,.arm + define f4,.thumb_func + + .globl f5 + .globl f6 + .globl f7 + .globl f8 + + define f5,.arm + define f6,.thumb_func + define f7,.arm + define f8,.thumb_func + + .globl _start + .type _start,%function + .arm +_start: + test_relocs foo + test_relocs f1, + test_relocs f2, + test_relocs f5, + test_relocs f6, + .size _start,.-_start + + .globl _thumb + .type _thumb,%function + .thumb_func +_thumb: + test_relocs foo + test_relocs f3,.w + test_relocs f4,.w + test_relocs f7,.w + test_relocs f8,.w + .size _thumb,.-_thumb + + .data +foo: + .word 0x11223344 diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-3.dd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-3.dd new file mode 100644 index 0000000..a1fb37a --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-3.dd @@ -0,0 +1,126 @@ + +.* + + +Disassembly of section \.plt: + +00009000 <\.plt>: + 9000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) + 9004: e59fe004 ldr lr, \[pc, #4\] ; 9010 <f1-0xff0> + 9008: e08fe00e add lr, pc, lr + 900c: e5bef008 ldr pc, \[lr, #8\]! +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got.plt +#------------------------------------------------------------------------------ + 9010: 00007ff0 \.word 0x00007ff0 +#------------------------------------------------------------------------------ +#------ f2's .plt entry +#------------------------------------------------------------------------------ + 9014: e28fc600 add ip, pc, #0, 12 + 9018: e28cca07 add ip, ip, #28672 ; 0x7000 + 901c: e5bcfff0 ldr pc, \[ip, #4080\]! ; 0xff0 + +Disassembly of section \.iplt: + +00009020 <\.iplt>: +#------------------------------------------------------------------------------ +#------ f1's .iplt entry +#------------------------------------------------------------------------------ + 9020: e28fc600 add ip, pc, #0, 12 + 9024: e28cca07 add ip, ip, #28672 ; 0x7000 + 9028: e5bcffe8 ldr pc, \[ip, #4072\]! ; 0xfe8 +#------------------------------------------------------------------------------ +#------ f3's .iplt entry +#------------------------------------------------------------------------------ + 902c: e28fc600 add ip, pc, #0, 12 + 9030: e28cca07 add ip, ip, #28672 ; 0x7000 + 9034: e5bcffe0 ldr pc, \[ip, #4064\]! ; 0xfe0 +#------------------------------------------------------------------------------ +#------ f4's .iplt entry +#------------------------------------------------------------------------------ + 9038: e28fc600 add ip, pc, #0, 12 + 903c: e28cca07 add ip, ip, #28672 ; 0x7000 + 9040: e5bcffd8 ldr pc, \[ip, #4056\]! ; 0xfd8 + +Disassembly of section \.text: + +0000a000 <f1>: + a000: e1a0f00e mov pc, lr + +0000a004 <f2>: + a004: e1a0f00e mov pc, lr + +0000a008 <f3>: + a008: e1a0f00e mov pc, lr + +0000a00c <f4>: + a00c: e1a0f00e mov pc, lr + +0000a010 <arm>: + a010: eb0017fa bl 10000 <foo> + a014: e59f4000 ldr r4, \[pc\] ; a01c <arm\+0xc> + a018: e59f4000 ldr r4, \[pc\] ; a020 <arm\+0x10> +#------------------------------------------------------------------------------ +#------ .got offset for foo +#------------------------------------------------------------------------------ + a01c: 00000020 \.word 0x00000020 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for foo +#------------------------------------------------------------------------------ + a020: 00006ffc \.word 0x00006ffc +#------------------------------------------------------------------------------ +#------ f1's .iplt entry +#------------------------------------------------------------------------------ + a024: ebfffbfd bl 9020 <f1-0xfe0> + a028: e59f4000 ldr r4, \[pc\] ; a030 <arm\+0x20> + a02c: e59f4000 ldr r4, \[pc\] ; a034 <arm\+0x24> +#------------------------------------------------------------------------------ +#------ GP-relative offset of f1's .igot.plt entry +#------------------------------------------------------------------------------ + a030: 00000010 \.word 0x00000010 +#------------------------------------------------------------------------------ +#------ PC-relative offset of f1's .igot.plt entry +#------------------------------------------------------------------------------ + a034: 00006fdc \.word 0x00006fdc +#------------------------------------------------------------------------------ +#------ f2's .plt entry +#------------------------------------------------------------------------------ + a038: ebfffbf5 bl 9014 <f1-0xfec> + a03c: e59f4000 ldr r4, \[pc\] ; a044 <arm\+0x34> + a040: e59f4000 ldr r4, \[pc\] ; a048 <arm\+0x38> +#------------------------------------------------------------------------------ +#------ .got offset for f2 +#------------------------------------------------------------------------------ + a044: 00000024 \.word 0x00000024 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for f2 +#------------------------------------------------------------------------------ + a048: 00006fdc \.word 0x00006fdc +#------------------------------------------------------------------------------ +#------ f3's .iplt entry +#------------------------------------------------------------------------------ + a04c: ebfffbf6 bl 902c <f1-0xfd4> + a050: e59f4000 ldr r4, \[pc\] ; a058 <arm\+0x48> + a054: e59f4000 ldr r4, \[pc\] ; a05c <arm\+0x4c> +#------------------------------------------------------------------------------ +#------ GP-relative offset of f3's .igot.plt entry +#------------------------------------------------------------------------------ + a058: 00000014 \.word 0x00000014 +#------------------------------------------------------------------------------ +#------ PC-relative offset of f3's .igot.plt entry +#------------------------------------------------------------------------------ + a05c: 00006fb8 \.word 0x00006fb8 +#------------------------------------------------------------------------------ +#------ f4's .iplt entry +#------------------------------------------------------------------------------ + a060: ebfffbf4 bl 9038 <f1-0xfc8> + a064: e59f4000 ldr r4, \[pc\] ; a06c <arm\+0x5c> + a068: e59f4000 ldr r4, \[pc\] ; a070 <arm\+0x60> +#------------------------------------------------------------------------------ +#------ .got offset for f4 +#------------------------------------------------------------------------------ + a06c: 00000028 \.word 0x00000028 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for f4 +#------------------------------------------------------------------------------ + a070: 00006fb8 \.word 0x00006fb8 diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-3.gd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-3.gd new file mode 100644 index 0000000..db7fd42 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-3.gd @@ -0,0 +1,45 @@ + +.* + +Contents of section \.data: +#------------------------------------------------------------------------------ +#------ 00010000: foo +#------ 00010004: contains foo [R_ARM_RELATIVE] +#------ 00010008: contains PC-relative offset of foo +#------ 0001000c: contains f1 [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 10000 44332211 00000100 f8ffffff 00a00000 .* +#------------------------------------------------------------------------------ +#------ 00010010: contains PC-relative offset of f1's .iplt entry +#------ 00010014: f2 [R_ARM_ABS32] +#------ 00010018: f2 [R_ARM_REL32] +#------ 0001001c: contains f3 [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 10010 1090ffff 00000000 00000000 08a00000 .* +#------------------------------------------------------------------------------ +#------ 00010020: contains PC-relative offset of f3's .iplt entry +#------ 00010024: f4 [R_ARM_ABS32] +#------ 00010028: contains PC-relative offset of f4's .iplt entry +#------------------------------------------------------------------------------ + 10020 0c90ffff 00000000 1090ffff .* +Contents of section \.got: +#------------------------------------------------------------------------------ +#------ 00011000: .got.plt +#------ 00011004: reserved .got.plt entry +#------ 00011008: reserved .got.plt entry +#------ 0001100c: f2's .got.plt entry [R_ARM_JUMP_SLOT] +#------------------------------------------------------------------------------ + 11000 00200100 00000000 00000000 00900000 .* +#------------------------------------------------------------------------------ +#------ 00011010: f1's .igot.plt entry [R_ARM_IRELATIVE] +#------ 00011014: f3's .igot.plt entry [R_ARM_IRELATIVE] +#------ 00011018: f4's .igot.plt entry [R_ARM_IRELATIVE] +#------ 0001101c: .got entry for foo [R_ARM_RELATIVE] +#------------------------------------------------------------------------------ + 11010 00a00000 08a00000 0ca00000 00000100 .* +#------------------------------------------------------------------------------ +#------ 00011020: .got entry for foo [R_ARM_RELATIVE] +#------ 00011024: .got entry for f2 [R_ARM_GLOB_DAT] +#------ 00011028: .got entry for f4 [R_ARM_GLOB_DAT] +#------------------------------------------------------------------------------ + 11020 00000100 00000000 00000000 .* diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-3.rd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-3.rd new file mode 100644 index 0000000..4acb314 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-3.rd @@ -0,0 +1,20 @@ + +Relocation section '\.rel\.dyn' at offset 0x8000 contains 13 entries: + Offset Info Type Sym\.Value Sym\. Name +00010004 ......17 R_ARM_RELATIVE +0001101c ......17 R_ARM_RELATIVE +00011020 ......17 R_ARM_RELATIVE +0001000c ......a0 R_ARM_IRELATIVE +0001001c ......a0 R_ARM_IRELATIVE +00011010 ......a0 R_ARM_IRELATIVE +00011014 ......a0 R_ARM_IRELATIVE +00011018 ......a0 R_ARM_IRELATIVE +00010014 ......02 R_ARM_ABS32 f2\(\) f2 +00010018 ......03 R_ARM_REL32 f2\(\) f2 +00011024 ......15 R_ARM_GLOB_DAT f2\(\) f2 +00010024 ......02 R_ARM_ABS32 f4\(\) f4 +00011028 ......15 R_ARM_GLOB_DAT f4\(\) f4 + +Relocation section '\.rel\.plt' at offset 0x8068 contains 1 entries: + Offset Info Type Sym\.Value Sym\. Name +0001100c ......16 R_ARM_JUMP_SLOT f2\(\) f2 diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-3.s b/binutils-2.24/ld/testsuite/ld-arm/ifunc-3.s new file mode 100644 index 0000000..ace3598 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-3.s @@ -0,0 +1,49 @@ + .macro define,name + .text + .type \name,%gnu_indirect_function +\name: + mov pc,lr + .size \name,.-\name + .endm + + .macro test_relocs,name + bl \name(PLT) + ldr r4,1f + ldr r4,2f +1: + .word \name(GOT) +2: + .word \name(GOT_PREL) + + .data + .word \name + .word \name - . + .text + .endm + + .globl f2 + + .globl f3 + .hidden f3 + + .globl f4 + .protected f4 + + define f1 + define f2 + define f3 + define f4 + + .data +foo: + .word 0x11223344 + + .text + .globl arm +arm: + test_relocs foo + test_relocs f1 + test_relocs f2 + test_relocs f3 + test_relocs f4 + .size arm,.-arm diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-4.dd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-4.dd new file mode 100644 index 0000000..f5a4d91 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-4.dd @@ -0,0 +1,1055 @@ + +.* + + +Disassembly of section \.plt: + +00009000 <\.plt>: + 9000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) + 9004: e59fe004 ldr lr, \[pc, #4\] ; 9010 <aaf1-0xff0> + 9008: e08fe00e add lr, pc, lr + 900c: e5bef008 ldr pc, \[lr, #8\]! +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got.plt +#------------------------------------------------------------------------------ + 9010: 00007ff0 \.word 0x00007ff0 +#------------------------------------------------------------------------------ +#------ thumb entry to atf2's .plt entry +#------------------------------------------------------------------------------ + 9014: 4778 bx pc + 9016: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ atf2's .plt entry +#------------------------------------------------------------------------------ + 9018: e28fc600 add ip, pc, #0, 12 + 901c: e28cca07 add ip, ip, #28672 ; 0x7000 + 9020: e5bcffec ldr pc, \[ip, #4076\]! ; 0xfec +#------------------------------------------------------------------------------ +#------ thumb entry to ttf2's .plt entry +#------------------------------------------------------------------------------ + 9024: 4778 bx pc + 9026: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ ttf2's .plt entry +#------------------------------------------------------------------------------ + 9028: e28fc600 add ip, pc, #0, 12 + 902c: e28cca07 add ip, ip, #28672 ; 0x7000 + 9030: e5bcffe0 ldr pc, \[ip, #4064\]! ; 0xfe0 +#------------------------------------------------------------------------------ +#------ thumb entry to tbf2's .plt entry +#------------------------------------------------------------------------------ + 9034: 4778 bx pc + 9036: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ tbf2's .plt entry +#------------------------------------------------------------------------------ + 9038: e28fc600 add ip, pc, #0, 12 + 903c: e28cca07 add ip, ip, #28672 ; 0x7000 + 9040: e5bcffd4 ldr pc, \[ip, #4052\]! ; 0xfd4 +#------------------------------------------------------------------------------ +#------ taf2's .plt entry +#------------------------------------------------------------------------------ + 9044: e28fc600 add ip, pc, #0, 12 + 9048: e28cca07 add ip, ip, #28672 ; 0x7000 + 904c: e5bcffcc ldr pc, \[ip, #4044\]! ; 0xfcc +#------------------------------------------------------------------------------ +#------ aaf2's .plt entry +#------------------------------------------------------------------------------ + 9050: e28fc600 add ip, pc, #0, 12 + 9054: e28cca07 add ip, ip, #28672 ; 0x7000 + 9058: e5bcffc4 ldr pc, \[ip, #4036\]! ; 0xfc4 +#------------------------------------------------------------------------------ +#------ thumb entry to abf2's .plt entry +#------------------------------------------------------------------------------ + 905c: 4778 bx pc + 905e: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ abf2's .plt entry +#------------------------------------------------------------------------------ + 9060: e28fc600 add ip, pc, #0, 12 + 9064: e28cca07 add ip, ip, #28672 ; 0x7000 + 9068: e5bcffb8 ldr pc, \[ip, #4024\]! ; 0xfb8 + +Disassembly of section \.iplt: + +0000906c <\.iplt>: +#------------------------------------------------------------------------------ +#------ aaf1's .iplt entry +#------------------------------------------------------------------------------ + 906c: e28fc600 add ip, pc, #0, 12 + 9070: e28cca07 add ip, ip, #28672 ; 0x7000 + 9074: e5bcffb0 ldr pc, \[ip, #4016\]! ; 0xfb0 +#------------------------------------------------------------------------------ +#------ thumb entry to atf1's .iplt entry +#------------------------------------------------------------------------------ + 9078: 4778 bx pc + 907a: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ atf1's .iplt entry +#------------------------------------------------------------------------------ + 907c: e28fc600 add ip, pc, #0, 12 + 9080: e28cca07 add ip, ip, #28672 ; 0x7000 + 9084: e5bcffa4 ldr pc, \[ip, #4004\]! ; 0xfa4 +#------------------------------------------------------------------------------ +#------ thumb entry to abf1's .iplt entry +#------------------------------------------------------------------------------ + 9088: 4778 bx pc + 908a: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ abf1's .iplt entry +#------------------------------------------------------------------------------ + 908c: e28fc600 add ip, pc, #0, 12 + 9090: e28cca07 add ip, ip, #28672 ; 0x7000 + 9094: e5bcff98 ldr pc, \[ip, #3992\]! ; 0xf98 +#------------------------------------------------------------------------------ +#------ taf1's .iplt entry +#------------------------------------------------------------------------------ + 9098: e28fc600 add ip, pc, #0, 12 + 909c: e28cca07 add ip, ip, #28672 ; 0x7000 + 90a0: e5bcff90 ldr pc, \[ip, #3984\]! ; 0xf90 +#------------------------------------------------------------------------------ +#------ thumb entry to ttf1's .iplt entry +#------------------------------------------------------------------------------ + 90a4: 4778 bx pc + 90a6: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ ttf1's .iplt entry +#------------------------------------------------------------------------------ + 90a8: e28fc600 add ip, pc, #0, 12 + 90ac: e28cca07 add ip, ip, #28672 ; 0x7000 + 90b0: e5bcff84 ldr pc, \[ip, #3972\]! ; 0xf84 +#------------------------------------------------------------------------------ +#------ thumb entry to tbf1's .iplt entry +#------------------------------------------------------------------------------ + 90b4: 4778 bx pc + 90b6: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ tbf1's .iplt entry +#------------------------------------------------------------------------------ + 90b8: e28fc600 add ip, pc, #0, 12 + 90bc: e28cca07 add ip, ip, #28672 ; 0x7000 + 90c0: e5bcff78 ldr pc, \[ip, #3960\]! ; 0xf78 +#------------------------------------------------------------------------------ +#------ aaf4's .iplt entry +#------------------------------------------------------------------------------ + 90c4: e28fc600 add ip, pc, #0, 12 + 90c8: e28cca07 add ip, ip, #28672 ; 0x7000 + 90cc: e5bcff70 ldr pc, \[ip, #3952\]! ; 0xf70 +#------------------------------------------------------------------------------ +#------ thumb entry to atf3's .iplt entry +#------------------------------------------------------------------------------ + 90d0: 4778 bx pc + 90d2: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ atf3's .iplt entry +#------------------------------------------------------------------------------ + 90d4: e28fc600 add ip, pc, #0, 12 + 90d8: e28cca07 add ip, ip, #28672 ; 0x7000 + 90dc: e5bcff64 ldr pc, \[ip, #3940\]! ; 0xf64 +#------------------------------------------------------------------------------ +#------ thumb entry to abf3's .iplt entry +#------------------------------------------------------------------------------ + 90e0: 4778 bx pc + 90e2: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ abf3's .iplt entry +#------------------------------------------------------------------------------ + 90e4: e28fc600 add ip, pc, #0, 12 + 90e8: e28cca07 add ip, ip, #28672 ; 0x7000 + 90ec: e5bcff58 ldr pc, \[ip, #3928\]! ; 0xf58 +#------------------------------------------------------------------------------ +#------ thumb entry to ttf3's .iplt entry +#------------------------------------------------------------------------------ + 90f0: 4778 bx pc + 90f2: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ ttf3's .iplt entry +#------------------------------------------------------------------------------ + 90f4: e28fc600 add ip, pc, #0, 12 + 90f8: e28cca07 add ip, ip, #28672 ; 0x7000 + 90fc: e5bcff4c ldr pc, \[ip, #3916\]! ; 0xf4c +#------------------------------------------------------------------------------ +#------ thumb entry to tbf3's .iplt entry +#------------------------------------------------------------------------------ + 9100: 4778 bx pc + 9102: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ tbf3's .iplt entry +#------------------------------------------------------------------------------ + 9104: e28fc600 add ip, pc, #0, 12 + 9108: e28cca07 add ip, ip, #28672 ; 0x7000 + 910c: e5bcff40 ldr pc, \[ip, #3904\]! ; 0xf40 +#------------------------------------------------------------------------------ +#------ taf3's .iplt entry +#------------------------------------------------------------------------------ + 9110: e28fc600 add ip, pc, #0, 12 + 9114: e28cca07 add ip, ip, #28672 ; 0x7000 + 9118: e5bcff38 ldr pc, \[ip, #3896\]! ; 0xf38 +#------------------------------------------------------------------------------ +#------ thumb entry to abf4's .iplt entry +#------------------------------------------------------------------------------ + 911c: 4778 bx pc + 911e: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ abf4's .iplt entry +#------------------------------------------------------------------------------ + 9120: e28fc600 add ip, pc, #0, 12 + 9124: e28cca07 add ip, ip, #28672 ; 0x7000 + 9128: e5bcff2c ldr pc, \[ip, #3884\]! ; 0xf2c +#------------------------------------------------------------------------------ +#------ thumb entry to tbf4's .iplt entry +#------------------------------------------------------------------------------ + 912c: 4778 bx pc + 912e: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ tbf4's .iplt entry +#------------------------------------------------------------------------------ + 9130: e28fc600 add ip, pc, #0, 12 + 9134: e28cca07 add ip, ip, #28672 ; 0x7000 + 9138: e5bcff20 ldr pc, \[ip, #3872\]! ; 0xf20 +#------------------------------------------------------------------------------ +#------ thumb entry to ttf4's .iplt entry +#------------------------------------------------------------------------------ + 913c: 4778 bx pc + 913e: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ ttf4's .iplt entry +#------------------------------------------------------------------------------ + 9140: e28fc600 add ip, pc, #0, 12 + 9144: e28cca07 add ip, ip, #28672 ; 0x7000 + 9148: e5bcff14 ldr pc, \[ip, #3860\]! ; 0xf14 +#------------------------------------------------------------------------------ +#------ aaf3's .iplt entry +#------------------------------------------------------------------------------ + 914c: e28fc600 add ip, pc, #0, 12 + 9150: e28cca07 add ip, ip, #28672 ; 0x7000 + 9154: e5bcff0c ldr pc, \[ip, #3852\]! ; 0xf0c +#------------------------------------------------------------------------------ +#------ thumb entry to atf4's .iplt entry +#------------------------------------------------------------------------------ + 9158: 4778 bx pc + 915a: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ atf4's .iplt entry +#------------------------------------------------------------------------------ + 915c: e28fc600 add ip, pc, #0, 12 + 9160: e28cca07 add ip, ip, #28672 ; 0x7000 + 9164: e5bcff00 ldr pc, \[ip, #3840\]! ; 0xf00 +#------------------------------------------------------------------------------ +#------ taf4's .iplt entry +#------------------------------------------------------------------------------ + 9168: e28fc600 add ip, pc, #0, 12 + 916c: e28cca07 add ip, ip, #28672 ; 0x7000 + 9170: e5bcfef8 ldr pc, \[ip, #3832\]! ; 0xef8 + +Disassembly of section \.text: + +0000a000 <aaf1>: + a000: e1a0f00e mov pc, lr + +0000a004 <atf1>: + a004: e1a0f00e mov pc, lr + +0000a008 <abf1>: + a008: e1a0f00e mov pc, lr + +0000a00c <taf1>: + a00c: 46f7 mov pc, lr + +0000a00e <ttf1>: + a00e: 46f7 mov pc, lr + +0000a010 <tbf1>: + a010: 46f7 mov pc, lr + \.\.\. + +0000a014 <aaf2>: + a014: e1a0f00e mov pc, lr + +0000a018 <atf2>: + a018: e1a0f00e mov pc, lr + +0000a01c <abf2>: + a01c: e1a0f00e mov pc, lr + +0000a020 <taf2>: + a020: 46f7 mov pc, lr + +0000a022 <ttf2>: + a022: 46f7 mov pc, lr + +0000a024 <tbf2>: + a024: 46f7 mov pc, lr + \.\.\. + +0000a028 <aaf3>: + a028: e1a0f00e mov pc, lr + +0000a02c <atf3>: + a02c: e1a0f00e mov pc, lr + +0000a030 <abf3>: + a030: e1a0f00e mov pc, lr + +0000a034 <taf3>: + a034: 46f7 mov pc, lr + +0000a036 <ttf3>: + a036: 46f7 mov pc, lr + +0000a038 <tbf3>: + a038: 46f7 mov pc, lr + \.\.\. + +0000a03c <aaf4>: + a03c: e1a0f00e mov pc, lr + +0000a040 <atf4>: + a040: e1a0f00e mov pc, lr + +0000a044 <abf4>: + a044: e1a0f00e mov pc, lr + +0000a048 <taf4>: + a048: 46f7 mov pc, lr + +0000a04a <ttf4>: + a04a: 46f7 mov pc, lr + +0000a04c <tbf4>: + a04c: 46f7 mov pc, lr + \.\.\. + +0000a050 <arm>: + a050: eb0017ea bl 10000 <foo> + a054: ea0017e9 b 10000 <foo> + a058: 0a0017e8 beq 10000 <foo> + a05c: e59f4000 ldr r4, \[pc\] ; a064 <arm\+0x14> + a060: e59f4000 ldr r4, \[pc\] ; a068 <arm\+0x18> +#------------------------------------------------------------------------------ +#------ .got offset for foo +#------------------------------------------------------------------------------ + a064: 00000070 \.word 0x00000070 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for foo +#------------------------------------------------------------------------------ + a068: 00007004 \.word 0x00007004 +#------------------------------------------------------------------------------ +#------ aaf1's .iplt entry +#------------------------------------------------------------------------------ + a06c: ebfffbfe bl 906c <aaf1-0xf94> +#------------------------------------------------------------------------------ +#------ aaf1's .iplt entry +#------------------------------------------------------------------------------ + a070: eafffbfd b 906c <aaf1-0xf94> +#------------------------------------------------------------------------------ +#------ aaf1's .iplt entry +#------------------------------------------------------------------------------ + a074: 0afffbfc beq 906c <aaf1-0xf94> + a078: e59f4000 ldr r4, \[pc\] ; a080 <arm\+0x30> + a07c: e59f4000 ldr r4, \[pc\] ; a084 <arm\+0x34> +#------------------------------------------------------------------------------ +#------ GP-relative offset of aaf1's .igot.plt entry +#------------------------------------------------------------------------------ + a080: 00000024 \.word 0x00000024 +#------------------------------------------------------------------------------ +#------ PC-relative offset of aaf1's .igot.plt entry +#------------------------------------------------------------------------------ + a084: 00006fa0 \.word 0x00006fa0 +#------------------------------------------------------------------------------ +#------ taf1's .iplt entry +#------------------------------------------------------------------------------ + a088: ebfffc02 bl 9098 <aaf1-0xf68> +#------------------------------------------------------------------------------ +#------ taf1's .iplt entry +#------------------------------------------------------------------------------ + a08c: eafffc01 b 9098 <aaf1-0xf68> +#------------------------------------------------------------------------------ +#------ taf1's .iplt entry +#------------------------------------------------------------------------------ + a090: 0afffc00 beq 9098 <aaf1-0xf68> + a094: e59f4000 ldr r4, \[pc\] ; a09c <arm\+0x4c> + a098: e59f4000 ldr r4, \[pc\] ; a0a0 <arm\+0x50> +#------------------------------------------------------------------------------ +#------ GP-relative offset of taf1's .igot.plt entry +#------------------------------------------------------------------------------ + a09c: 00000030 \.word 0x00000030 +#------------------------------------------------------------------------------ +#------ PC-relative offset of taf1's .igot.plt entry +#------------------------------------------------------------------------------ + a0a0: 00006f90 \.word 0x00006f90 +#------------------------------------------------------------------------------ +#------ abf1's .iplt entry +#------------------------------------------------------------------------------ + a0a4: ebfffbf8 bl 908c <aaf1-0xf74> +#------------------------------------------------------------------------------ +#------ abf1's .iplt entry +#------------------------------------------------------------------------------ + a0a8: eafffbf7 b 908c <aaf1-0xf74> +#------------------------------------------------------------------------------ +#------ abf1's .iplt entry +#------------------------------------------------------------------------------ + a0ac: 0afffbf6 beq 908c <aaf1-0xf74> + a0b0: e59f4000 ldr r4, \[pc\] ; a0b8 <arm\+0x68> + a0b4: e59f4000 ldr r4, \[pc\] ; a0bc <arm\+0x6c> +#------------------------------------------------------------------------------ +#------ GP-relative offset of abf1's .igot.plt entry +#------------------------------------------------------------------------------ + a0b8: 0000002c \.word 0x0000002c +#------------------------------------------------------------------------------ +#------ PC-relative offset of abf1's .igot.plt entry +#------------------------------------------------------------------------------ + a0bc: 00006f70 \.word 0x00006f70 +#------------------------------------------------------------------------------ +#------ tbf1's .iplt entry +#------------------------------------------------------------------------------ + a0c0: ebfffbfc bl 90b8 <aaf1-0xf48> +#------------------------------------------------------------------------------ +#------ tbf1's .iplt entry +#------------------------------------------------------------------------------ + a0c4: eafffbfb b 90b8 <aaf1-0xf48> +#------------------------------------------------------------------------------ +#------ tbf1's .iplt entry +#------------------------------------------------------------------------------ + a0c8: 0afffbfa beq 90b8 <aaf1-0xf48> + a0cc: e59f4000 ldr r4, \[pc\] ; a0d4 <arm\+0x84> + a0d0: e59f4000 ldr r4, \[pc\] ; a0d8 <arm\+0x88> +#------------------------------------------------------------------------------ +#------ GP-relative offset of tbf1's .igot.plt entry +#------------------------------------------------------------------------------ + a0d4: 00000038 \.word 0x00000038 +#------------------------------------------------------------------------------ +#------ PC-relative offset of tbf1's .igot.plt entry +#------------------------------------------------------------------------------ + a0d8: 00006f60 \.word 0x00006f60 +#------------------------------------------------------------------------------ +#------ aaf2's .plt entry +#------------------------------------------------------------------------------ + a0dc: ebfffbdb bl 9050 <aaf1-0xfb0> +#------------------------------------------------------------------------------ +#------ aaf2's .plt entry +#------------------------------------------------------------------------------ + a0e0: eafffbda b 9050 <aaf1-0xfb0> +#------------------------------------------------------------------------------ +#------ aaf2's .plt entry +#------------------------------------------------------------------------------ + a0e4: 0afffbd9 beq 9050 <aaf1-0xfb0> + a0e8: e59f4000 ldr r4, \[pc\] ; a0f0 <arm\+0xa0> + a0ec: e59f4000 ldr r4, \[pc\] ; a0f4 <arm\+0xa4> +#------------------------------------------------------------------------------ +#------ .got offset for aaf2 +#------------------------------------------------------------------------------ + a0f0: 00000088 \.word 0x00000088 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for aaf2 +#------------------------------------------------------------------------------ + a0f4: 00006f94 \.word 0x00006f94 +#------------------------------------------------------------------------------ +#------ taf2's .plt entry +#------------------------------------------------------------------------------ + a0f8: ebfffbd1 bl 9044 <aaf1-0xfbc> +#------------------------------------------------------------------------------ +#------ taf2's .plt entry +#------------------------------------------------------------------------------ + a0fc: eafffbd0 b 9044 <aaf1-0xfbc> +#------------------------------------------------------------------------------ +#------ taf2's .plt entry +#------------------------------------------------------------------------------ + a100: 0afffbcf beq 9044 <aaf1-0xfbc> + a104: e59f4000 ldr r4, \[pc\] ; a10c <arm\+0xbc> + a108: e59f4000 ldr r4, \[pc\] ; a110 <arm\+0xc0> +#------------------------------------------------------------------------------ +#------ .got offset for taf2 +#------------------------------------------------------------------------------ + a10c: 00000084 \.word 0x00000084 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for taf2 +#------------------------------------------------------------------------------ + a110: 00006f74 \.word 0x00006f74 +#------------------------------------------------------------------------------ +#------ abf2's .plt entry +#------------------------------------------------------------------------------ + a114: ebfffbd1 bl 9060 <aaf1-0xfa0> +#------------------------------------------------------------------------------ +#------ abf2's .plt entry +#------------------------------------------------------------------------------ + a118: eafffbd0 b 9060 <aaf1-0xfa0> +#------------------------------------------------------------------------------ +#------ abf2's .plt entry +#------------------------------------------------------------------------------ + a11c: 0afffbcf beq 9060 <aaf1-0xfa0> + a120: e59f4000 ldr r4, \[pc\] ; a128 <arm\+0xd8> + a124: e59f4000 ldr r4, \[pc\] ; a12c <arm\+0xdc> +#------------------------------------------------------------------------------ +#------ .got offset for abf2 +#------------------------------------------------------------------------------ + a128: 000000a0 \.word 0x000000a0 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for abf2 +#------------------------------------------------------------------------------ + a12c: 00006f74 \.word 0x00006f74 +#------------------------------------------------------------------------------ +#------ tbf2's .plt entry +#------------------------------------------------------------------------------ + a130: ebfffbc0 bl 9038 <aaf1-0xfc8> +#------------------------------------------------------------------------------ +#------ tbf2's .plt entry +#------------------------------------------------------------------------------ + a134: eafffbbf b 9038 <aaf1-0xfc8> +#------------------------------------------------------------------------------ +#------ tbf2's .plt entry +#------------------------------------------------------------------------------ + a138: 0afffbbe beq 9038 <aaf1-0xfc8> + a13c: e59f4000 ldr r4, \[pc\] ; a144 <arm\+0xf4> + a140: e59f4000 ldr r4, \[pc\] ; a148 <arm\+0xf8> +#------------------------------------------------------------------------------ +#------ .got offset for tbf2 +#------------------------------------------------------------------------------ + a144: 00000080 \.word 0x00000080 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for tbf2 +#------------------------------------------------------------------------------ + a148: 00006f38 \.word 0x00006f38 +#------------------------------------------------------------------------------ +#------ aaf3's .iplt entry +#------------------------------------------------------------------------------ + a14c: ebfffbfe bl 914c <aaf1-0xeb4> +#------------------------------------------------------------------------------ +#------ aaf3's .iplt entry +#------------------------------------------------------------------------------ + a150: eafffbfd b 914c <aaf1-0xeb4> +#------------------------------------------------------------------------------ +#------ aaf3's .iplt entry +#------------------------------------------------------------------------------ + a154: 0afffbfc beq 914c <aaf1-0xeb4> + a158: e59f4000 ldr r4, \[pc\] ; a160 <arm\+0x110> + a15c: e59f4000 ldr r4, \[pc\] ; a164 <arm\+0x114> +#------------------------------------------------------------------------------ +#------ GP-relative offset of aaf3's .igot.plt entry +#------------------------------------------------------------------------------ + a160: 00000060 \.word 0x00000060 +#------------------------------------------------------------------------------ +#------ PC-relative offset of aaf3's .igot.plt entry +#------------------------------------------------------------------------------ + a164: 00006efc \.word 0x00006efc +#------------------------------------------------------------------------------ +#------ taf3's .iplt entry +#------------------------------------------------------------------------------ + a168: ebfffbe8 bl 9110 <aaf1-0xef0> +#------------------------------------------------------------------------------ +#------ taf3's .iplt entry +#------------------------------------------------------------------------------ + a16c: eafffbe7 b 9110 <aaf1-0xef0> +#------------------------------------------------------------------------------ +#------ taf3's .iplt entry +#------------------------------------------------------------------------------ + a170: 0afffbe6 beq 9110 <aaf1-0xef0> + a174: e59f4000 ldr r4, \[pc\] ; a17c <arm\+0x12c> + a178: e59f4000 ldr r4, \[pc\] ; a180 <arm\+0x130> +#------------------------------------------------------------------------------ +#------ GP-relative offset of taf3's .igot.plt entry +#------------------------------------------------------------------------------ + a17c: 00000050 \.word 0x00000050 +#------------------------------------------------------------------------------ +#------ PC-relative offset of taf3's .igot.plt entry +#------------------------------------------------------------------------------ + a180: 00006ed0 \.word 0x00006ed0 +#------------------------------------------------------------------------------ +#------ abf3's .iplt entry +#------------------------------------------------------------------------------ + a184: ebfffbd6 bl 90e4 <aaf1-0xf1c> +#------------------------------------------------------------------------------ +#------ abf3's .iplt entry +#------------------------------------------------------------------------------ + a188: eafffbd5 b 90e4 <aaf1-0xf1c> +#------------------------------------------------------------------------------ +#------ abf3's .iplt entry +#------------------------------------------------------------------------------ + a18c: 0afffbd4 beq 90e4 <aaf1-0xf1c> + a190: e59f4000 ldr r4, \[pc\] ; a198 <arm\+0x148> + a194: e59f4000 ldr r4, \[pc\] ; a19c <arm\+0x14c> +#------------------------------------------------------------------------------ +#------ GP-relative offset of abf3's .igot.plt entry +#------------------------------------------------------------------------------ + a198: 00000044 \.word 0x00000044 +#------------------------------------------------------------------------------ +#------ PC-relative offset of abf3's .igot.plt entry +#------------------------------------------------------------------------------ + a19c: 00006ea8 \.word 0x00006ea8 +#------------------------------------------------------------------------------ +#------ tbf3's .iplt entry +#------------------------------------------------------------------------------ + a1a0: ebfffbd7 bl 9104 <aaf1-0xefc> +#------------------------------------------------------------------------------ +#------ tbf3's .iplt entry +#------------------------------------------------------------------------------ + a1a4: eafffbd6 b 9104 <aaf1-0xefc> +#------------------------------------------------------------------------------ +#------ tbf3's .iplt entry +#------------------------------------------------------------------------------ + a1a8: 0afffbd5 beq 9104 <aaf1-0xefc> + a1ac: e59f4000 ldr r4, \[pc\] ; a1b4 <arm\+0x164> + a1b0: e59f4000 ldr r4, \[pc\] ; a1b8 <arm\+0x168> +#------------------------------------------------------------------------------ +#------ GP-relative offset of tbf3's .igot.plt entry +#------------------------------------------------------------------------------ + a1b4: 0000004c \.word 0x0000004c +#------------------------------------------------------------------------------ +#------ PC-relative offset of tbf3's .igot.plt entry +#------------------------------------------------------------------------------ + a1b8: 00006e94 \.word 0x00006e94 +#------------------------------------------------------------------------------ +#------ aaf4's .iplt entry +#------------------------------------------------------------------------------ + a1bc: ebfffbc0 bl 90c4 <aaf1-0xf3c> +#------------------------------------------------------------------------------ +#------ aaf4's .iplt entry +#------------------------------------------------------------------------------ + a1c0: eafffbbf b 90c4 <aaf1-0xf3c> +#------------------------------------------------------------------------------ +#------ aaf4's .iplt entry +#------------------------------------------------------------------------------ + a1c4: 0afffbbe beq 90c4 <aaf1-0xf3c> + a1c8: e59f4000 ldr r4, \[pc\] ; a1d0 <arm\+0x180> + a1cc: e59f4000 ldr r4, \[pc\] ; a1d4 <arm\+0x184> +#------------------------------------------------------------------------------ +#------ .got offset for aaf4 +#------------------------------------------------------------------------------ + a1d0: 00000078 \.word 0x00000078 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for aaf4 +#------------------------------------------------------------------------------ + a1d4: 00006ea4 \.word 0x00006ea4 +#------------------------------------------------------------------------------ +#------ taf4's .iplt entry +#------------------------------------------------------------------------------ + a1d8: ebfffbe2 bl 9168 <aaf1-0xe98> +#------------------------------------------------------------------------------ +#------ taf4's .iplt entry +#------------------------------------------------------------------------------ + a1dc: eafffbe1 b 9168 <aaf1-0xe98> +#------------------------------------------------------------------------------ +#------ taf4's .iplt entry +#------------------------------------------------------------------------------ + a1e0: 0afffbe0 beq 9168 <aaf1-0xe98> + a1e4: e59f4000 ldr r4, \[pc\] ; a1ec <arm\+0x19c> + a1e8: e59f4000 ldr r4, \[pc\] ; a1f0 <arm\+0x1a0> +#------------------------------------------------------------------------------ +#------ .got offset for taf4 +#------------------------------------------------------------------------------ + a1ec: 0000009c \.word 0x0000009c +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for taf4 +#------------------------------------------------------------------------------ + a1f0: 00006eac \.word 0x00006eac +#------------------------------------------------------------------------------ +#------ abf4's .iplt entry +#------------------------------------------------------------------------------ + a1f4: ebfffbc9 bl 9120 <aaf1-0xee0> +#------------------------------------------------------------------------------ +#------ abf4's .iplt entry +#------------------------------------------------------------------------------ + a1f8: eafffbc8 b 9120 <aaf1-0xee0> +#------------------------------------------------------------------------------ +#------ abf4's .iplt entry +#------------------------------------------------------------------------------ + a1fc: 0afffbc7 beq 9120 <aaf1-0xee0> + a200: e59f4000 ldr r4, \[pc\] ; a208 <arm\+0x1b8> + a204: e59f4000 ldr r4, \[pc\] ; a20c <arm\+0x1bc> +#------------------------------------------------------------------------------ +#------ .got offset for abf4 +#------------------------------------------------------------------------------ + a208: 0000008c \.word 0x0000008c +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for abf4 +#------------------------------------------------------------------------------ + a20c: 00006e80 \.word 0x00006e80 +#------------------------------------------------------------------------------ +#------ tbf4's .iplt entry +#------------------------------------------------------------------------------ + a210: ebfffbc6 bl 9130 <aaf1-0xed0> +#------------------------------------------------------------------------------ +#------ tbf4's .iplt entry +#------------------------------------------------------------------------------ + a214: eafffbc5 b 9130 <aaf1-0xed0> +#------------------------------------------------------------------------------ +#------ tbf4's .iplt entry +#------------------------------------------------------------------------------ + a218: 0afffbc4 beq 9130 <aaf1-0xed0> + a21c: e59f4000 ldr r4, \[pc\] ; a224 <arm\+0x1d4> + a220: e59f4000 ldr r4, \[pc\] ; a228 <arm\+0x1d8> +#------------------------------------------------------------------------------ +#------ .got offset for tbf4 +#------------------------------------------------------------------------------ + a224: 00000090 \.word 0x00000090 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for tbf4 +#------------------------------------------------------------------------------ + a228: 00006e68 \.word 0x00006e68 + +0000a22c <_thumb>: + a22c: f005 fee8 bl 10000 <foo> + a230: f005 bee6 b\.w 10000 <foo> + a234: f005 86e4 beq\.w 10000 <foo> + a238: 4c00 ldr r4, \[pc, #0\] ; \(a23c <_thumb\+0x10>\) + a23a: 4c01 ldr r4, \[pc, #4\] ; \(a240 <_thumb\+0x14>\) +#------------------------------------------------------------------------------ +#------ .got offset for foo +#------------------------------------------------------------------------------ + a23c: 00000070 \.word 0x00000070 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for foo +#------------------------------------------------------------------------------ + a240: 00006e2c \.word 0x00006e2c +#------------------------------------------------------------------------------ +#------ atf1's .iplt entry +#------------------------------------------------------------------------------ + a244: f7fe ef1a blx 907c <aaf1-0xf84> +#------------------------------------------------------------------------------ +#------ thumb entry to atf1's .iplt entry +#------------------------------------------------------------------------------ + a248: f7fe bf16 b\.w 9078 <aaf1-0xf88> +#------------------------------------------------------------------------------ +#------ thumb entry to atf1's .iplt entry +#------------------------------------------------------------------------------ + a24c: f43e af14 beq\.w 9078 <aaf1-0xf88> + a250: 4c00 ldr r4, \[pc, #0\] ; \(a254 <_thumb\+0x28>\) + a252: 4c01 ldr r4, \[pc, #4\] ; \(a258 <_thumb\+0x2c>\) +#------------------------------------------------------------------------------ +#------ GP-relative offset of atf1's .igot.plt entry +#------------------------------------------------------------------------------ + a254: 00000028 \.word 0x00000028 +#------------------------------------------------------------------------------ +#------ PC-relative offset of atf1's .igot.plt entry +#------------------------------------------------------------------------------ + a258: 00006dd0 \.word 0x00006dd0 +#------------------------------------------------------------------------------ +#------ ttf1's .iplt entry +#------------------------------------------------------------------------------ + a25c: f7fe ef24 blx 90a8 <aaf1-0xf58> +#------------------------------------------------------------------------------ +#------ thumb entry to ttf1's .iplt entry +#------------------------------------------------------------------------------ + a260: f7fe bf20 b\.w 90a4 <aaf1-0xf5c> +#------------------------------------------------------------------------------ +#------ thumb entry to ttf1's .iplt entry +#------------------------------------------------------------------------------ + a264: f43e af1e beq\.w 90a4 <aaf1-0xf5c> + a268: 4c00 ldr r4, \[pc, #0\] ; \(a26c <_thumb\+0x40>\) + a26a: 4c01 ldr r4, \[pc, #4\] ; \(a270 <_thumb\+0x44>\) +#------------------------------------------------------------------------------ +#------ GP-relative offset of ttf1's .igot.plt entry +#------------------------------------------------------------------------------ + a26c: 00000034 \.word 0x00000034 +#------------------------------------------------------------------------------ +#------ PC-relative offset of ttf1's .igot.plt entry +#------------------------------------------------------------------------------ + a270: 00006dc4 \.word 0x00006dc4 +#------------------------------------------------------------------------------ +#------ abf1's .iplt entry +#------------------------------------------------------------------------------ + a274: f7fe ef0a blx 908c <aaf1-0xf74> +#------------------------------------------------------------------------------ +#------ thumb entry to abf1's .iplt entry +#------------------------------------------------------------------------------ + a278: f7fe bf06 b\.w 9088 <aaf1-0xf78> +#------------------------------------------------------------------------------ +#------ thumb entry to abf1's .iplt entry +#------------------------------------------------------------------------------ + a27c: f43e af04 beq\.w 9088 <aaf1-0xf78> + a280: 4c00 ldr r4, \[pc, #0\] ; \(a284 <_thumb\+0x58>\) + a282: 4c01 ldr r4, \[pc, #4\] ; \(a288 <_thumb\+0x5c>\) +#------------------------------------------------------------------------------ +#------ GP-relative offset of abf1's .igot.plt entry +#------------------------------------------------------------------------------ + a284: 0000002c \.word 0x0000002c +#------------------------------------------------------------------------------ +#------ PC-relative offset of abf1's .igot.plt entry +#------------------------------------------------------------------------------ + a288: 00006da4 \.word 0x00006da4 +#------------------------------------------------------------------------------ +#------ tbf1's .iplt entry +#------------------------------------------------------------------------------ + a28c: f7fe ef14 blx 90b8 <aaf1-0xf48> +#------------------------------------------------------------------------------ +#------ thumb entry to tbf1's .iplt entry +#------------------------------------------------------------------------------ + a290: f7fe bf10 b\.w 90b4 <aaf1-0xf4c> +#------------------------------------------------------------------------------ +#------ thumb entry to tbf1's .iplt entry +#------------------------------------------------------------------------------ + a294: f43e af0e beq\.w 90b4 <aaf1-0xf4c> + a298: 4c00 ldr r4, \[pc, #0\] ; \(a29c <_thumb\+0x70>\) + a29a: 4c01 ldr r4, \[pc, #4\] ; \(a2a0 <_thumb\+0x74>\) +#------------------------------------------------------------------------------ +#------ GP-relative offset of tbf1's .igot.plt entry +#------------------------------------------------------------------------------ + a29c: 00000038 \.word 0x00000038 +#------------------------------------------------------------------------------ +#------ PC-relative offset of tbf1's .igot.plt entry +#------------------------------------------------------------------------------ + a2a0: 00006d98 \.word 0x00006d98 +#------------------------------------------------------------------------------ +#------ atf2's .plt entry +#------------------------------------------------------------------------------ + a2a4: f7fe eeb8 blx 9018 <aaf1-0xfe8> +#------------------------------------------------------------------------------ +#------ thumb entry to atf2's .plt entry +#------------------------------------------------------------------------------ + a2a8: f7fe beb4 b\.w 9014 <aaf1-0xfec> +#------------------------------------------------------------------------------ +#------ thumb entry to atf2's .plt entry +#------------------------------------------------------------------------------ + a2ac: f43e aeb2 beq\.w 9014 <aaf1-0xfec> + a2b0: 4c00 ldr r4, \[pc, #0\] ; \(a2b4 <_thumb\+0x88>\) + a2b2: 4c01 ldr r4, \[pc, #4\] ; \(a2b8 <_thumb\+0x8c>\) +#------------------------------------------------------------------------------ +#------ .got offset for atf2 +#------------------------------------------------------------------------------ + a2b4: 00000074 \.word 0x00000074 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for atf2 +#------------------------------------------------------------------------------ + a2b8: 00006dbc \.word 0x00006dbc +#------------------------------------------------------------------------------ +#------ ttf2's .plt entry +#------------------------------------------------------------------------------ + a2bc: f7fe eeb4 blx 9028 <aaf1-0xfd8> +#------------------------------------------------------------------------------ +#------ thumb entry to ttf2's .plt entry +#------------------------------------------------------------------------------ + a2c0: f7fe beb0 b\.w 9024 <aaf1-0xfdc> +#------------------------------------------------------------------------------ +#------ thumb entry to ttf2's .plt entry +#------------------------------------------------------------------------------ + a2c4: f43e aeae beq\.w 9024 <aaf1-0xfdc> + a2c8: 4c00 ldr r4, \[pc, #0\] ; \(a2cc <_thumb\+0xa0>\) + a2ca: 4c01 ldr r4, \[pc, #4\] ; \(a2d0 <_thumb\+0xa4>\) +#------------------------------------------------------------------------------ +#------ .got offset for ttf2 +#------------------------------------------------------------------------------ + a2cc: 0000007c \.word 0x0000007c +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for ttf2 +#------------------------------------------------------------------------------ + a2d0: 00006dac \.word 0x00006dac +#------------------------------------------------------------------------------ +#------ abf2's .plt entry +#------------------------------------------------------------------------------ + a2d4: f7fe eec4 blx 9060 <aaf1-0xfa0> +#------------------------------------------------------------------------------ +#------ thumb entry to abf2's .plt entry +#------------------------------------------------------------------------------ + a2d8: f7fe bec0 b\.w 905c <aaf1-0xfa4> +#------------------------------------------------------------------------------ +#------ thumb entry to abf2's .plt entry +#------------------------------------------------------------------------------ + a2dc: f43e aebe beq\.w 905c <aaf1-0xfa4> + a2e0: 4c00 ldr r4, \[pc, #0\] ; \(a2e4 <_thumb\+0xb8>\) + a2e2: 4c01 ldr r4, \[pc, #4\] ; \(a2e8 <_thumb\+0xbc>\) +#------------------------------------------------------------------------------ +#------ .got offset for abf2 +#------------------------------------------------------------------------------ + a2e4: 000000a0 \.word 0x000000a0 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for abf2 +#------------------------------------------------------------------------------ + a2e8: 00006db8 \.word 0x00006db8 +#------------------------------------------------------------------------------ +#------ tbf2's .plt entry +#------------------------------------------------------------------------------ + a2ec: f7fe eea4 blx 9038 <aaf1-0xfc8> +#------------------------------------------------------------------------------ +#------ thumb entry to tbf2's .plt entry +#------------------------------------------------------------------------------ + a2f0: f7fe bea0 b\.w 9034 <aaf1-0xfcc> +#------------------------------------------------------------------------------ +#------ thumb entry to tbf2's .plt entry +#------------------------------------------------------------------------------ + a2f4: f43e ae9e beq\.w 9034 <aaf1-0xfcc> + a2f8: 4c00 ldr r4, \[pc, #0\] ; \(a2fc <_thumb\+0xd0>\) + a2fa: 4c01 ldr r4, \[pc, #4\] ; \(a300 <_thumb\+0xd4>\) +#------------------------------------------------------------------------------ +#------ .got offset for tbf2 +#------------------------------------------------------------------------------ + a2fc: 00000080 \.word 0x00000080 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for tbf2 +#------------------------------------------------------------------------------ + a300: 00006d80 \.word 0x00006d80 +#------------------------------------------------------------------------------ +#------ atf3's .iplt entry +#------------------------------------------------------------------------------ + a304: f7fe eee6 blx 90d4 <aaf1-0xf2c> +#------------------------------------------------------------------------------ +#------ thumb entry to atf3's .iplt entry +#------------------------------------------------------------------------------ + a308: f7fe bee2 b\.w 90d0 <aaf1-0xf30> +#------------------------------------------------------------------------------ +#------ thumb entry to atf3's .iplt entry +#------------------------------------------------------------------------------ + a30c: f43e aee0 beq\.w 90d0 <aaf1-0xf30> + a310: 4c00 ldr r4, \[pc, #0\] ; \(a314 <_thumb\+0xe8>\) + a312: 4c01 ldr r4, \[pc, #4\] ; \(a318 <_thumb\+0xec>\) +#------------------------------------------------------------------------------ +#------ GP-relative offset of atf3's .igot.plt entry +#------------------------------------------------------------------------------ + a314: 00000040 \.word 0x00000040 +#------------------------------------------------------------------------------ +#------ PC-relative offset of atf3's .igot.plt entry +#------------------------------------------------------------------------------ + a318: 00006d28 \.word 0x00006d28 +#------------------------------------------------------------------------------ +#------ ttf3's .iplt entry +#------------------------------------------------------------------------------ + a31c: f7fe eeea blx 90f4 <aaf1-0xf0c> +#------------------------------------------------------------------------------ +#------ thumb entry to ttf3's .iplt entry +#------------------------------------------------------------------------------ + a320: f7fe bee6 b\.w 90f0 <aaf1-0xf10> +#------------------------------------------------------------------------------ +#------ thumb entry to ttf3's .iplt entry +#------------------------------------------------------------------------------ + a324: f43e aee4 beq\.w 90f0 <aaf1-0xf10> + a328: 4c00 ldr r4, \[pc, #0\] ; \(a32c <_thumb\+0x100>\) + a32a: 4c01 ldr r4, \[pc, #4\] ; \(a330 <_thumb\+0x104>\) +#------------------------------------------------------------------------------ +#------ GP-relative offset of ttf3's .igot.plt entry +#------------------------------------------------------------------------------ + a32c: 00000048 \.word 0x00000048 +#------------------------------------------------------------------------------ +#------ PC-relative offset of ttf3's .igot.plt entry +#------------------------------------------------------------------------------ + a330: 00006d18 \.word 0x00006d18 +#------------------------------------------------------------------------------ +#------ abf3's .iplt entry +#------------------------------------------------------------------------------ + a334: f7fe eed6 blx 90e4 <aaf1-0xf1c> +#------------------------------------------------------------------------------ +#------ thumb entry to abf3's .iplt entry +#------------------------------------------------------------------------------ + a338: f7fe bed2 b\.w 90e0 <aaf1-0xf20> +#------------------------------------------------------------------------------ +#------ thumb entry to abf3's .iplt entry +#------------------------------------------------------------------------------ + a33c: f43e aed0 beq\.w 90e0 <aaf1-0xf20> + a340: 4c00 ldr r4, \[pc, #0\] ; \(a344 <_thumb\+0x118>\) + a342: 4c01 ldr r4, \[pc, #4\] ; \(a348 <_thumb\+0x11c>\) +#------------------------------------------------------------------------------ +#------ GP-relative offset of abf3's .igot.plt entry +#------------------------------------------------------------------------------ + a344: 00000044 \.word 0x00000044 +#------------------------------------------------------------------------------ +#------ PC-relative offset of abf3's .igot.plt entry +#------------------------------------------------------------------------------ + a348: 00006cfc \.word 0x00006cfc +#------------------------------------------------------------------------------ +#------ tbf3's .iplt entry +#------------------------------------------------------------------------------ + a34c: f7fe eeda blx 9104 <aaf1-0xefc> +#------------------------------------------------------------------------------ +#------ thumb entry to tbf3's .iplt entry +#------------------------------------------------------------------------------ + a350: f7fe bed6 b\.w 9100 <aaf1-0xf00> +#------------------------------------------------------------------------------ +#------ thumb entry to tbf3's .iplt entry +#------------------------------------------------------------------------------ + a354: f43e aed4 beq\.w 9100 <aaf1-0xf00> + a358: 4c00 ldr r4, \[pc, #0\] ; \(a35c <_thumb\+0x130>\) + a35a: 4c01 ldr r4, \[pc, #4\] ; \(a360 <_thumb\+0x134>\) +#------------------------------------------------------------------------------ +#------ GP-relative offset of tbf3's .igot.plt entry +#------------------------------------------------------------------------------ + a35c: 0000004c \.word 0x0000004c +#------------------------------------------------------------------------------ +#------ PC-relative offset of tbf3's .igot.plt entry +#------------------------------------------------------------------------------ + a360: 00006cec \.word 0x00006cec +#------------------------------------------------------------------------------ +#------ atf4's .iplt entry +#------------------------------------------------------------------------------ + a364: f7fe eefa blx 915c <aaf1-0xea4> +#------------------------------------------------------------------------------ +#------ thumb entry to atf4's .iplt entry +#------------------------------------------------------------------------------ + a368: f7fe bef6 b\.w 9158 <aaf1-0xea8> +#------------------------------------------------------------------------------ +#------ thumb entry to atf4's .iplt entry +#------------------------------------------------------------------------------ + a36c: f43e aef4 beq\.w 9158 <aaf1-0xea8> + a370: 4c00 ldr r4, \[pc, #0\] ; \(a374 <_thumb\+0x148>\) + a372: 4c01 ldr r4, \[pc, #4\] ; \(a378 <_thumb\+0x14c>\) +#------------------------------------------------------------------------------ +#------ .got offset for atf4 +#------------------------------------------------------------------------------ + a374: 00000098 \.word 0x00000098 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for atf4 +#------------------------------------------------------------------------------ + a378: 00006d20 \.word 0x00006d20 +#------------------------------------------------------------------------------ +#------ ttf4's .iplt entry +#------------------------------------------------------------------------------ + a37c: f7fe eee0 blx 9140 <aaf1-0xec0> +#------------------------------------------------------------------------------ +#------ thumb entry to ttf4's .iplt entry +#------------------------------------------------------------------------------ + a380: f7fe bedc b\.w 913c <aaf1-0xec4> +#------------------------------------------------------------------------------ +#------ thumb entry to ttf4's .iplt entry +#------------------------------------------------------------------------------ + a384: f43e aeda beq\.w 913c <aaf1-0xec4> + a388: 4c00 ldr r4, \[pc, #0\] ; \(a38c <_thumb\+0x160>\) + a38a: 4c01 ldr r4, \[pc, #4\] ; \(a390 <_thumb\+0x164>\) +#------------------------------------------------------------------------------ +#------ .got offset for ttf4 +#------------------------------------------------------------------------------ + a38c: 00000094 \.word 0x00000094 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for ttf4 +#------------------------------------------------------------------------------ + a390: 00006d04 \.word 0x00006d04 +#------------------------------------------------------------------------------ +#------ abf4's .iplt entry +#------------------------------------------------------------------------------ + a394: f7fe eec4 blx 9120 <aaf1-0xee0> +#------------------------------------------------------------------------------ +#------ thumb entry to abf4's .iplt entry +#------------------------------------------------------------------------------ + a398: f7fe bec0 b\.w 911c <aaf1-0xee4> +#------------------------------------------------------------------------------ +#------ thumb entry to abf4's .iplt entry +#------------------------------------------------------------------------------ + a39c: f43e aebe beq\.w 911c <aaf1-0xee4> + a3a0: 4c00 ldr r4, \[pc, #0\] ; \(a3a4 <_thumb\+0x178>\) + a3a2: 4c01 ldr r4, \[pc, #4\] ; \(a3a8 <_thumb\+0x17c>\) +#------------------------------------------------------------------------------ +#------ .got offset for abf4 +#------------------------------------------------------------------------------ + a3a4: 0000008c \.word 0x0000008c +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for abf4 +#------------------------------------------------------------------------------ + a3a8: 00006ce4 \.word 0x00006ce4 +#------------------------------------------------------------------------------ +#------ tbf4's .iplt entry +#------------------------------------------------------------------------------ + a3ac: f7fe eec0 blx 9130 <aaf1-0xed0> +#------------------------------------------------------------------------------ +#------ thumb entry to tbf4's .iplt entry +#------------------------------------------------------------------------------ + a3b0: f7fe bebc b\.w 912c <aaf1-0xed4> +#------------------------------------------------------------------------------ +#------ thumb entry to tbf4's .iplt entry +#------------------------------------------------------------------------------ + a3b4: f43e aeba beq\.w 912c <aaf1-0xed4> + a3b8: 4c00 ldr r4, \[pc, #0\] ; \(a3bc <_thumb\+0x190>\) + a3ba: 4c01 ldr r4, \[pc, #4\] ; \(a3c0 <_thumb\+0x194>\) +#------------------------------------------------------------------------------ +#------ .got offset for tbf4 +#------------------------------------------------------------------------------ + a3bc: 00000090 \.word 0x00000090 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for tbf4 +#------------------------------------------------------------------------------ + a3c0: 00006cd0 \.word 0x00006cd0 diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-4.gd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-4.gd new file mode 100644 index 0000000..f768c68 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-4.gd @@ -0,0 +1,167 @@ + +.* + +Contents of section \.data: +#------------------------------------------------------------------------------ +#------ 00010000: foo +#------ 00010004: contains aaf1 [R_ARM_IRELATIVE] +#------ 00010008: contains PC-relative offset of aaf1's .iplt entry +#------ 0001000c: contains atf1 [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 10000 44332211 00a00000 6490ffff 04a00000 .* +#------------------------------------------------------------------------------ +#------ 00010010: contains PC-relative offset of atf1's .iplt entry +#------ 00010014: contains abf1 [R_ARM_IRELATIVE] +#------ 00010018: contains PC-relative offset of abf1's .iplt entry +#------ 0001001c: contains taf1 [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 10010 6c90ffff 08a00000 7490ffff 0da00000 .* +#------------------------------------------------------------------------------ +#------ 00010020: contains PC-relative offset of taf1's .iplt entry +#------ 00010024: contains ttf1 [R_ARM_IRELATIVE] +#------ 00010028: contains PC-relative offset of ttf1's .iplt entry +#------ 0001002c: contains tbf1 [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 10020 7890ffff 0fa00000 8090ffff 11a00000 .* +#------------------------------------------------------------------------------ +#------ 00010030: contains PC-relative offset of tbf1's .iplt entry +#------ 00010034: aaf2 [R_ARM_ABS32] +#------ 00010038: aaf2 [R_ARM_REL32] +#------ 0001003c: atf2 [R_ARM_ABS32] +#------------------------------------------------------------------------------ + 10030 8890ffff 00000000 00000000 00000000 .* +#------------------------------------------------------------------------------ +#------ 00010040: atf2 [R_ARM_REL32] +#------ 00010044: abf2 [R_ARM_ABS32] +#------ 00010048: abf2 [R_ARM_REL32] +#------ 0001004c: taf2 [R_ARM_ABS32] +#------------------------------------------------------------------------------ + 10040 00000000 00000000 00000000 00000000 .* +#------------------------------------------------------------------------------ +#------ 00010050: taf2 [R_ARM_REL32] +#------ 00010054: ttf2 [R_ARM_ABS32] +#------ 00010058: ttf2 [R_ARM_REL32] +#------ 0001005c: tbf2 [R_ARM_ABS32] +#------------------------------------------------------------------------------ + 10050 00000000 00000000 00000000 00000000 .* +#------------------------------------------------------------------------------ +#------ 00010060: tbf2 [R_ARM_REL32] +#------ 00010064: contains aaf3 [R_ARM_IRELATIVE] +#------ 00010068: contains PC-relative offset of aaf3's .iplt entry +#------ 0001006c: contains atf3 [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 10060 00000000 28a00000 e490ffff 2ca00000 .* +#------------------------------------------------------------------------------ +#------ 00010070: contains PC-relative offset of atf3's .iplt entry +#------ 00010074: contains abf3 [R_ARM_IRELATIVE] +#------ 00010078: contains PC-relative offset of abf3's .iplt entry +#------ 0001007c: contains taf3 [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 10070 6490ffff 30a00000 6c90ffff 35a00000 .* +#------------------------------------------------------------------------------ +#------ 00010080: contains PC-relative offset of taf3's .iplt entry +#------ 00010084: contains ttf3 [R_ARM_IRELATIVE] +#------ 00010088: contains PC-relative offset of ttf3's .iplt entry +#------ 0001008c: contains tbf3 [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 10080 9090ffff 37a00000 6c90ffff 39a00000 .* +#------------------------------------------------------------------------------ +#------ 00010090: contains PC-relative offset of tbf3's .iplt entry +#------ 00010094: aaf4 [R_ARM_ABS32] +#------ 00010098: contains PC-relative offset of aaf4's .iplt entry +#------ 0001009c: atf4 [R_ARM_ABS32] +#------------------------------------------------------------------------------ + 10090 7490ffff 00000000 2c90ffff 00000000 .* +#------------------------------------------------------------------------------ +#------ 000100a0: contains PC-relative offset of atf4's .iplt entry +#------ 000100a4: abf4 [R_ARM_ABS32] +#------ 000100a8: contains PC-relative offset of abf4's .iplt entry +#------ 000100ac: taf4 [R_ARM_ABS32] +#------------------------------------------------------------------------------ + 100a0 bc90ffff 00000000 7890ffff 00000000 .* +#------------------------------------------------------------------------------ +#------ 000100b0: contains PC-relative offset of taf4's .iplt entry +#------ 000100b4: ttf4 [R_ARM_ABS32] +#------ 000100b8: contains PC-relative offset of ttf4's .iplt entry +#------ 000100bc: tbf4 [R_ARM_ABS32] +#------------------------------------------------------------------------------ + 100b0 b890ffff 00000000 8890ffff 00000000 .* +#------------------------------------------------------------------------------ +#------ 000100c0: contains PC-relative offset of tbf4's .iplt entry +#------------------------------------------------------------------------------ + 100c0 7090ffff .* +Contents of section \.got: +#------------------------------------------------------------------------------ +#------ 00011000: .got.plt +#------ 00011004: reserved .got.plt entry +#------ 00011008: reserved .got.plt entry +#------ 0001100c: atf2's .got.plt entry [R_ARM_JUMP_SLOT] +#------------------------------------------------------------------------------ + 11000 00200100 00000000 00000000 00900000 .* +#------------------------------------------------------------------------------ +#------ 00011010: ttf2's .got.plt entry [R_ARM_JUMP_SLOT] +#------ 00011014: tbf2's .got.plt entry [R_ARM_JUMP_SLOT] +#------ 00011018: taf2's .got.plt entry [R_ARM_JUMP_SLOT] +#------ 0001101c: aaf2's .got.plt entry [R_ARM_JUMP_SLOT] +#------------------------------------------------------------------------------ + 11010 00900000 00900000 00900000 00900000 .* +#------------------------------------------------------------------------------ +#------ 00011020: abf2's .got.plt entry [R_ARM_JUMP_SLOT] +#------ 00011024: aaf1's .igot.plt entry [R_ARM_IRELATIVE] +#------ 00011028: atf1's .igot.plt entry [R_ARM_IRELATIVE] +#------ 0001102c: abf1's .igot.plt entry [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 11020 00900000 00a00000 04a00000 08a00000 .* +#------------------------------------------------------------------------------ +#------ 00011030: taf1's .igot.plt entry [R_ARM_IRELATIVE] +#------ 00011034: ttf1's .igot.plt entry [R_ARM_IRELATIVE] +#------ 00011038: tbf1's .igot.plt entry [R_ARM_IRELATIVE] +#------ 0001103c: aaf4's .igot.plt entry [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 11030 0da00000 0fa00000 11a00000 3ca00000 .* +#------------------------------------------------------------------------------ +#------ 00011040: atf3's .igot.plt entry [R_ARM_IRELATIVE] +#------ 00011044: abf3's .igot.plt entry [R_ARM_IRELATIVE] +#------ 00011048: ttf3's .igot.plt entry [R_ARM_IRELATIVE] +#------ 0001104c: tbf3's .igot.plt entry [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 11040 2ca00000 30a00000 37a00000 39a00000 .* +#------------------------------------------------------------------------------ +#------ 00011050: taf3's .igot.plt entry [R_ARM_IRELATIVE] +#------ 00011054: abf4's .igot.plt entry [R_ARM_IRELATIVE] +#------ 00011058: tbf4's .igot.plt entry [R_ARM_IRELATIVE] +#------ 0001105c: ttf4's .igot.plt entry [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 11050 35a00000 44a00000 4da00000 4ba00000 .* +#------------------------------------------------------------------------------ +#------ 00011060: aaf3's .igot.plt entry [R_ARM_IRELATIVE] +#------ 00011064: atf4's .igot.plt entry [R_ARM_IRELATIVE] +#------ 00011068: taf4's .igot.plt entry [R_ARM_IRELATIVE] +#------ 0001106c: .got entry for foo [R_ARM_RELATIVE] +#------------------------------------------------------------------------------ + 11060 28a00000 40a00000 49a00000 00000100 .* +#------------------------------------------------------------------------------ +#------ 00011070: .got entry for foo [R_ARM_RELATIVE] +#------ 00011074: .got entry for atf2 [R_ARM_GLOB_DAT] +#------ 00011078: .got entry for aaf4 [R_ARM_GLOB_DAT] +#------ 0001107c: .got entry for ttf2 [R_ARM_GLOB_DAT] +#------------------------------------------------------------------------------ + 11070 00000100 00000000 00000000 00000000 .* +#------------------------------------------------------------------------------ +#------ 00011080: .got entry for tbf2 [R_ARM_GLOB_DAT] +#------ 00011084: .got entry for taf2 [R_ARM_GLOB_DAT] +#------ 00011088: .got entry for aaf2 [R_ARM_GLOB_DAT] +#------ 0001108c: .got entry for abf4 [R_ARM_GLOB_DAT] +#------------------------------------------------------------------------------ + 11080 00000000 00000000 00000000 00000000 .* +#------------------------------------------------------------------------------ +#------ 00011090: .got entry for tbf4 [R_ARM_GLOB_DAT] +#------ 00011094: .got entry for ttf4 [R_ARM_GLOB_DAT] +#------ 00011098: .got entry for atf4 [R_ARM_GLOB_DAT] +#------ 0001109c: .got entry for taf4 [R_ARM_GLOB_DAT] +#------------------------------------------------------------------------------ + 11090 00000000 00000000 00000000 00000000 .* +#------------------------------------------------------------------------------ +#------ 000110a0: .got entry for abf2 [R_ARM_GLOB_DAT] +#------------------------------------------------------------------------------ + 110a0 00000000 .* diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-4.rd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-4.rd new file mode 100644 index 0000000..b8079d5 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-4.rd @@ -0,0 +1,74 @@ + +Relocation section '\.rel\.dyn' at offset 0x8000 contains 62 entries: + Offset Info Type Sym\.Value Sym\. Name +0001106c ......17 R_ARM_RELATIVE +00011070 ......17 R_ARM_RELATIVE +00010004 ......a0 R_ARM_IRELATIVE +0001000c ......a0 R_ARM_IRELATIVE +00010014 ......a0 R_ARM_IRELATIVE +0001001c ......a0 R_ARM_IRELATIVE +00010024 ......a0 R_ARM_IRELATIVE +0001002c ......a0 R_ARM_IRELATIVE +00010064 ......a0 R_ARM_IRELATIVE +0001006c ......a0 R_ARM_IRELATIVE +00010074 ......a0 R_ARM_IRELATIVE +0001007c ......a0 R_ARM_IRELATIVE +00010084 ......a0 R_ARM_IRELATIVE +0001008c ......a0 R_ARM_IRELATIVE +00011024 ......a0 R_ARM_IRELATIVE +00011028 ......a0 R_ARM_IRELATIVE +0001102c ......a0 R_ARM_IRELATIVE +00011030 ......a0 R_ARM_IRELATIVE +00011034 ......a0 R_ARM_IRELATIVE +00011038 ......a0 R_ARM_IRELATIVE +0001103c ......a0 R_ARM_IRELATIVE +00011040 ......a0 R_ARM_IRELATIVE +00011044 ......a0 R_ARM_IRELATIVE +00011048 ......a0 R_ARM_IRELATIVE +0001104c ......a0 R_ARM_IRELATIVE +00011050 ......a0 R_ARM_IRELATIVE +00011054 ......a0 R_ARM_IRELATIVE +00011058 ......a0 R_ARM_IRELATIVE +0001105c ......a0 R_ARM_IRELATIVE +00011060 ......a0 R_ARM_IRELATIVE +00011064 ......a0 R_ARM_IRELATIVE +00011068 ......a0 R_ARM_IRELATIVE +00010034 ......02 R_ARM_ABS32 aaf2\(\) aaf2 +00010038 ......03 R_ARM_REL32 aaf2\(\) aaf2 +00011088 ......15 R_ARM_GLOB_DAT aaf2\(\) aaf2 +0001003c ......02 R_ARM_ABS32 atf2\(\) atf2 +00010040 ......03 R_ARM_REL32 atf2\(\) atf2 +00011074 ......15 R_ARM_GLOB_DAT atf2\(\) atf2 +00010044 ......02 R_ARM_ABS32 abf2\(\) abf2 +00010048 ......03 R_ARM_REL32 abf2\(\) abf2 +000110a0 ......15 R_ARM_GLOB_DAT abf2\(\) abf2 +0001004c ......02 R_ARM_ABS32 taf2\(\) taf2 +00010050 ......03 R_ARM_REL32 taf2\(\) taf2 +00011084 ......15 R_ARM_GLOB_DAT taf2\(\) taf2 +00010054 ......02 R_ARM_ABS32 ttf2\(\) ttf2 +00010058 ......03 R_ARM_REL32 ttf2\(\) ttf2 +0001107c ......15 R_ARM_GLOB_DAT ttf2\(\) ttf2 +0001005c ......02 R_ARM_ABS32 tbf2\(\) tbf2 +00010060 ......03 R_ARM_REL32 tbf2\(\) tbf2 +00011080 ......15 R_ARM_GLOB_DAT tbf2\(\) tbf2 +00010094 ......02 R_ARM_ABS32 aaf4\(\) aaf4 +00011078 ......15 R_ARM_GLOB_DAT aaf4\(\) aaf4 +0001009c ......02 R_ARM_ABS32 atf4\(\) atf4 +00011098 ......15 R_ARM_GLOB_DAT atf4\(\) atf4 +000100a4 ......02 R_ARM_ABS32 abf4\(\) abf4 +0001108c ......15 R_ARM_GLOB_DAT abf4\(\) abf4 +000100ac ......02 R_ARM_ABS32 taf4\(\) taf4 +0001109c ......15 R_ARM_GLOB_DAT taf4\(\) taf4 +000100b4 ......02 R_ARM_ABS32 ttf4\(\) ttf4 +00011094 ......15 R_ARM_GLOB_DAT ttf4\(\) ttf4 +000100bc ......02 R_ARM_ABS32 tbf4\(\) tbf4 +00011090 ......15 R_ARM_GLOB_DAT tbf4\(\) tbf4 + +Relocation section '\.rel\.plt' at offset 0x81f0 contains 6 entries: + Offset Info Type Sym\.Value Sym\. Name +0001100c ......16 R_ARM_JUMP_SLOT atf2\(\) atf2 +00011010 ......16 R_ARM_JUMP_SLOT ttf2\(\) ttf2 +00011014 ......16 R_ARM_JUMP_SLOT tbf2\(\) tbf2 +00011018 ......16 R_ARM_JUMP_SLOT taf2\(\) taf2 +0001101c ......16 R_ARM_JUMP_SLOT aaf2\(\) aaf2 +00011020 ......16 R_ARM_JUMP_SLOT abf2\(\) abf2 diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-4.s b/binutils-2.24/ld/testsuite/ld-arm/ifunc-4.s new file mode 100644 index 0000000..7f72c8c --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-4.s @@ -0,0 +1,95 @@ + .syntax unified + .arch armv6t2 + + .macro define,name,type + .type \name,%gnu_indirect_function + \type +\name: + mov pc,lr + .size \name,.-\name + .endm + + .macro define2,name + define aa\name,.arm + define at\name,.arm + define ab\name,.arm + define ta\name,.thumb_func + define tt\name,.thumb_func + define tb\name,.thumb_func + .endm + + .macro test_relocs,name,width + bl \name(PLT) + b\width \name + beq\width \name + ldr r4,1f + ldr r4,2f +1: + .word \name(GOT) +2: + .word \name(GOT_PREL) + .endm + + .macro test_relocs2,name,type,width + test_relocs a\type\name,\width + test_relocs t\type\name,\width + test_relocs ab\name,\width + test_relocs tb\name,\width + .endm + + .macro diff,name + .word \name + .word \name-. + .endm + + .macro alldirs,doit,name + \doit aa\name + \doit at\name + \doit ab\name + \doit ta\name + \doit tt\name + \doit tb\name + .endm + + define2 f1 + define2 f2 + define2 f3 + define2 f4 + + alldirs .globl,f2 + + alldirs .globl,f3 + alldirs .hidden,f3 + + alldirs .globl,f4 + alldirs .protected,f4 + + .globl arm + .type arm,%function + .arm +arm: + test_relocs foo + test_relocs2 f1,a, + test_relocs2 f2,a, + test_relocs2 f3,a, + test_relocs2 f4,a, + .size arm,.-arm + + .globl _thumb + .type _thumb,%function + .thumb_func +_thumb: + test_relocs foo + test_relocs2 f1,t,.w + test_relocs2 f2,t,.w + test_relocs2 f3,t,.w + test_relocs2 f4,t,.w + .size _thumb,.-_thumb + + .data +foo: + .word 0x11223344 + alldirs diff,f1 + alldirs diff,f2 + alldirs diff,f3 + alldirs diff,f4 diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-5.dd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-5.dd new file mode 100644 index 0000000..b0bf597 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-5.dd @@ -0,0 +1,91 @@ + +.* + + +Disassembly of section \.iplt: + +00009000 <\.iplt>: +#------------------------------------------------------------------------------ +#------ f1's .iplt entry +#------------------------------------------------------------------------------ + 9000: e28fc600 add ip, pc, #0, 12 + 9004: e28cca08 add ip, ip, #8, 20 ; 0x8000 + 9008: e5bcf004 ldr pc, \[ip, #4\]! +#------------------------------------------------------------------------------ +#------ f3's .iplt entry +#------------------------------------------------------------------------------ + 900c: e28fc600 add ip, pc, #0, 12 + 9010: e28cca07 add ip, ip, #28672 ; 0x7000 + 9014: e5bcfffc ldr pc, \[ip, #4092\]! ; 0xffc +#------------------------------------------------------------------------------ +#------ f2's .iplt entry +#------------------------------------------------------------------------------ + 9018: e28fc600 add ip, pc, #0, 12 + 901c: e28cca07 add ip, ip, #28672 ; 0x7000 + 9020: e5bcfff4 ldr pc, \[ip, #4084\]! ; 0xff4 + +Disassembly of section \.text: + +0000a000 <f1>: + a000: e1a0f00e mov pc, lr + +0000a004 <f2>: + a004: e1a0f00e mov pc, lr + +0000a008 <f3>: + a008: e1a0f00e mov pc, lr + +0000a00c <_start>: + a00c: eb0017fb bl 10000 <foo> + a010: e59f4000 ldr r4, \[pc\] ; a018 <_start\+0xc> + a014: e59f4000 ldr r4, \[pc\] ; a01c <_start\+0x10> +#------------------------------------------------------------------------------ +#------ .got offset for foo +#------------------------------------------------------------------------------ + a018: 0000001c \.word 0x0000001c +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for foo +#------------------------------------------------------------------------------ + a01c: 00006ffc \.word 0x00006ffc +#------------------------------------------------------------------------------ +#------ f1's .iplt entry +#------------------------------------------------------------------------------ + a020: ebfffbf6 bl 9000 <__irel_end\+0xfe8> + a024: e59f4000 ldr r4, \[pc\] ; a02c <_start\+0x20> + a028: e59f4000 ldr r4, \[pc\] ; a030 <_start\+0x24> +#------------------------------------------------------------------------------ +#------ GP-relative offset of f1's .igot.plt entry +#------------------------------------------------------------------------------ + a02c: 0000000c \.word 0x0000000c +#------------------------------------------------------------------------------ +#------ PC-relative offset of f1's .igot.plt entry +#------------------------------------------------------------------------------ + a030: 00006fdc \.word 0x00006fdc +#------------------------------------------------------------------------------ +#------ f2's .iplt entry +#------------------------------------------------------------------------------ + a034: ebfffbf7 bl 9018 <__irel_end\+0x1000> + a038: e59f4000 ldr r4, \[pc\] ; a040 <_start\+0x34> + a03c: e59f4000 ldr r4, \[pc\] ; a044 <_start\+0x38> +#------------------------------------------------------------------------------ +#------ GP-relative offset of f2's .igot.plt entry +#------------------------------------------------------------------------------ + a040: 00000014 \.word 0x00000014 +#------------------------------------------------------------------------------ +#------ PC-relative offset of f2's .igot.plt entry +#------------------------------------------------------------------------------ + a044: 00006fd0 \.word 0x00006fd0 +#------------------------------------------------------------------------------ +#------ f3's .iplt entry +#------------------------------------------------------------------------------ + a048: ebfffbef bl 900c <__irel_end\+0xff4> + a04c: e59f4000 ldr r4, \[pc\] ; a054 <_start\+0x48> + a050: e59f4000 ldr r4, \[pc\] ; a058 <_start\+0x4c> +#------------------------------------------------------------------------------ +#------ GP-relative offset of f3's .igot.plt entry +#------------------------------------------------------------------------------ + a054: 00000010 \.word 0x00000010 +#------------------------------------------------------------------------------ +#------ PC-relative offset of f3's .igot.plt entry +#------------------------------------------------------------------------------ + a058: 00006fb8 \.word 0x00006fb8 diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-5.gd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-5.gd new file mode 100644 index 0000000..8cd69df --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-5.gd @@ -0,0 +1,23 @@ + +.* + +Contents of section \.data: +#------------------------------------------------------------------------------ +#------ 00010000: foo +#------------------------------------------------------------------------------ + 10000 44332211 00800000 18800000 .* +Contents of section \.got: +#------------------------------------------------------------------------------ +#------ 00011000: .got.plt +#------ 00011004: reserved .got.plt entry +#------ 00011008: reserved .got.plt entry +#------ 0001100c: f1's .igot.plt entry [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 11000 00000000 00000000 00000000 00a00000 .* +#------------------------------------------------------------------------------ +#------ 00011010: f3's .igot.plt entry [R_ARM_IRELATIVE] +#------ 00011014: f2's .igot.plt entry [R_ARM_IRELATIVE] +#------ 00011018: .got entry for foo +#------ 0001101c: .got entry for foo +#------------------------------------------------------------------------------ + 11010 08a00000 04a00000 00000100 00000100 .* diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-5.rd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-5.rd new file mode 100644 index 0000000..2644123 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-5.rd @@ -0,0 +1,8 @@ + +There is no dynamic section in this file\. + +Relocation section '\.rel\.dyn' at offset 0x8000 contains 3 entries: + Offset Info Type Sym\.Value Sym\. Name +0001100c ......a0 R_ARM_IRELATIVE +00011014 ......a0 R_ARM_IRELATIVE +00011010 ......a0 R_ARM_IRELATIVE diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-5.s b/binutils-2.24/ld/testsuite/ld-arm/ifunc-5.s new file mode 100644 index 0000000..9074c92 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-5.s @@ -0,0 +1,39 @@ + .macro define,name + .type \name,%gnu_indirect_function +\name: + mov pc,lr + .size \name,.-\name + .endm + + .macro test_relocs,name + bl \name + ldr r4,1f + ldr r4,2f +1: + .word \name(GOT) +2: + .word \name(GOT_PREL) + .endm + + .global f2 + + .global f3 + .hidden f3 + + define f1 + define f2 + define f3 + + .globl _start +_start: + test_relocs foo + test_relocs f1 + test_relocs f2 + test_relocs f3 + .size _start,.-_start + + .data +foo: + .word 0x11223344 + .word __irel_start + .word __irel_end diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-6.dd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-6.dd new file mode 100644 index 0000000..3c9cbd5 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-6.dd @@ -0,0 +1,175 @@ + +.* + + +Disassembly of section \.iplt: + +00009000 <\.iplt>: +#------------------------------------------------------------------------------ +#------ thumb entry to f3's .iplt entry +#------------------------------------------------------------------------------ + 9000: 4778 bx pc + 9002: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ f3's .iplt entry +#------------------------------------------------------------------------------ + 9004: e28fc600 add ip, pc, #0, 12 + 9008: e28cca08 add ip, ip, #8, 20 ; 0x8000 + 900c: e5bcf000 ldr pc, \[ip, #0\]! +#------------------------------------------------------------------------------ +#------ f2's .iplt entry +#------------------------------------------------------------------------------ + 9010: e28fc600 add ip, pc, #0, 12 + 9014: e28cca07 add ip, ip, #28672 ; 0x7000 + 9018: e5bcfff8 ldr pc, \[ip, #4088\]! ; 0xff8 +#------------------------------------------------------------------------------ +#------ thumb entry to f4's .iplt entry +#------------------------------------------------------------------------------ + 901c: 4778 bx pc + 901e: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ f4's .iplt entry +#------------------------------------------------------------------------------ + 9020: e28fc600 add ip, pc, #0, 12 + 9024: e28cca07 add ip, ip, #28672 ; 0x7000 + 9028: e5bcffec ldr pc, \[ip, #4076\]! ; 0xfec +#------------------------------------------------------------------------------ +#------ f1's .iplt entry +#------------------------------------------------------------------------------ + 902c: e28fc600 add ip, pc, #0, 12 + 9030: e28cca07 add ip, ip, #28672 ; 0x7000 + 9034: e5bcffe4 ldr pc, \[ip, #4068\]! ; 0xfe4 + +Disassembly of section \.text: + +0000a000 <f1>: + a000: e1a0f00e mov pc, lr + +0000a004 <f2>: + a004: 46f7 mov pc, lr + \.\.\. + +0000a008 <f3>: + a008: e1a0f00e mov pc, lr + +0000a00c <f4>: + a00c: 46f7 mov pc, lr + \.\.\. + +0000a010 <_start>: + a010: eb0017fa bl 10000 <foo> + a014: ea0017f9 b 10000 <foo> + a018: 0a0017f8 beq 10000 <foo> + a01c: e59f4000 ldr r4, \[pc\] ; a024 <_start\+0x14> + a020: e59f4000 ldr r4, \[pc\] ; a028 <_start\+0x18> +#------------------------------------------------------------------------------ +#------ .got offset for foo +#------------------------------------------------------------------------------ + a024: 00000020 \.word 0x00000020 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for foo +#------------------------------------------------------------------------------ + a028: 00006ff4 \.word 0x00006ff4 +#------------------------------------------------------------------------------ +#------ f1's .iplt entry +#------------------------------------------------------------------------------ + a02c: ebfffbfe bl 902c <__irel_end\+0x100c> +#------------------------------------------------------------------------------ +#------ f1's .iplt entry +#------------------------------------------------------------------------------ + a030: eafffbfd b 902c <__irel_end\+0x100c> +#------------------------------------------------------------------------------ +#------ f1's .iplt entry +#------------------------------------------------------------------------------ + a034: 0afffbfc beq 902c <__irel_end\+0x100c> + a038: e59f4000 ldr r4, \[pc\] ; a040 <_start\+0x30> + a03c: e59f4000 ldr r4, \[pc\] ; a044 <_start\+0x34> +#------------------------------------------------------------------------------ +#------ GP-relative offset of f1's .igot.plt entry +#------------------------------------------------------------------------------ + a040: 00000018 \.word 0x00000018 +#------------------------------------------------------------------------------ +#------ PC-relative offset of f1's .igot.plt entry +#------------------------------------------------------------------------------ + a044: 00006fd4 \.word 0x00006fd4 +#------------------------------------------------------------------------------ +#------ f2's .iplt entry +#------------------------------------------------------------------------------ + a048: ebfffbf0 bl 9010 <__irel_end\+0xff0> +#------------------------------------------------------------------------------ +#------ f2's .iplt entry +#------------------------------------------------------------------------------ + a04c: eafffbef b 9010 <__irel_end\+0xff0> +#------------------------------------------------------------------------------ +#------ f2's .iplt entry +#------------------------------------------------------------------------------ + a050: 0afffbee beq 9010 <__irel_end\+0xff0> + a054: e59f4000 ldr r4, \[pc\] ; a05c <_start\+0x4c> + a058: e59f4000 ldr r4, \[pc\] ; a060 <_start\+0x50> +#------------------------------------------------------------------------------ +#------ GP-relative offset of f2's .igot.plt entry +#------------------------------------------------------------------------------ + a05c: 00000010 \.word 0x00000010 +#------------------------------------------------------------------------------ +#------ PC-relative offset of f2's .igot.plt entry +#------------------------------------------------------------------------------ + a060: 00006fb0 \.word 0x00006fb0 + +0000a064 <_thumb>: + a064: f005 ffcc bl 10000 <foo> + a068: f005 bfca b\.w 10000 <foo> + a06c: f005 87c8 beq\.w 10000 <foo> + a070: 4c00 ldr r4, \[pc, #0\] ; \(a074 <_thumb\+0x10>\) + a072: 4c01 ldr r4, \[pc, #4\] ; \(a078 <_thumb\+0x14>\) +#------------------------------------------------------------------------------ +#------ .got offset for foo +#------------------------------------------------------------------------------ + a074: 00000020 \.word 0x00000020 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for foo +#------------------------------------------------------------------------------ + a078: 00006fa4 \.word 0x00006fa4 +#------------------------------------------------------------------------------ +#------ f3's .iplt entry +#------------------------------------------------------------------------------ + a07c: f7fe efc2 blx 9004 <__irel_end\+0xfe4> +#------------------------------------------------------------------------------ +#------ thumb entry to f3's .iplt entry +#------------------------------------------------------------------------------ + a080: f7fe bfbe b\.w 9000 <__irel_end\+0xfe0> +#------------------------------------------------------------------------------ +#------ thumb entry to f3's .iplt entry +#------------------------------------------------------------------------------ + a084: f43e afbc beq\.w 9000 <__irel_end\+0xfe0> + a088: 4c00 ldr r4, \[pc, #0\] ; \(a08c <_thumb\+0x28>\) + a08a: 4c01 ldr r4, \[pc, #4\] ; \(a090 <_thumb\+0x2c>\) +#------------------------------------------------------------------------------ +#------ GP-relative offset of f3's .igot.plt entry +#------------------------------------------------------------------------------ + a08c: 0000000c \.word 0x0000000c +#------------------------------------------------------------------------------ +#------ PC-relative offset of f3's .igot.plt entry +#------------------------------------------------------------------------------ + a090: 00006f7c \.word 0x00006f7c +#------------------------------------------------------------------------------ +#------ f4's .iplt entry +#------------------------------------------------------------------------------ + a094: f7fe efc4 blx 9020 <__irel_end\+0x1000> +#------------------------------------------------------------------------------ +#------ thumb entry to f4's .iplt entry +#------------------------------------------------------------------------------ + a098: f7fe bfc0 b\.w 901c <__irel_end\+0xffc> +#------------------------------------------------------------------------------ +#------ thumb entry to f4's .iplt entry +#------------------------------------------------------------------------------ + a09c: f43e afbe beq\.w 901c <__irel_end\+0xffc> + a0a0: 4c00 ldr r4, \[pc, #0\] ; \(a0a4 <_thumb\+0x40>\) + a0a2: 4c01 ldr r4, \[pc, #4\] ; \(a0a8 <_thumb\+0x44>\) +#------------------------------------------------------------------------------ +#------ GP-relative offset of f4's .igot.plt entry +#------------------------------------------------------------------------------ + a0a4: 00000014 \.word 0x00000014 +#------------------------------------------------------------------------------ +#------ PC-relative offset of f4's .igot.plt entry +#------------------------------------------------------------------------------ + a0a8: 00006f6c \.word 0x00006f6c diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-6.gd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-6.gd new file mode 100644 index 0000000..45fd914 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-6.gd @@ -0,0 +1,27 @@ + +.* + +Contents of section \.data: +#------------------------------------------------------------------------------ +#------ 00010000: foo +#------------------------------------------------------------------------------ + 10000 44332211 00800000 20800000 .* +Contents of section \.got: +#------------------------------------------------------------------------------ +#------ 00011000: .got.plt +#------ 00011004: reserved .got.plt entry +#------ 00011008: reserved .got.plt entry +#------ 0001100c: f3's .igot.plt entry [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 11000 00000000 00000000 00000000 08a00000 .* +#------------------------------------------------------------------------------ +#------ 00011010: f2's .igot.plt entry [R_ARM_IRELATIVE] +#------ 00011014: f4's .igot.plt entry [R_ARM_IRELATIVE] +#------ 00011018: f1's .igot.plt entry [R_ARM_IRELATIVE] +#------ 0001101c: .got entry for foo +#------------------------------------------------------------------------------ + 11010 05a00000 0da00000 00a00000 00000100 .* +#------------------------------------------------------------------------------ +#------ 00011020: .got entry for foo +#------------------------------------------------------------------------------ + 11020 00000100 .* diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-6.rd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-6.rd new file mode 100644 index 0000000..04c18a9 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-6.rd @@ -0,0 +1,9 @@ + +There is no dynamic section in this file\. + +Relocation section '\.rel\.dyn' at offset 0x8000 contains 4 entries: + Offset Info Type Sym\.Value Sym\. Name +00011018 ......a0 R_ARM_IRELATIVE +00011010 ......a0 R_ARM_IRELATIVE +0001100c ......a0 R_ARM_IRELATIVE +00011014 ......a0 R_ARM_IRELATIVE diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-6.s b/binutils-2.24/ld/testsuite/ld-arm/ifunc-6.s new file mode 100644 index 0000000..4596fa3 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-6.s @@ -0,0 +1,59 @@ + .syntax unified + .arch armv6t2 + + .macro define,name,type + .type \name,%gnu_indirect_function + \type +\name: + mov pc,lr + .size \name,.-\name + .endm + + .macro test_relocs,name,width + bl\width \name + b\width \name + beq\width \name + ldr r4,1f + ldr r4,2f +1: + .word \name(GOT) +2: + .word \name(GOT_PREL) + .endm + + .global f1 + .global f2 + + .global f3 + .global f4 + .hidden f3 + .hidden f4 + + define f1,.arm + define f2,.thumb_func + define f3,.arm + define f4,.thumb_func + + .globl _start + .type _start,%function + .arm +_start: + test_relocs foo + test_relocs f1, + test_relocs f2, + .size _start,.-_start + + .globl _thumb + .type _thumb,%function + .thumb_func +_thumb: + test_relocs foo + test_relocs f3,.w + test_relocs f4,.w + .size _thumb,.-_thumb + + .data +foo: + .word 0x11223344 + .word __irel_start + .word __irel_end diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-7.dd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-7.dd new file mode 100644 index 0000000..e9a9681 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-7.dd @@ -0,0 +1,120 @@ + +.* + + +Disassembly of section \.plt: + +00009000 <\.plt>: + 9000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) + 9004: e59fe004 ldr lr, \[pc, #4\] ; 9010 <f1-0xff0> + 9008: e08fe00e add lr, pc, lr + 900c: e5bef008 ldr pc, \[lr, #8\]! +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got.plt +#------------------------------------------------------------------------------ + 9010: 00007ff0 \.word 0x00007ff0 +#------------------------------------------------------------------------------ +#------ f2's .plt entry +#------------------------------------------------------------------------------ + 9014: e28fc600 add ip, pc, #0, 12 + 9018: e28cca07 add ip, ip, #28672 ; 0x7000 + 901c: e5bcfff0 ldr pc, \[ip, #4080\]! ; 0xff0 +#------------------------------------------------------------------------------ +#------ f4's .plt entry +#------------------------------------------------------------------------------ + 9020: e28fc600 add ip, pc, #0, 12 + 9024: e28cca07 add ip, ip, #28672 ; 0x7000 + 9028: e5bcffe8 ldr pc, \[ip, #4072\]! ; 0xfe8 + +Disassembly of section \.iplt: + +0000902c <\.iplt>: +#------------------------------------------------------------------------------ +#------ f1's .iplt entry +#------------------------------------------------------------------------------ + 902c: e28fc600 add ip, pc, #0, 12 + 9030: e28cca07 add ip, ip, #28672 ; 0x7000 + 9034: e5bcffe0 ldr pc, \[ip, #4064\]! ; 0xfe0 +#------------------------------------------------------------------------------ +#------ f3's .iplt entry +#------------------------------------------------------------------------------ + 9038: e28fc600 add ip, pc, #0, 12 + 903c: e28cca07 add ip, ip, #28672 ; 0x7000 + 9040: e5bcffd8 ldr pc, \[ip, #4056\]! ; 0xfd8 + +Disassembly of section \.text: + +0000a000 <f1>: + a000: e1a0f00e mov pc, lr + +0000a004 <f3>: + a004: e1a0f00e mov pc, lr + +0000a008 <arm>: + a008: eb0017fc bl 10000 <foo> + a00c: e59f4000 ldr r4, \[pc\] ; a014 <arm\+0xc> + a010: e59f4000 ldr r4, \[pc\] ; a018 <arm\+0x10> +#------------------------------------------------------------------------------ +#------ .got offset for foo +#------------------------------------------------------------------------------ + a014: 00000020 \.word 0x00000020 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for foo +#------------------------------------------------------------------------------ + a018: 00007004 \.word 0x00007004 +#------------------------------------------------------------------------------ +#------ f1's .iplt entry +#------------------------------------------------------------------------------ + a01c: ebfffc02 bl 902c <f1-0xfd4> + a020: e59f4000 ldr r4, \[pc\] ; a028 <arm\+0x20> + a024: e59f4000 ldr r4, \[pc\] ; a02c <arm\+0x24> +#------------------------------------------------------------------------------ +#------ GP-relative offset of f1's .igot.plt entry +#------------------------------------------------------------------------------ + a028: 00000014 \.word 0x00000014 +#------------------------------------------------------------------------------ +#------ PC-relative offset of f1's .igot.plt entry +#------------------------------------------------------------------------------ + a02c: 00006fe8 \.word 0x00006fe8 +#------------------------------------------------------------------------------ +#------ f2's .plt entry +#------------------------------------------------------------------------------ + a030: ebfffbf7 bl 9014 <f1-0xfec> + a034: e59f4000 ldr r4, \[pc\] ; a03c <arm\+0x34> + a038: e59f4000 ldr r4, \[pc\] ; a040 <arm\+0x38> +#------------------------------------------------------------------------------ +#------ .got offset for f2 +#------------------------------------------------------------------------------ + a03c: 00000024 \.word 0x00000024 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for f2 +#------------------------------------------------------------------------------ + a040: 00006fe4 \.word 0x00006fe4 +#------------------------------------------------------------------------------ +#------ f3's .iplt entry +#------------------------------------------------------------------------------ + a044: ebfffbfb bl 9038 <f1-0xfc8> + a048: e59f4000 ldr r4, \[pc\] ; a050 <arm\+0x48> + a04c: e59f4000 ldr r4, \[pc\] ; a054 <arm\+0x4c> +#------------------------------------------------------------------------------ +#------ GP-relative offset of f3's .igot.plt entry +#------------------------------------------------------------------------------ + a050: 00000018 \.word 0x00000018 +#------------------------------------------------------------------------------ +#------ PC-relative offset of f3's .igot.plt entry +#------------------------------------------------------------------------------ + a054: 00006fc4 \.word 0x00006fc4 +#------------------------------------------------------------------------------ +#------ f4's .plt entry +#------------------------------------------------------------------------------ + a058: ebfffbf0 bl 9020 <f1-0xfe0> + a05c: e59f4000 ldr r4, \[pc\] ; a064 <arm\+0x5c> + a060: e59f4000 ldr r4, \[pc\] ; a068 <arm\+0x60> +#------------------------------------------------------------------------------ +#------ .got offset for f4 +#------------------------------------------------------------------------------ + a064: 00000028 \.word 0x00000028 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for f4 +#------------------------------------------------------------------------------ + a068: 00006fc0 \.word 0x00006fc0 diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-7.gd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-7.gd new file mode 100644 index 0000000..a116aaf --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-7.gd @@ -0,0 +1,45 @@ + +.* + +Contents of section \.data: +#------------------------------------------------------------------------------ +#------ 00010000: foo +#------ 00010004: contains foo [R_ARM_RELATIVE] +#------ 00010008: contains PC-relative offset of foo +#------ 0001000c: contains f1 [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 10000 44332211 00000100 f8ffffff 00a00000 .* +#------------------------------------------------------------------------------ +#------ 00010010: contains PC-relative offset of f1's .iplt entry +#------ 00010014: f2 [R_ARM_ABS32] +#------ 00010018: f2 [R_ARM_REL32] +#------ 0001001c: contains f3 [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 10010 1c90ffff 00000000 00000000 04a00000 .* +#------------------------------------------------------------------------------ +#------ 00010020: contains PC-relative offset of f3's .iplt entry +#------ 00010024: f4 [R_ARM_ABS32] +#------ 00010028: f4 [R_ARM_REL32] +#------------------------------------------------------------------------------ + 10020 1890ffff 00000000 00000000 .* +Contents of section \.got: +#------------------------------------------------------------------------------ +#------ 00011000: .got.plt +#------ 00011004: reserved .got.plt entry +#------ 00011008: reserved .got.plt entry +#------ 0001100c: f2's .got.plt entry [R_ARM_JUMP_SLOT] +#------------------------------------------------------------------------------ + 11000 00200100 00000000 00000000 00900000 .* +#------------------------------------------------------------------------------ +#------ 00011010: f4's .got.plt entry [R_ARM_JUMP_SLOT] +#------ 00011014: f1's .igot.plt entry [R_ARM_IRELATIVE] +#------ 00011018: f3's .igot.plt entry [R_ARM_IRELATIVE] +#------ 0001101c: .got entry for foo [R_ARM_RELATIVE] +#------------------------------------------------------------------------------ + 11010 00900000 00a00000 04a00000 00000100 .* +#------------------------------------------------------------------------------ +#------ 00011020: .got entry for foo [R_ARM_RELATIVE] +#------ 00011024: .got entry for f2 [R_ARM_GLOB_DAT] +#------ 00011028: .got entry for f4 [R_ARM_GLOB_DAT] +#------------------------------------------------------------------------------ + 11020 00000100 00000000 00000000 .* diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-7.rd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-7.rd new file mode 100644 index 0000000..a29b184 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-7.rd @@ -0,0 +1,21 @@ + +Relocation section '\.rel\.dyn' at offset 0x8000 contains 13 entries: + Offset Info Type Sym\.Value Sym\. Name +00010004 ......17 R_ARM_RELATIVE +0001101c ......17 R_ARM_RELATIVE +00011020 ......17 R_ARM_RELATIVE +0001000c ......a0 R_ARM_IRELATIVE +0001001c ......a0 R_ARM_IRELATIVE +00011014 ......a0 R_ARM_IRELATIVE +00011018 ......a0 R_ARM_IRELATIVE +00010014 ......02 R_ARM_ABS32 00000000 f2 +00010018 ......03 R_ARM_REL32 00000000 f2 +00011024 ......15 R_ARM_GLOB_DAT 00000000 f2 +00010024 ......02 R_ARM_ABS32 00000000 f4 +00010028 ......03 R_ARM_REL32 00000000 f4 +00011028 ......15 R_ARM_GLOB_DAT 00000000 f4 + +Relocation section '\.rel\.plt' at offset 0x8068 contains 2 entries: + Offset Info Type Sym\.Value Sym\. Name +0001100c ......16 R_ARM_JUMP_SLOT 00000000 f2 +00011010 ......16 R_ARM_JUMP_SLOT 00000000 f4 diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-7.s b/binutils-2.24/ld/testsuite/ld-arm/ifunc-7.s new file mode 100644 index 0000000..85ffb68 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-7.s @@ -0,0 +1,42 @@ + .macro define,name + .text + .type \name,%gnu_indirect_function +\name: + mov pc,lr + .size \name,.-\name + .endm + + .macro test_relocs,name + bl \name(PLT) + ldr r4,1f + ldr r4,2f +1: + .word \name(GOT) +2: + .word \name(GOT_PREL) + + .data + .word \name + .word \name - . + .text + .endm + + .globl f3 + .hidden f3 + + define f1 + define f3 + + .data +foo: + .word 0x11223344 + + .text + .globl arm +arm: + test_relocs foo + test_relocs f1 + test_relocs f2 + test_relocs f3 + test_relocs f4 + .size arm,.-arm diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-8.dd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-8.dd new file mode 100644 index 0000000..5b255e2 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-8.dd @@ -0,0 +1,1017 @@ + +.* + + +Disassembly of section \.plt: + +00009000 <\.plt>: + 9000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) + 9004: e59fe004 ldr lr, \[pc, #4\] ; 9010 <aaf1-0xff0> + 9008: e08fe00e add lr, pc, lr + 900c: e5bef008 ldr pc, \[lr, #8\]! +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got.plt +#------------------------------------------------------------------------------ + 9010: 00007ff0 \.word 0x00007ff0 +#------------------------------------------------------------------------------ +#------ thumb entry to atf2's .plt entry +#------------------------------------------------------------------------------ + 9014: 4778 bx pc + 9016: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ atf2's .plt entry +#------------------------------------------------------------------------------ + 9018: e28fc600 add ip, pc, #0, 12 + 901c: e28cca07 add ip, ip, #28672 ; 0x7000 + 9020: e5bcffec ldr pc, \[ip, #4076\]! ; 0xfec +#------------------------------------------------------------------------------ +#------ aaf4's .plt entry +#------------------------------------------------------------------------------ + 9024: e28fc600 add ip, pc, #0, 12 + 9028: e28cca07 add ip, ip, #28672 ; 0x7000 + 902c: e5bcffe4 ldr pc, \[ip, #4068\]! ; 0xfe4 +#------------------------------------------------------------------------------ +#------ thumb entry to ttf2's .plt entry +#------------------------------------------------------------------------------ + 9030: 4778 bx pc + 9032: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ ttf2's .plt entry +#------------------------------------------------------------------------------ + 9034: e28fc600 add ip, pc, #0, 12 + 9038: e28cca07 add ip, ip, #28672 ; 0x7000 + 903c: e5bcffd8 ldr pc, \[ip, #4056\]! ; 0xfd8 +#------------------------------------------------------------------------------ +#------ thumb entry to tbf2's .plt entry +#------------------------------------------------------------------------------ + 9040: 4778 bx pc + 9042: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ tbf2's .plt entry +#------------------------------------------------------------------------------ + 9044: e28fc600 add ip, pc, #0, 12 + 9048: e28cca07 add ip, ip, #28672 ; 0x7000 + 904c: e5bcffcc ldr pc, \[ip, #4044\]! ; 0xfcc +#------------------------------------------------------------------------------ +#------ taf2's .plt entry +#------------------------------------------------------------------------------ + 9050: e28fc600 add ip, pc, #0, 12 + 9054: e28cca07 add ip, ip, #28672 ; 0x7000 + 9058: e5bcffc4 ldr pc, \[ip, #4036\]! ; 0xfc4 +#------------------------------------------------------------------------------ +#------ aaf2's .plt entry +#------------------------------------------------------------------------------ + 905c: e28fc600 add ip, pc, #0, 12 + 9060: e28cca07 add ip, ip, #28672 ; 0x7000 + 9064: e5bcffbc ldr pc, \[ip, #4028\]! ; 0xfbc +#------------------------------------------------------------------------------ +#------ thumb entry to abf4's .plt entry +#------------------------------------------------------------------------------ + 9068: 4778 bx pc + 906a: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ abf4's .plt entry +#------------------------------------------------------------------------------ + 906c: e28fc600 add ip, pc, #0, 12 + 9070: e28cca07 add ip, ip, #28672 ; 0x7000 + 9074: e5bcffb0 ldr pc, \[ip, #4016\]! ; 0xfb0 +#------------------------------------------------------------------------------ +#------ thumb entry to tbf4's .plt entry +#------------------------------------------------------------------------------ + 9078: 4778 bx pc + 907a: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ tbf4's .plt entry +#------------------------------------------------------------------------------ + 907c: e28fc600 add ip, pc, #0, 12 + 9080: e28cca07 add ip, ip, #28672 ; 0x7000 + 9084: e5bcffa4 ldr pc, \[ip, #4004\]! ; 0xfa4 +#------------------------------------------------------------------------------ +#------ thumb entry to ttf4's .plt entry +#------------------------------------------------------------------------------ + 9088: 4778 bx pc + 908a: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ ttf4's .plt entry +#------------------------------------------------------------------------------ + 908c: e28fc600 add ip, pc, #0, 12 + 9090: e28cca07 add ip, ip, #28672 ; 0x7000 + 9094: e5bcff98 ldr pc, \[ip, #3992\]! ; 0xf98 +#------------------------------------------------------------------------------ +#------ thumb entry to atf4's .plt entry +#------------------------------------------------------------------------------ + 9098: 4778 bx pc + 909a: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ atf4's .plt entry +#------------------------------------------------------------------------------ + 909c: e28fc600 add ip, pc, #0, 12 + 90a0: e28cca07 add ip, ip, #28672 ; 0x7000 + 90a4: e5bcff8c ldr pc, \[ip, #3980\]! ; 0xf8c +#------------------------------------------------------------------------------ +#------ taf4's .plt entry +#------------------------------------------------------------------------------ + 90a8: e28fc600 add ip, pc, #0, 12 + 90ac: e28cca07 add ip, ip, #28672 ; 0x7000 + 90b0: e5bcff84 ldr pc, \[ip, #3972\]! ; 0xf84 +#------------------------------------------------------------------------------ +#------ thumb entry to abf2's .plt entry +#------------------------------------------------------------------------------ + 90b4: 4778 bx pc + 90b6: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ abf2's .plt entry +#------------------------------------------------------------------------------ + 90b8: e28fc600 add ip, pc, #0, 12 + 90bc: e28cca07 add ip, ip, #28672 ; 0x7000 + 90c0: e5bcff78 ldr pc, \[ip, #3960\]! ; 0xf78 + +Disassembly of section \.iplt: + +000090c4 <\.iplt>: +#------------------------------------------------------------------------------ +#------ aaf1's .iplt entry +#------------------------------------------------------------------------------ + 90c4: e28fc600 add ip, pc, #0, 12 + 90c8: e28cca07 add ip, ip, #28672 ; 0x7000 + 90cc: e5bcff70 ldr pc, \[ip, #3952\]! ; 0xf70 +#------------------------------------------------------------------------------ +#------ thumb entry to atf1's .iplt entry +#------------------------------------------------------------------------------ + 90d0: 4778 bx pc + 90d2: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ atf1's .iplt entry +#------------------------------------------------------------------------------ + 90d4: e28fc600 add ip, pc, #0, 12 + 90d8: e28cca07 add ip, ip, #28672 ; 0x7000 + 90dc: e5bcff64 ldr pc, \[ip, #3940\]! ; 0xf64 +#------------------------------------------------------------------------------ +#------ thumb entry to abf1's .iplt entry +#------------------------------------------------------------------------------ + 90e0: 4778 bx pc + 90e2: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ abf1's .iplt entry +#------------------------------------------------------------------------------ + 90e4: e28fc600 add ip, pc, #0, 12 + 90e8: e28cca07 add ip, ip, #28672 ; 0x7000 + 90ec: e5bcff58 ldr pc, \[ip, #3928\]! ; 0xf58 +#------------------------------------------------------------------------------ +#------ taf1's .iplt entry +#------------------------------------------------------------------------------ + 90f0: e28fc600 add ip, pc, #0, 12 + 90f4: e28cca07 add ip, ip, #28672 ; 0x7000 + 90f8: e5bcff50 ldr pc, \[ip, #3920\]! ; 0xf50 +#------------------------------------------------------------------------------ +#------ thumb entry to ttf1's .iplt entry +#------------------------------------------------------------------------------ + 90fc: 4778 bx pc + 90fe: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ ttf1's .iplt entry +#------------------------------------------------------------------------------ + 9100: e28fc600 add ip, pc, #0, 12 + 9104: e28cca07 add ip, ip, #28672 ; 0x7000 + 9108: e5bcff44 ldr pc, \[ip, #3908\]! ; 0xf44 +#------------------------------------------------------------------------------ +#------ thumb entry to tbf1's .iplt entry +#------------------------------------------------------------------------------ + 910c: 4778 bx pc + 910e: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ tbf1's .iplt entry +#------------------------------------------------------------------------------ + 9110: e28fc600 add ip, pc, #0, 12 + 9114: e28cca07 add ip, ip, #28672 ; 0x7000 + 9118: e5bcff38 ldr pc, \[ip, #3896\]! ; 0xf38 +#------------------------------------------------------------------------------ +#------ thumb entry to atf3's .iplt entry +#------------------------------------------------------------------------------ + 911c: 4778 bx pc + 911e: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ atf3's .iplt entry +#------------------------------------------------------------------------------ + 9120: e28fc600 add ip, pc, #0, 12 + 9124: e28cca07 add ip, ip, #28672 ; 0x7000 + 9128: e5bcff2c ldr pc, \[ip, #3884\]! ; 0xf2c +#------------------------------------------------------------------------------ +#------ thumb entry to abf3's .iplt entry +#------------------------------------------------------------------------------ + 912c: 4778 bx pc + 912e: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ abf3's .iplt entry +#------------------------------------------------------------------------------ + 9130: e28fc600 add ip, pc, #0, 12 + 9134: e28cca07 add ip, ip, #28672 ; 0x7000 + 9138: e5bcff20 ldr pc, \[ip, #3872\]! ; 0xf20 +#------------------------------------------------------------------------------ +#------ thumb entry to ttf3's .iplt entry +#------------------------------------------------------------------------------ + 913c: 4778 bx pc + 913e: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ ttf3's .iplt entry +#------------------------------------------------------------------------------ + 9140: e28fc600 add ip, pc, #0, 12 + 9144: e28cca07 add ip, ip, #28672 ; 0x7000 + 9148: e5bcff14 ldr pc, \[ip, #3860\]! ; 0xf14 +#------------------------------------------------------------------------------ +#------ thumb entry to tbf3's .iplt entry +#------------------------------------------------------------------------------ + 914c: 4778 bx pc + 914e: 46c0 nop ; \(mov r8, r8\) +#------------------------------------------------------------------------------ +#------ tbf3's .iplt entry +#------------------------------------------------------------------------------ + 9150: e28fc600 add ip, pc, #0, 12 + 9154: e28cca07 add ip, ip, #28672 ; 0x7000 + 9158: e5bcff08 ldr pc, \[ip, #3848\]! ; 0xf08 +#------------------------------------------------------------------------------ +#------ taf3's .iplt entry +#------------------------------------------------------------------------------ + 915c: e28fc600 add ip, pc, #0, 12 + 9160: e28cca07 add ip, ip, #28672 ; 0x7000 + 9164: e5bcff00 ldr pc, \[ip, #3840\]! ; 0xf00 +#------------------------------------------------------------------------------ +#------ aaf3's .iplt entry +#------------------------------------------------------------------------------ + 9168: e28fc600 add ip, pc, #0, 12 + 916c: e28cca07 add ip, ip, #28672 ; 0x7000 + 9170: e5bcfef8 ldr pc, \[ip, #3832\]! ; 0xef8 + +Disassembly of section \.text: + +0000a000 <aaf1>: + a000: e1a0f00e mov pc, lr + +0000a004 <atf1>: + a004: e1a0f00e mov pc, lr + +0000a008 <abf1>: + a008: e1a0f00e mov pc, lr + +0000a00c <taf1>: + a00c: 46f7 mov pc, lr + +0000a00e <ttf1>: + a00e: 46f7 mov pc, lr + +0000a010 <tbf1>: + a010: 46f7 mov pc, lr + \.\.\. + +0000a014 <aaf3>: + a014: e1a0f00e mov pc, lr + +0000a018 <atf3>: + a018: e1a0f00e mov pc, lr + +0000a01c <abf3>: + a01c: e1a0f00e mov pc, lr + +0000a020 <taf3>: + a020: 46f7 mov pc, lr + +0000a022 <ttf3>: + a022: 46f7 mov pc, lr + +0000a024 <tbf3>: + a024: 46f7 mov pc, lr + \.\.\. + +0000a028 <arm>: + a028: eb0017f4 bl 10000 <foo> + a02c: ea0017f3 b 10000 <foo> + a030: 0a0017f2 beq 10000 <foo> + a034: e59f4000 ldr r4, \[pc\] ; a03c <arm\+0x14> + a038: e59f4000 ldr r4, \[pc\] ; a040 <arm\+0x18> +#------------------------------------------------------------------------------ +#------ .got offset for foo +#------------------------------------------------------------------------------ + a03c: 00000070 \.word 0x00000070 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for foo +#------------------------------------------------------------------------------ + a040: 0000702c \.word 0x0000702c +#------------------------------------------------------------------------------ +#------ aaf1's .iplt entry +#------------------------------------------------------------------------------ + a044: ebfffc1e bl 90c4 <aaf1-0xf3c> +#------------------------------------------------------------------------------ +#------ aaf1's .iplt entry +#------------------------------------------------------------------------------ + a048: eafffc1d b 90c4 <aaf1-0xf3c> +#------------------------------------------------------------------------------ +#------ aaf1's .iplt entry +#------------------------------------------------------------------------------ + a04c: 0afffc1c beq 90c4 <aaf1-0xf3c> + a050: e59f4000 ldr r4, \[pc\] ; a058 <arm\+0x30> + a054: e59f4000 ldr r4, \[pc\] ; a05c <arm\+0x34> +#------------------------------------------------------------------------------ +#------ GP-relative offset of aaf1's .igot.plt entry +#------------------------------------------------------------------------------ + a058: 0000003c \.word 0x0000003c +#------------------------------------------------------------------------------ +#------ PC-relative offset of aaf1's .igot.plt entry +#------------------------------------------------------------------------------ + a05c: 00006fe0 \.word 0x00006fe0 +#------------------------------------------------------------------------------ +#------ taf1's .iplt entry +#------------------------------------------------------------------------------ + a060: ebfffc22 bl 90f0 <aaf1-0xf10> +#------------------------------------------------------------------------------ +#------ taf1's .iplt entry +#------------------------------------------------------------------------------ + a064: eafffc21 b 90f0 <aaf1-0xf10> +#------------------------------------------------------------------------------ +#------ taf1's .iplt entry +#------------------------------------------------------------------------------ + a068: 0afffc20 beq 90f0 <aaf1-0xf10> + a06c: e59f4000 ldr r4, \[pc\] ; a074 <arm\+0x4c> + a070: e59f4000 ldr r4, \[pc\] ; a078 <arm\+0x50> +#------------------------------------------------------------------------------ +#------ GP-relative offset of taf1's .igot.plt entry +#------------------------------------------------------------------------------ + a074: 00000048 \.word 0x00000048 +#------------------------------------------------------------------------------ +#------ PC-relative offset of taf1's .igot.plt entry +#------------------------------------------------------------------------------ + a078: 00006fd0 \.word 0x00006fd0 +#------------------------------------------------------------------------------ +#------ abf1's .iplt entry +#------------------------------------------------------------------------------ + a07c: ebfffc18 bl 90e4 <aaf1-0xf1c> +#------------------------------------------------------------------------------ +#------ abf1's .iplt entry +#------------------------------------------------------------------------------ + a080: eafffc17 b 90e4 <aaf1-0xf1c> +#------------------------------------------------------------------------------ +#------ abf1's .iplt entry +#------------------------------------------------------------------------------ + a084: 0afffc16 beq 90e4 <aaf1-0xf1c> + a088: e59f4000 ldr r4, \[pc\] ; a090 <arm\+0x68> + a08c: e59f4000 ldr r4, \[pc\] ; a094 <arm\+0x6c> +#------------------------------------------------------------------------------ +#------ GP-relative offset of abf1's .igot.plt entry +#------------------------------------------------------------------------------ + a090: 00000044 \.word 0x00000044 +#------------------------------------------------------------------------------ +#------ PC-relative offset of abf1's .igot.plt entry +#------------------------------------------------------------------------------ + a094: 00006fb0 \.word 0x00006fb0 +#------------------------------------------------------------------------------ +#------ tbf1's .iplt entry +#------------------------------------------------------------------------------ + a098: ebfffc1c bl 9110 <aaf1-0xef0> +#------------------------------------------------------------------------------ +#------ tbf1's .iplt entry +#------------------------------------------------------------------------------ + a09c: eafffc1b b 9110 <aaf1-0xef0> +#------------------------------------------------------------------------------ +#------ tbf1's .iplt entry +#------------------------------------------------------------------------------ + a0a0: 0afffc1a beq 9110 <aaf1-0xef0> + a0a4: e59f4000 ldr r4, \[pc\] ; a0ac <arm\+0x84> + a0a8: e59f4000 ldr r4, \[pc\] ; a0b0 <arm\+0x88> +#------------------------------------------------------------------------------ +#------ GP-relative offset of tbf1's .igot.plt entry +#------------------------------------------------------------------------------ + a0ac: 00000050 \.word 0x00000050 +#------------------------------------------------------------------------------ +#------ PC-relative offset of tbf1's .igot.plt entry +#------------------------------------------------------------------------------ + a0b0: 00006fa0 \.word 0x00006fa0 +#------------------------------------------------------------------------------ +#------ aaf2's .plt entry +#------------------------------------------------------------------------------ + a0b4: ebfffbe8 bl 905c <aaf1-0xfa4> +#------------------------------------------------------------------------------ +#------ aaf2's .plt entry +#------------------------------------------------------------------------------ + a0b8: eafffbe7 b 905c <aaf1-0xfa4> +#------------------------------------------------------------------------------ +#------ aaf2's .plt entry +#------------------------------------------------------------------------------ + a0bc: 0afffbe6 beq 905c <aaf1-0xfa4> + a0c0: e59f4000 ldr r4, \[pc\] ; a0c8 <arm\+0xa0> + a0c4: e59f4000 ldr r4, \[pc\] ; a0cc <arm\+0xa4> +#------------------------------------------------------------------------------ +#------ .got offset for aaf2 +#------------------------------------------------------------------------------ + a0c8: 00000088 \.word 0x00000088 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for aaf2 +#------------------------------------------------------------------------------ + a0cc: 00006fbc \.word 0x00006fbc +#------------------------------------------------------------------------------ +#------ taf2's .plt entry +#------------------------------------------------------------------------------ + a0d0: ebfffbde bl 9050 <aaf1-0xfb0> +#------------------------------------------------------------------------------ +#------ taf2's .plt entry +#------------------------------------------------------------------------------ + a0d4: eafffbdd b 9050 <aaf1-0xfb0> +#------------------------------------------------------------------------------ +#------ taf2's .plt entry +#------------------------------------------------------------------------------ + a0d8: 0afffbdc beq 9050 <aaf1-0xfb0> + a0dc: e59f4000 ldr r4, \[pc\] ; a0e4 <arm\+0xbc> + a0e0: e59f4000 ldr r4, \[pc\] ; a0e8 <arm\+0xc0> +#------------------------------------------------------------------------------ +#------ .got offset for taf2 +#------------------------------------------------------------------------------ + a0e4: 00000084 \.word 0x00000084 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for taf2 +#------------------------------------------------------------------------------ + a0e8: 00006f9c \.word 0x00006f9c +#------------------------------------------------------------------------------ +#------ abf2's .plt entry +#------------------------------------------------------------------------------ + a0ec: ebfffbf1 bl 90b8 <aaf1-0xf48> +#------------------------------------------------------------------------------ +#------ abf2's .plt entry +#------------------------------------------------------------------------------ + a0f0: eafffbf0 b 90b8 <aaf1-0xf48> +#------------------------------------------------------------------------------ +#------ abf2's .plt entry +#------------------------------------------------------------------------------ + a0f4: 0afffbef beq 90b8 <aaf1-0xf48> + a0f8: e59f4000 ldr r4, \[pc\] ; a100 <arm\+0xd8> + a0fc: e59f4000 ldr r4, \[pc\] ; a104 <arm\+0xdc> +#------------------------------------------------------------------------------ +#------ .got offset for abf2 +#------------------------------------------------------------------------------ + a100: 000000a0 \.word 0x000000a0 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for abf2 +#------------------------------------------------------------------------------ + a104: 00006f9c \.word 0x00006f9c +#------------------------------------------------------------------------------ +#------ tbf2's .plt entry +#------------------------------------------------------------------------------ + a108: ebfffbcd bl 9044 <aaf1-0xfbc> +#------------------------------------------------------------------------------ +#------ tbf2's .plt entry +#------------------------------------------------------------------------------ + a10c: eafffbcc b 9044 <aaf1-0xfbc> +#------------------------------------------------------------------------------ +#------ tbf2's .plt entry +#------------------------------------------------------------------------------ + a110: 0afffbcb beq 9044 <aaf1-0xfbc> + a114: e59f4000 ldr r4, \[pc\] ; a11c <arm\+0xf4> + a118: e59f4000 ldr r4, \[pc\] ; a120 <arm\+0xf8> +#------------------------------------------------------------------------------ +#------ .got offset for tbf2 +#------------------------------------------------------------------------------ + a11c: 00000080 \.word 0x00000080 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for tbf2 +#------------------------------------------------------------------------------ + a120: 00006f60 \.word 0x00006f60 +#------------------------------------------------------------------------------ +#------ aaf3's .iplt entry +#------------------------------------------------------------------------------ + a124: ebfffc0f bl 9168 <aaf1-0xe98> +#------------------------------------------------------------------------------ +#------ aaf3's .iplt entry +#------------------------------------------------------------------------------ + a128: eafffc0e b 9168 <aaf1-0xe98> +#------------------------------------------------------------------------------ +#------ aaf3's .iplt entry +#------------------------------------------------------------------------------ + a12c: 0afffc0d beq 9168 <aaf1-0xe98> + a130: e59f4000 ldr r4, \[pc\] ; a138 <arm\+0x110> + a134: e59f4000 ldr r4, \[pc\] ; a13c <arm\+0x114> +#------------------------------------------------------------------------------ +#------ GP-relative offset of aaf3's .igot.plt entry +#------------------------------------------------------------------------------ + a138: 00000068 \.word 0x00000068 +#------------------------------------------------------------------------------ +#------ PC-relative offset of aaf3's .igot.plt entry +#------------------------------------------------------------------------------ + a13c: 00006f2c \.word 0x00006f2c +#------------------------------------------------------------------------------ +#------ taf3's .iplt entry +#------------------------------------------------------------------------------ + a140: ebfffc05 bl 915c <aaf1-0xea4> +#------------------------------------------------------------------------------ +#------ taf3's .iplt entry +#------------------------------------------------------------------------------ + a144: eafffc04 b 915c <aaf1-0xea4> +#------------------------------------------------------------------------------ +#------ taf3's .iplt entry +#------------------------------------------------------------------------------ + a148: 0afffc03 beq 915c <aaf1-0xea4> + a14c: e59f4000 ldr r4, \[pc\] ; a154 <arm\+0x12c> + a150: e59f4000 ldr r4, \[pc\] ; a158 <arm\+0x130> +#------------------------------------------------------------------------------ +#------ GP-relative offset of taf3's .igot.plt entry +#------------------------------------------------------------------------------ + a154: 00000064 \.word 0x00000064 +#------------------------------------------------------------------------------ +#------ PC-relative offset of taf3's .igot.plt entry +#------------------------------------------------------------------------------ + a158: 00006f0c \.word 0x00006f0c +#------------------------------------------------------------------------------ +#------ abf3's .iplt entry +#------------------------------------------------------------------------------ + a15c: ebfffbf3 bl 9130 <aaf1-0xed0> +#------------------------------------------------------------------------------ +#------ abf3's .iplt entry +#------------------------------------------------------------------------------ + a160: eafffbf2 b 9130 <aaf1-0xed0> +#------------------------------------------------------------------------------ +#------ abf3's .iplt entry +#------------------------------------------------------------------------------ + a164: 0afffbf1 beq 9130 <aaf1-0xed0> + a168: e59f4000 ldr r4, \[pc\] ; a170 <arm\+0x148> + a16c: e59f4000 ldr r4, \[pc\] ; a174 <arm\+0x14c> +#------------------------------------------------------------------------------ +#------ GP-relative offset of abf3's .igot.plt entry +#------------------------------------------------------------------------------ + a170: 00000058 \.word 0x00000058 +#------------------------------------------------------------------------------ +#------ PC-relative offset of abf3's .igot.plt entry +#------------------------------------------------------------------------------ + a174: 00006ee4 \.word 0x00006ee4 +#------------------------------------------------------------------------------ +#------ tbf3's .iplt entry +#------------------------------------------------------------------------------ + a178: ebfffbf4 bl 9150 <aaf1-0xeb0> +#------------------------------------------------------------------------------ +#------ tbf3's .iplt entry +#------------------------------------------------------------------------------ + a17c: eafffbf3 b 9150 <aaf1-0xeb0> +#------------------------------------------------------------------------------ +#------ tbf3's .iplt entry +#------------------------------------------------------------------------------ + a180: 0afffbf2 beq 9150 <aaf1-0xeb0> + a184: e59f4000 ldr r4, \[pc\] ; a18c <arm\+0x164> + a188: e59f4000 ldr r4, \[pc\] ; a190 <arm\+0x168> +#------------------------------------------------------------------------------ +#------ GP-relative offset of tbf3's .igot.plt entry +#------------------------------------------------------------------------------ + a18c: 00000060 \.word 0x00000060 +#------------------------------------------------------------------------------ +#------ PC-relative offset of tbf3's .igot.plt entry +#------------------------------------------------------------------------------ + a190: 00006ed0 \.word 0x00006ed0 +#------------------------------------------------------------------------------ +#------ aaf4's .plt entry +#------------------------------------------------------------------------------ + a194: ebfffba2 bl 9024 <aaf1-0xfdc> +#------------------------------------------------------------------------------ +#------ aaf4's .plt entry +#------------------------------------------------------------------------------ + a198: eafffba1 b 9024 <aaf1-0xfdc> +#------------------------------------------------------------------------------ +#------ aaf4's .plt entry +#------------------------------------------------------------------------------ + a19c: 0afffba0 beq 9024 <aaf1-0xfdc> + a1a0: e59f4000 ldr r4, \[pc\] ; a1a8 <arm\+0x180> + a1a4: e59f4000 ldr r4, \[pc\] ; a1ac <arm\+0x184> +#------------------------------------------------------------------------------ +#------ .got offset for aaf4 +#------------------------------------------------------------------------------ + a1a8: 00000078 \.word 0x00000078 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for aaf4 +#------------------------------------------------------------------------------ + a1ac: 00006ecc \.word 0x00006ecc +#------------------------------------------------------------------------------ +#------ taf4's .plt entry +#------------------------------------------------------------------------------ + a1b0: ebfffbbc bl 90a8 <aaf1-0xf58> +#------------------------------------------------------------------------------ +#------ taf4's .plt entry +#------------------------------------------------------------------------------ + a1b4: eafffbbb b 90a8 <aaf1-0xf58> +#------------------------------------------------------------------------------ +#------ taf4's .plt entry +#------------------------------------------------------------------------------ + a1b8: 0afffbba beq 90a8 <aaf1-0xf58> + a1bc: e59f4000 ldr r4, \[pc\] ; a1c4 <arm\+0x19c> + a1c0: e59f4000 ldr r4, \[pc\] ; a1c8 <arm\+0x1a0> +#------------------------------------------------------------------------------ +#------ .got offset for taf4 +#------------------------------------------------------------------------------ + a1c4: 0000009c \.word 0x0000009c +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for taf4 +#------------------------------------------------------------------------------ + a1c8: 00006ed4 \.word 0x00006ed4 +#------------------------------------------------------------------------------ +#------ abf4's .plt entry +#------------------------------------------------------------------------------ + a1cc: ebfffba6 bl 906c <aaf1-0xf94> +#------------------------------------------------------------------------------ +#------ abf4's .plt entry +#------------------------------------------------------------------------------ + a1d0: eafffba5 b 906c <aaf1-0xf94> +#------------------------------------------------------------------------------ +#------ abf4's .plt entry +#------------------------------------------------------------------------------ + a1d4: 0afffba4 beq 906c <aaf1-0xf94> + a1d8: e59f4000 ldr r4, \[pc\] ; a1e0 <arm\+0x1b8> + a1dc: e59f4000 ldr r4, \[pc\] ; a1e4 <arm\+0x1bc> +#------------------------------------------------------------------------------ +#------ .got offset for abf4 +#------------------------------------------------------------------------------ + a1e0: 0000008c \.word 0x0000008c +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for abf4 +#------------------------------------------------------------------------------ + a1e4: 00006ea8 \.word 0x00006ea8 +#------------------------------------------------------------------------------ +#------ tbf4's .plt entry +#------------------------------------------------------------------------------ + a1e8: ebfffba3 bl 907c <aaf1-0xf84> +#------------------------------------------------------------------------------ +#------ tbf4's .plt entry +#------------------------------------------------------------------------------ + a1ec: eafffba2 b 907c <aaf1-0xf84> +#------------------------------------------------------------------------------ +#------ tbf4's .plt entry +#------------------------------------------------------------------------------ + a1f0: 0afffba1 beq 907c <aaf1-0xf84> + a1f4: e59f4000 ldr r4, \[pc\] ; a1fc <arm\+0x1d4> + a1f8: e59f4000 ldr r4, \[pc\] ; a200 <arm\+0x1d8> +#------------------------------------------------------------------------------ +#------ .got offset for tbf4 +#------------------------------------------------------------------------------ + a1fc: 00000090 \.word 0x00000090 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for tbf4 +#------------------------------------------------------------------------------ + a200: 00006e90 \.word 0x00006e90 + +0000a204 <_thumb>: + a204: f005 fefc bl 10000 <foo> + a208: f005 befa b\.w 10000 <foo> + a20c: f005 86f8 beq\.w 10000 <foo> + a210: 4c00 ldr r4, \[pc, #0\] ; \(a214 <_thumb\+0x10>\) + a212: 4c01 ldr r4, \[pc, #4\] ; \(a218 <_thumb\+0x14>\) +#------------------------------------------------------------------------------ +#------ .got offset for foo +#------------------------------------------------------------------------------ + a214: 00000070 \.word 0x00000070 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for foo +#------------------------------------------------------------------------------ + a218: 00006e54 \.word 0x00006e54 +#------------------------------------------------------------------------------ +#------ atf1's .iplt entry +#------------------------------------------------------------------------------ + a21c: f7fe ef5a blx 90d4 <aaf1-0xf2c> +#------------------------------------------------------------------------------ +#------ thumb entry to atf1's .iplt entry +#------------------------------------------------------------------------------ + a220: f7fe bf56 b\.w 90d0 <aaf1-0xf30> +#------------------------------------------------------------------------------ +#------ thumb entry to atf1's .iplt entry +#------------------------------------------------------------------------------ + a224: f43e af54 beq\.w 90d0 <aaf1-0xf30> + a228: 4c00 ldr r4, \[pc, #0\] ; \(a22c <_thumb\+0x28>\) + a22a: 4c01 ldr r4, \[pc, #4\] ; \(a230 <_thumb\+0x2c>\) +#------------------------------------------------------------------------------ +#------ GP-relative offset of atf1's .igot.plt entry +#------------------------------------------------------------------------------ + a22c: 00000040 \.word 0x00000040 +#------------------------------------------------------------------------------ +#------ PC-relative offset of atf1's .igot.plt entry +#------------------------------------------------------------------------------ + a230: 00006e10 \.word 0x00006e10 +#------------------------------------------------------------------------------ +#------ ttf1's .iplt entry +#------------------------------------------------------------------------------ + a234: f7fe ef64 blx 9100 <aaf1-0xf00> +#------------------------------------------------------------------------------ +#------ thumb entry to ttf1's .iplt entry +#------------------------------------------------------------------------------ + a238: f7fe bf60 b\.w 90fc <aaf1-0xf04> +#------------------------------------------------------------------------------ +#------ thumb entry to ttf1's .iplt entry +#------------------------------------------------------------------------------ + a23c: f43e af5e beq\.w 90fc <aaf1-0xf04> + a240: 4c00 ldr r4, \[pc, #0\] ; \(a244 <_thumb\+0x40>\) + a242: 4c01 ldr r4, \[pc, #4\] ; \(a248 <_thumb\+0x44>\) +#------------------------------------------------------------------------------ +#------ GP-relative offset of ttf1's .igot.plt entry +#------------------------------------------------------------------------------ + a244: 0000004c \.word 0x0000004c +#------------------------------------------------------------------------------ +#------ PC-relative offset of ttf1's .igot.plt entry +#------------------------------------------------------------------------------ + a248: 00006e04 \.word 0x00006e04 +#------------------------------------------------------------------------------ +#------ abf1's .iplt entry +#------------------------------------------------------------------------------ + a24c: f7fe ef4a blx 90e4 <aaf1-0xf1c> +#------------------------------------------------------------------------------ +#------ thumb entry to abf1's .iplt entry +#------------------------------------------------------------------------------ + a250: f7fe bf46 b\.w 90e0 <aaf1-0xf20> +#------------------------------------------------------------------------------ +#------ thumb entry to abf1's .iplt entry +#------------------------------------------------------------------------------ + a254: f43e af44 beq\.w 90e0 <aaf1-0xf20> + a258: 4c00 ldr r4, \[pc, #0\] ; \(a25c <_thumb\+0x58>\) + a25a: 4c01 ldr r4, \[pc, #4\] ; \(a260 <_thumb\+0x5c>\) +#------------------------------------------------------------------------------ +#------ GP-relative offset of abf1's .igot.plt entry +#------------------------------------------------------------------------------ + a25c: 00000044 \.word 0x00000044 +#------------------------------------------------------------------------------ +#------ PC-relative offset of abf1's .igot.plt entry +#------------------------------------------------------------------------------ + a260: 00006de4 \.word 0x00006de4 +#------------------------------------------------------------------------------ +#------ tbf1's .iplt entry +#------------------------------------------------------------------------------ + a264: f7fe ef54 blx 9110 <aaf1-0xef0> +#------------------------------------------------------------------------------ +#------ thumb entry to tbf1's .iplt entry +#------------------------------------------------------------------------------ + a268: f7fe bf50 b\.w 910c <aaf1-0xef4> +#------------------------------------------------------------------------------ +#------ thumb entry to tbf1's .iplt entry +#------------------------------------------------------------------------------ + a26c: f43e af4e beq\.w 910c <aaf1-0xef4> + a270: 4c00 ldr r4, \[pc, #0\] ; \(a274 <_thumb\+0x70>\) + a272: 4c01 ldr r4, \[pc, #4\] ; \(a278 <_thumb\+0x74>\) +#------------------------------------------------------------------------------ +#------ GP-relative offset of tbf1's .igot.plt entry +#------------------------------------------------------------------------------ + a274: 00000050 \.word 0x00000050 +#------------------------------------------------------------------------------ +#------ PC-relative offset of tbf1's .igot.plt entry +#------------------------------------------------------------------------------ + a278: 00006dd8 \.word 0x00006dd8 +#------------------------------------------------------------------------------ +#------ atf2's .plt entry +#------------------------------------------------------------------------------ + a27c: f7fe eecc blx 9018 <aaf1-0xfe8> +#------------------------------------------------------------------------------ +#------ thumb entry to atf2's .plt entry +#------------------------------------------------------------------------------ + a280: f7fe bec8 b\.w 9014 <aaf1-0xfec> +#------------------------------------------------------------------------------ +#------ thumb entry to atf2's .plt entry +#------------------------------------------------------------------------------ + a284: f43e aec6 beq\.w 9014 <aaf1-0xfec> + a288: 4c00 ldr r4, \[pc, #0\] ; \(a28c <_thumb\+0x88>\) + a28a: 4c01 ldr r4, \[pc, #4\] ; \(a290 <_thumb\+0x8c>\) +#------------------------------------------------------------------------------ +#------ .got offset for atf2 +#------------------------------------------------------------------------------ + a28c: 00000074 \.word 0x00000074 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for atf2 +#------------------------------------------------------------------------------ + a290: 00006de4 \.word 0x00006de4 +#------------------------------------------------------------------------------ +#------ ttf2's .plt entry +#------------------------------------------------------------------------------ + a294: f7fe eece blx 9034 <aaf1-0xfcc> +#------------------------------------------------------------------------------ +#------ thumb entry to ttf2's .plt entry +#------------------------------------------------------------------------------ + a298: f7fe beca b\.w 9030 <aaf1-0xfd0> +#------------------------------------------------------------------------------ +#------ thumb entry to ttf2's .plt entry +#------------------------------------------------------------------------------ + a29c: f43e aec8 beq\.w 9030 <aaf1-0xfd0> + a2a0: 4c00 ldr r4, \[pc, #0\] ; \(a2a4 <_thumb\+0xa0>\) + a2a2: 4c01 ldr r4, \[pc, #4\] ; \(a2a8 <_thumb\+0xa4>\) +#------------------------------------------------------------------------------ +#------ .got offset for ttf2 +#------------------------------------------------------------------------------ + a2a4: 0000007c \.word 0x0000007c +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for ttf2 +#------------------------------------------------------------------------------ + a2a8: 00006dd4 \.word 0x00006dd4 +#------------------------------------------------------------------------------ +#------ abf2's .plt entry +#------------------------------------------------------------------------------ + a2ac: f7fe ef04 blx 90b8 <aaf1-0xf48> +#------------------------------------------------------------------------------ +#------ thumb entry to abf2's .plt entry +#------------------------------------------------------------------------------ + a2b0: f7fe bf00 b\.w 90b4 <aaf1-0xf4c> +#------------------------------------------------------------------------------ +#------ thumb entry to abf2's .plt entry +#------------------------------------------------------------------------------ + a2b4: f43e aefe beq\.w 90b4 <aaf1-0xf4c> + a2b8: 4c00 ldr r4, \[pc, #0\] ; \(a2bc <_thumb\+0xb8>\) + a2ba: 4c01 ldr r4, \[pc, #4\] ; \(a2c0 <_thumb\+0xbc>\) +#------------------------------------------------------------------------------ +#------ .got offset for abf2 +#------------------------------------------------------------------------------ + a2bc: 000000a0 \.word 0x000000a0 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for abf2 +#------------------------------------------------------------------------------ + a2c0: 00006de0 \.word 0x00006de0 +#------------------------------------------------------------------------------ +#------ tbf2's .plt entry +#------------------------------------------------------------------------------ + a2c4: f7fe eebe blx 9044 <aaf1-0xfbc> +#------------------------------------------------------------------------------ +#------ thumb entry to tbf2's .plt entry +#------------------------------------------------------------------------------ + a2c8: f7fe beba b\.w 9040 <aaf1-0xfc0> +#------------------------------------------------------------------------------ +#------ thumb entry to tbf2's .plt entry +#------------------------------------------------------------------------------ + a2cc: f43e aeb8 beq\.w 9040 <aaf1-0xfc0> + a2d0: 4c00 ldr r4, \[pc, #0\] ; \(a2d4 <_thumb\+0xd0>\) + a2d2: 4c01 ldr r4, \[pc, #4\] ; \(a2d8 <_thumb\+0xd4>\) +#------------------------------------------------------------------------------ +#------ .got offset for tbf2 +#------------------------------------------------------------------------------ + a2d4: 00000080 \.word 0x00000080 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for tbf2 +#------------------------------------------------------------------------------ + a2d8: 00006da8 \.word 0x00006da8 +#------------------------------------------------------------------------------ +#------ atf3's .iplt entry +#------------------------------------------------------------------------------ + a2dc: f7fe ef20 blx 9120 <aaf1-0xee0> +#------------------------------------------------------------------------------ +#------ thumb entry to atf3's .iplt entry +#------------------------------------------------------------------------------ + a2e0: f7fe bf1c b\.w 911c <aaf1-0xee4> +#------------------------------------------------------------------------------ +#------ thumb entry to atf3's .iplt entry +#------------------------------------------------------------------------------ + a2e4: f43e af1a beq\.w 911c <aaf1-0xee4> + a2e8: 4c00 ldr r4, \[pc, #0\] ; \(a2ec <_thumb\+0xe8>\) + a2ea: 4c01 ldr r4, \[pc, #4\] ; \(a2f0 <_thumb\+0xec>\) +#------------------------------------------------------------------------------ +#------ GP-relative offset of atf3's .igot.plt entry +#------------------------------------------------------------------------------ + a2ec: 00000054 \.word 0x00000054 +#------------------------------------------------------------------------------ +#------ PC-relative offset of atf3's .igot.plt entry +#------------------------------------------------------------------------------ + a2f0: 00006d64 \.word 0x00006d64 +#------------------------------------------------------------------------------ +#------ ttf3's .iplt entry +#------------------------------------------------------------------------------ + a2f4: f7fe ef24 blx 9140 <aaf1-0xec0> +#------------------------------------------------------------------------------ +#------ thumb entry to ttf3's .iplt entry +#------------------------------------------------------------------------------ + a2f8: f7fe bf20 b\.w 913c <aaf1-0xec4> +#------------------------------------------------------------------------------ +#------ thumb entry to ttf3's .iplt entry +#------------------------------------------------------------------------------ + a2fc: f43e af1e beq\.w 913c <aaf1-0xec4> + a300: 4c00 ldr r4, \[pc, #0\] ; \(a304 <_thumb\+0x100>\) + a302: 4c01 ldr r4, \[pc, #4\] ; \(a308 <_thumb\+0x104>\) +#------------------------------------------------------------------------------ +#------ GP-relative offset of ttf3's .igot.plt entry +#------------------------------------------------------------------------------ + a304: 0000005c \.word 0x0000005c +#------------------------------------------------------------------------------ +#------ PC-relative offset of ttf3's .igot.plt entry +#------------------------------------------------------------------------------ + a308: 00006d54 \.word 0x00006d54 +#------------------------------------------------------------------------------ +#------ abf3's .iplt entry +#------------------------------------------------------------------------------ + a30c: f7fe ef10 blx 9130 <aaf1-0xed0> +#------------------------------------------------------------------------------ +#------ thumb entry to abf3's .iplt entry +#------------------------------------------------------------------------------ + a310: f7fe bf0c b\.w 912c <aaf1-0xed4> +#------------------------------------------------------------------------------ +#------ thumb entry to abf3's .iplt entry +#------------------------------------------------------------------------------ + a314: f43e af0a beq\.w 912c <aaf1-0xed4> + a318: 4c00 ldr r4, \[pc, #0\] ; \(a31c <_thumb\+0x118>\) + a31a: 4c01 ldr r4, \[pc, #4\] ; \(a320 <_thumb\+0x11c>\) +#------------------------------------------------------------------------------ +#------ GP-relative offset of abf3's .igot.plt entry +#------------------------------------------------------------------------------ + a31c: 00000058 \.word 0x00000058 +#------------------------------------------------------------------------------ +#------ PC-relative offset of abf3's .igot.plt entry +#------------------------------------------------------------------------------ + a320: 00006d38 \.word 0x00006d38 +#------------------------------------------------------------------------------ +#------ tbf3's .iplt entry +#------------------------------------------------------------------------------ + a324: f7fe ef14 blx 9150 <aaf1-0xeb0> +#------------------------------------------------------------------------------ +#------ thumb entry to tbf3's .iplt entry +#------------------------------------------------------------------------------ + a328: f7fe bf10 b\.w 914c <aaf1-0xeb4> +#------------------------------------------------------------------------------ +#------ thumb entry to tbf3's .iplt entry +#------------------------------------------------------------------------------ + a32c: f43e af0e beq\.w 914c <aaf1-0xeb4> + a330: 4c00 ldr r4, \[pc, #0\] ; \(a334 <_thumb\+0x130>\) + a332: 4c01 ldr r4, \[pc, #4\] ; \(a338 <_thumb\+0x134>\) +#------------------------------------------------------------------------------ +#------ GP-relative offset of tbf3's .igot.plt entry +#------------------------------------------------------------------------------ + a334: 00000060 \.word 0x00000060 +#------------------------------------------------------------------------------ +#------ PC-relative offset of tbf3's .igot.plt entry +#------------------------------------------------------------------------------ + a338: 00006d28 \.word 0x00006d28 +#------------------------------------------------------------------------------ +#------ atf4's .plt entry +#------------------------------------------------------------------------------ + a33c: f7fe eeae blx 909c <aaf1-0xf64> +#------------------------------------------------------------------------------ +#------ thumb entry to atf4's .plt entry +#------------------------------------------------------------------------------ + a340: f7fe beaa b\.w 9098 <aaf1-0xf68> +#------------------------------------------------------------------------------ +#------ thumb entry to atf4's .plt entry +#------------------------------------------------------------------------------ + a344: f43e aea8 beq\.w 9098 <aaf1-0xf68> + a348: 4c00 ldr r4, \[pc, #0\] ; \(a34c <_thumb\+0x148>\) + a34a: 4c01 ldr r4, \[pc, #4\] ; \(a350 <_thumb\+0x14c>\) +#------------------------------------------------------------------------------ +#------ .got offset for atf4 +#------------------------------------------------------------------------------ + a34c: 00000098 \.word 0x00000098 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for atf4 +#------------------------------------------------------------------------------ + a350: 00006d48 \.word 0x00006d48 +#------------------------------------------------------------------------------ +#------ ttf4's .plt entry +#------------------------------------------------------------------------------ + a354: f7fe ee9a blx 908c <aaf1-0xf74> +#------------------------------------------------------------------------------ +#------ thumb entry to ttf4's .plt entry +#------------------------------------------------------------------------------ + a358: f7fe be96 b\.w 9088 <aaf1-0xf78> +#------------------------------------------------------------------------------ +#------ thumb entry to ttf4's .plt entry +#------------------------------------------------------------------------------ + a35c: f43e ae94 beq\.w 9088 <aaf1-0xf78> + a360: 4c00 ldr r4, \[pc, #0\] ; \(a364 <_thumb\+0x160>\) + a362: 4c01 ldr r4, \[pc, #4\] ; \(a368 <_thumb\+0x164>\) +#------------------------------------------------------------------------------ +#------ .got offset for ttf4 +#------------------------------------------------------------------------------ + a364: 00000094 \.word 0x00000094 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for ttf4 +#------------------------------------------------------------------------------ + a368: 00006d2c \.word 0x00006d2c +#------------------------------------------------------------------------------ +#------ abf4's .plt entry +#------------------------------------------------------------------------------ + a36c: f7fe ee7e blx 906c <aaf1-0xf94> +#------------------------------------------------------------------------------ +#------ thumb entry to abf4's .plt entry +#------------------------------------------------------------------------------ + a370: f7fe be7a b\.w 9068 <aaf1-0xf98> +#------------------------------------------------------------------------------ +#------ thumb entry to abf4's .plt entry +#------------------------------------------------------------------------------ + a374: f43e ae78 beq\.w 9068 <aaf1-0xf98> + a378: 4c00 ldr r4, \[pc, #0\] ; \(a37c <_thumb\+0x178>\) + a37a: 4c01 ldr r4, \[pc, #4\] ; \(a380 <_thumb\+0x17c>\) +#------------------------------------------------------------------------------ +#------ .got offset for abf4 +#------------------------------------------------------------------------------ + a37c: 0000008c \.word 0x0000008c +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for abf4 +#------------------------------------------------------------------------------ + a380: 00006d0c \.word 0x00006d0c +#------------------------------------------------------------------------------ +#------ tbf4's .plt entry +#------------------------------------------------------------------------------ + a384: f7fe ee7a blx 907c <aaf1-0xf84> +#------------------------------------------------------------------------------ +#------ thumb entry to tbf4's .plt entry +#------------------------------------------------------------------------------ + a388: f7fe be76 b\.w 9078 <aaf1-0xf88> +#------------------------------------------------------------------------------ +#------ thumb entry to tbf4's .plt entry +#------------------------------------------------------------------------------ + a38c: f43e ae74 beq\.w 9078 <aaf1-0xf88> + a390: 4c00 ldr r4, \[pc, #0\] ; \(a394 <_thumb\+0x190>\) + a392: 4c01 ldr r4, \[pc, #4\] ; \(a398 <_thumb\+0x194>\) +#------------------------------------------------------------------------------ +#------ .got offset for tbf4 +#------------------------------------------------------------------------------ + a394: 00000090 \.word 0x00000090 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for tbf4 +#------------------------------------------------------------------------------ + a398: 00006cf8 \.word 0x00006cf8 diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-8.gd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-8.gd new file mode 100644 index 0000000..7efefa0 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-8.gd @@ -0,0 +1,167 @@ + +.* + +Contents of section \.data: +#------------------------------------------------------------------------------ +#------ 00010000: foo +#------ 00010004: contains aaf1 [R_ARM_IRELATIVE] +#------ 00010008: contains PC-relative offset of aaf1's .iplt entry +#------ 0001000c: contains atf1 [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 10000 44332211 00a00000 bc90ffff 04a00000 .* +#------------------------------------------------------------------------------ +#------ 00010010: contains PC-relative offset of atf1's .iplt entry +#------ 00010014: contains abf1 [R_ARM_IRELATIVE] +#------ 00010018: contains PC-relative offset of abf1's .iplt entry +#------ 0001001c: contains taf1 [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 10010 c490ffff 08a00000 cc90ffff 0da00000 .* +#------------------------------------------------------------------------------ +#------ 00010020: contains PC-relative offset of taf1's .iplt entry +#------ 00010024: contains ttf1 [R_ARM_IRELATIVE] +#------ 00010028: contains PC-relative offset of ttf1's .iplt entry +#------ 0001002c: contains tbf1 [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 10020 d090ffff 0fa00000 d890ffff 11a00000 .* +#------------------------------------------------------------------------------ +#------ 00010030: contains PC-relative offset of tbf1's .iplt entry +#------ 00010034: aaf2 [R_ARM_ABS32] +#------ 00010038: aaf2 [R_ARM_REL32] +#------ 0001003c: atf2 [R_ARM_ABS32] +#------------------------------------------------------------------------------ + 10030 e090ffff 00000000 00000000 00000000 .* +#------------------------------------------------------------------------------ +#------ 00010040: atf2 [R_ARM_REL32] +#------ 00010044: abf2 [R_ARM_ABS32] +#------ 00010048: abf2 [R_ARM_REL32] +#------ 0001004c: taf2 [R_ARM_ABS32] +#------------------------------------------------------------------------------ + 10040 00000000 00000000 00000000 00000000 .* +#------------------------------------------------------------------------------ +#------ 00010050: taf2 [R_ARM_REL32] +#------ 00010054: ttf2 [R_ARM_ABS32] +#------ 00010058: ttf2 [R_ARM_REL32] +#------ 0001005c: tbf2 [R_ARM_ABS32] +#------------------------------------------------------------------------------ + 10050 00000000 00000000 00000000 00000000 .* +#------------------------------------------------------------------------------ +#------ 00010060: tbf2 [R_ARM_REL32] +#------ 00010064: contains aaf3 [R_ARM_IRELATIVE] +#------ 00010068: contains PC-relative offset of aaf3's .iplt entry +#------ 0001006c: contains atf3 [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 10060 00000000 14a00000 0091ffff 18a00000 .* +#------------------------------------------------------------------------------ +#------ 00010070: contains PC-relative offset of atf3's .iplt entry +#------ 00010074: contains abf3 [R_ARM_IRELATIVE] +#------ 00010078: contains PC-relative offset of abf3's .iplt entry +#------ 0001007c: contains taf3 [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 10070 b090ffff 1ca00000 b890ffff 21a00000 .* +#------------------------------------------------------------------------------ +#------ 00010080: contains PC-relative offset of taf3's .iplt entry +#------ 00010084: contains ttf3 [R_ARM_IRELATIVE] +#------ 00010088: contains PC-relative offset of ttf3's .iplt entry +#------ 0001008c: contains tbf3 [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 10080 dc90ffff 23a00000 b890ffff 25a00000 .* +#------------------------------------------------------------------------------ +#------ 00010090: contains PC-relative offset of tbf3's .iplt entry +#------ 00010094: aaf4 [R_ARM_ABS32] +#------ 00010098: aaf4 [R_ARM_REL32] +#------ 0001009c: atf4 [R_ARM_ABS32] +#------------------------------------------------------------------------------ + 10090 c090ffff 00000000 00000000 00000000 .* +#------------------------------------------------------------------------------ +#------ 000100a0: atf4 [R_ARM_REL32] +#------ 000100a4: abf4 [R_ARM_ABS32] +#------ 000100a8: abf4 [R_ARM_REL32] +#------ 000100ac: taf4 [R_ARM_ABS32] +#------------------------------------------------------------------------------ + 100a0 00000000 00000000 00000000 00000000 .* +#------------------------------------------------------------------------------ +#------ 000100b0: taf4 [R_ARM_REL32] +#------ 000100b4: ttf4 [R_ARM_ABS32] +#------ 000100b8: ttf4 [R_ARM_REL32] +#------ 000100bc: tbf4 [R_ARM_ABS32] +#------------------------------------------------------------------------------ + 100b0 00000000 00000000 00000000 00000000 .* +#------------------------------------------------------------------------------ +#------ 000100c0: tbf4 [R_ARM_REL32] +#------------------------------------------------------------------------------ + 100c0 00000000 .* +Contents of section \.got: +#------------------------------------------------------------------------------ +#------ 00011000: .got.plt +#------ 00011004: reserved .got.plt entry +#------ 00011008: reserved .got.plt entry +#------ 0001100c: atf2's .got.plt entry [R_ARM_JUMP_SLOT] +#------------------------------------------------------------------------------ + 11000 00200100 00000000 00000000 00900000 .* +#------------------------------------------------------------------------------ +#------ 00011010: aaf4's .got.plt entry [R_ARM_JUMP_SLOT] +#------ 00011014: ttf2's .got.plt entry [R_ARM_JUMP_SLOT] +#------ 00011018: tbf2's .got.plt entry [R_ARM_JUMP_SLOT] +#------ 0001101c: taf2's .got.plt entry [R_ARM_JUMP_SLOT] +#------------------------------------------------------------------------------ + 11010 00900000 00900000 00900000 00900000 .* +#------------------------------------------------------------------------------ +#------ 00011020: aaf2's .got.plt entry [R_ARM_JUMP_SLOT] +#------ 00011024: abf4's .got.plt entry [R_ARM_JUMP_SLOT] +#------ 00011028: tbf4's .got.plt entry [R_ARM_JUMP_SLOT] +#------ 0001102c: ttf4's .got.plt entry [R_ARM_JUMP_SLOT] +#------------------------------------------------------------------------------ + 11020 00900000 00900000 00900000 00900000 .* +#------------------------------------------------------------------------------ +#------ 00011030: atf4's .got.plt entry [R_ARM_JUMP_SLOT] +#------ 00011034: taf4's .got.plt entry [R_ARM_JUMP_SLOT] +#------ 00011038: abf2's .got.plt entry [R_ARM_JUMP_SLOT] +#------ 0001103c: aaf1's .igot.plt entry [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 11030 00900000 00900000 00900000 00a00000 .* +#------------------------------------------------------------------------------ +#------ 00011040: atf1's .igot.plt entry [R_ARM_IRELATIVE] +#------ 00011044: abf1's .igot.plt entry [R_ARM_IRELATIVE] +#------ 00011048: taf1's .igot.plt entry [R_ARM_IRELATIVE] +#------ 0001104c: ttf1's .igot.plt entry [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 11040 04a00000 08a00000 0da00000 0fa00000 .* +#------------------------------------------------------------------------------ +#------ 00011050: tbf1's .igot.plt entry [R_ARM_IRELATIVE] +#------ 00011054: atf3's .igot.plt entry [R_ARM_IRELATIVE] +#------ 00011058: abf3's .igot.plt entry [R_ARM_IRELATIVE] +#------ 0001105c: ttf3's .igot.plt entry [R_ARM_IRELATIVE] +#------------------------------------------------------------------------------ + 11050 11a00000 18a00000 1ca00000 23a00000 .* +#------------------------------------------------------------------------------ +#------ 00011060: tbf3's .igot.plt entry [R_ARM_IRELATIVE] +#------ 00011064: taf3's .igot.plt entry [R_ARM_IRELATIVE] +#------ 00011068: aaf3's .igot.plt entry [R_ARM_IRELATIVE] +#------ 0001106c: .got entry for foo [R_ARM_RELATIVE] +#------------------------------------------------------------------------------ + 11060 25a00000 21a00000 14a00000 00000100 .* +#------------------------------------------------------------------------------ +#------ 00011070: .got entry for foo [R_ARM_RELATIVE] +#------ 00011074: .got entry for atf2 [R_ARM_GLOB_DAT] +#------ 00011078: .got entry for aaf4 [R_ARM_GLOB_DAT] +#------ 0001107c: .got entry for ttf2 [R_ARM_GLOB_DAT] +#------------------------------------------------------------------------------ + 11070 00000100 00000000 00000000 00000000 .* +#------------------------------------------------------------------------------ +#------ 00011080: .got entry for tbf2 [R_ARM_GLOB_DAT] +#------ 00011084: .got entry for taf2 [R_ARM_GLOB_DAT] +#------ 00011088: .got entry for aaf2 [R_ARM_GLOB_DAT] +#------ 0001108c: .got entry for abf4 [R_ARM_GLOB_DAT] +#------------------------------------------------------------------------------ + 11080 00000000 00000000 00000000 00000000 .* +#------------------------------------------------------------------------------ +#------ 00011090: .got entry for tbf4 [R_ARM_GLOB_DAT] +#------ 00011094: .got entry for ttf4 [R_ARM_GLOB_DAT] +#------ 00011098: .got entry for atf4 [R_ARM_GLOB_DAT] +#------ 0001109c: .got entry for taf4 [R_ARM_GLOB_DAT] +#------------------------------------------------------------------------------ + 11090 00000000 00000000 00000000 00000000 .* +#------------------------------------------------------------------------------ +#------ 000110a0: .got entry for abf2 [R_ARM_GLOB_DAT] +#------------------------------------------------------------------------------ + 110a0 00000000 .* diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-8.rd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-8.rd new file mode 100644 index 0000000..a8ad1f2 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-8.rd @@ -0,0 +1,80 @@ + +Relocation section '\.rel\.dyn' at offset 0x8000 contains 62 entries: + Offset Info Type Sym\.Value Sym\. Name +0001106c ......17 R_ARM_RELATIVE +00011070 ......17 R_ARM_RELATIVE +00010004 ......a0 R_ARM_IRELATIVE +0001000c ......a0 R_ARM_IRELATIVE +00010014 ......a0 R_ARM_IRELATIVE +0001001c ......a0 R_ARM_IRELATIVE +00010024 ......a0 R_ARM_IRELATIVE +0001002c ......a0 R_ARM_IRELATIVE +00010064 ......a0 R_ARM_IRELATIVE +0001006c ......a0 R_ARM_IRELATIVE +00010074 ......a0 R_ARM_IRELATIVE +0001007c ......a0 R_ARM_IRELATIVE +00010084 ......a0 R_ARM_IRELATIVE +0001008c ......a0 R_ARM_IRELATIVE +0001103c ......a0 R_ARM_IRELATIVE +00011040 ......a0 R_ARM_IRELATIVE +00011044 ......a0 R_ARM_IRELATIVE +00011048 ......a0 R_ARM_IRELATIVE +0001104c ......a0 R_ARM_IRELATIVE +00011050 ......a0 R_ARM_IRELATIVE +00011054 ......a0 R_ARM_IRELATIVE +00011058 ......a0 R_ARM_IRELATIVE +0001105c ......a0 R_ARM_IRELATIVE +00011060 ......a0 R_ARM_IRELATIVE +00011064 ......a0 R_ARM_IRELATIVE +00011068 ......a0 R_ARM_IRELATIVE +00010034 ......02 R_ARM_ABS32 00000000 aaf2 +00010038 ......03 R_ARM_REL32 00000000 aaf2 +00011088 ......15 R_ARM_GLOB_DAT 00000000 aaf2 +0001003c ......02 R_ARM_ABS32 00000000 atf2 +00010040 ......03 R_ARM_REL32 00000000 atf2 +00011074 ......15 R_ARM_GLOB_DAT 00000000 atf2 +00010044 ......02 R_ARM_ABS32 00000000 abf2 +00010048 ......03 R_ARM_REL32 00000000 abf2 +000110a0 ......15 R_ARM_GLOB_DAT 00000000 abf2 +0001004c ......02 R_ARM_ABS32 00000000 taf2 +00010050 ......03 R_ARM_REL32 00000000 taf2 +00011084 ......15 R_ARM_GLOB_DAT 00000000 taf2 +00010054 ......02 R_ARM_ABS32 00000000 ttf2 +00010058 ......03 R_ARM_REL32 00000000 ttf2 +0001107c ......15 R_ARM_GLOB_DAT 00000000 ttf2 +0001005c ......02 R_ARM_ABS32 00000000 tbf2 +00010060 ......03 R_ARM_REL32 00000000 tbf2 +00011080 ......15 R_ARM_GLOB_DAT 00000000 tbf2 +00010094 ......02 R_ARM_ABS32 00000000 aaf4 +00010098 ......03 R_ARM_REL32 00000000 aaf4 +00011078 ......15 R_ARM_GLOB_DAT 00000000 aaf4 +0001009c ......02 R_ARM_ABS32 00000000 atf4 +000100a0 ......03 R_ARM_REL32 00000000 atf4 +00011098 ......15 R_ARM_GLOB_DAT 00000000 atf4 +000100a4 ......02 R_ARM_ABS32 00000000 abf4 +000100a8 ......03 R_ARM_REL32 00000000 abf4 +0001108c ......15 R_ARM_GLOB_DAT 00000000 abf4 +000100ac ......02 R_ARM_ABS32 00000000 taf4 +000100b0 ......03 R_ARM_REL32 00000000 taf4 +0001109c ......15 R_ARM_GLOB_DAT 00000000 taf4 +000100b4 ......02 R_ARM_ABS32 00000000 ttf4 +000100b8 ......03 R_ARM_REL32 00000000 ttf4 +00011094 ......15 R_ARM_GLOB_DAT 00000000 ttf4 +000100bc ......02 R_ARM_ABS32 00000000 tbf4 +000100c0 ......03 R_ARM_REL32 00000000 tbf4 +00011090 ......15 R_ARM_GLOB_DAT 00000000 tbf4 + +Relocation section '\.rel\.plt' at offset 0x81f0 contains 12 entries: + Offset Info Type Sym\.Value Sym\. Name +0001100c ......16 R_ARM_JUMP_SLOT 00000000 atf2 +00011010 ......16 R_ARM_JUMP_SLOT 00000000 aaf4 +00011014 ......16 R_ARM_JUMP_SLOT 00000000 ttf2 +00011018 ......16 R_ARM_JUMP_SLOT 00000000 tbf2 +0001101c ......16 R_ARM_JUMP_SLOT 00000000 taf2 +00011020 ......16 R_ARM_JUMP_SLOT 00000000 aaf2 +00011024 ......16 R_ARM_JUMP_SLOT 00000000 abf4 +00011028 ......16 R_ARM_JUMP_SLOT 00000000 tbf4 +0001102c ......16 R_ARM_JUMP_SLOT 00000000 ttf4 +00011030 ......16 R_ARM_JUMP_SLOT 00000000 atf4 +00011034 ......16 R_ARM_JUMP_SLOT 00000000 taf4 +00011038 ......16 R_ARM_JUMP_SLOT 00000000 abf2 diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-8.s b/binutils-2.24/ld/testsuite/ld-arm/ifunc-8.s new file mode 100644 index 0000000..3947f7f --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-8.s @@ -0,0 +1,88 @@ + .syntax unified + .arch armv6t2 + + .macro define,name,type + .type \name,%gnu_indirect_function + \type +\name: + mov pc,lr + .size \name,.-\name + .endm + + .macro define2,name + define aa\name,.arm + define at\name,.arm + define ab\name,.arm + define ta\name,.thumb_func + define tt\name,.thumb_func + define tb\name,.thumb_func + .endm + + .macro test_relocs,name,width + bl \name(PLT) + b\width \name + beq\width \name + ldr r4,1f + ldr r4,2f +1: + .word \name(GOT) +2: + .word \name(GOT_PREL) + .endm + + .macro test_relocs2,name,type,width + test_relocs a\type\name,\width + test_relocs t\type\name,\width + test_relocs ab\name,\width + test_relocs tb\name,\width + .endm + + .macro diff,name + .word \name + .word \name-. + .endm + + .macro alldirs,doit,name + \doit aa\name + \doit at\name + \doit ab\name + \doit ta\name + \doit tt\name + \doit tb\name + .endm + + define2 f1 + define2 f3 + + alldirs .globl,f3 + alldirs .hidden,f3 + + .globl arm + .type arm,%function + .arm +arm: + test_relocs foo + test_relocs2 f1,a, + test_relocs2 f2,a, + test_relocs2 f3,a, + test_relocs2 f4,a, + .size arm,.-arm + + .globl _thumb + .type _thumb,%function + .thumb_func +_thumb: + test_relocs foo + test_relocs2 f1,t,.w + test_relocs2 f2,t,.w + test_relocs2 f3,t,.w + test_relocs2 f4,t,.w + .size _thumb,.-_thumb + + .data +foo: + .word 0x11223344 + alldirs diff,f1 + alldirs diff,f2 + alldirs diff,f3 + alldirs diff,f4 diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-9.dd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-9.dd new file mode 100644 index 0000000..36139d9 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-9.dd @@ -0,0 +1,154 @@ + +.* + + +Disassembly of section \.plt: + +00009000 <\.plt>: + 9000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) + 9004: e59fe004 ldr lr, \[pc, #4\] ; 9010 <f3-0x1c> + 9008: e08fe00e add lr, pc, lr + 900c: e5bef008 ldr pc, \[lr, #8\]! +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got.plt +#------------------------------------------------------------------------------ + 9010: 00007ff0 \.word 0x00007ff0 +#------------------------------------------------------------------------------ +#------ f2's .plt entry +#------------------------------------------------------------------------------ + 9014: e28fc600 add ip, pc, #0, 12 + 9018: e28cca07 add ip, ip, #28672 ; 0x7000 + 901c: e5bcfff0 ldr pc, \[ip, #4080\]! ; 0xff0 + +Disassembly of section \.iplt: + +00009020 <f3-0xc>: +#------------------------------------------------------------------------------ +#------ f1's .iplt entry +#------------------------------------------------------------------------------ + 9020: e28fc600 add ip, pc, #0, 12 + 9024: e28cca07 add ip, ip, #28672 ; 0x7000 + 9028: e5bcffe8 ldr pc, \[ip, #4072\]! ; 0xfe8 + +0000902c <f3>: + 902c: e28fc600 add ip, pc, #0, 12 + 9030: e28cca07 add ip, ip, #28672 ; 0x7000 + 9034: e5bcffe0 ldr pc, \[ip, #4064\]! ; 0xfe0 + +Disassembly of section \.text: + +0000a000 <f1>: + a000: e1a0f00e mov pc, lr + a004: e1a0f00e mov pc, lr + +0000a008 <_start>: + a008: eb0017fc bl 10000 <foo> + a00c: e59f400c ldr r4, \[pc, #12\] ; a020 <_start\+0x18> + a010: e59f400c ldr r4, \[pc, #12\] ; a024 <_start\+0x1c> + a014: e59f400c ldr r4, \[pc, #12\] ; a028 <_start\+0x20> + a018: e59f400c ldr r4, \[pc, #12\] ; a02c <_start\+0x24> + a01c: e59f500c ldr r5, \[pc, #12\] ; a030 <_start\+0x28> +#------------------------------------------------------------------------------ +#------ foo +#------------------------------------------------------------------------------ + a020: 00010000 \.word 0x00010000 +#------------------------------------------------------------------------------ +#------ PC-relative offset of foo +#------------------------------------------------------------------------------ + a024: 00005fdc \.word 0x00005fdc +#------------------------------------------------------------------------------ +#------ GP-relative offset of foo +#------------------------------------------------------------------------------ + a028: fffff000 \.word 0xfffff000 +#------------------------------------------------------------------------------ +#------ .got offset for foo +#------------------------------------------------------------------------------ + a02c: 00000020 \.word 0x00000020 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for foo +#------------------------------------------------------------------------------ + a030: 00006fe8 \.word 0x00006fe8 +#------------------------------------------------------------------------------ +#------ f1's .iplt entry +#------------------------------------------------------------------------------ + a034: ebfffbf9 bl 9020 <f3-0xc> + a038: e59f400c ldr r4, \[pc, #12\] ; a04c <_start\+0x44> + a03c: e59f400c ldr r4, \[pc, #12\] ; a050 <_start\+0x48> + a040: e59f400c ldr r4, \[pc, #12\] ; a054 <_start\+0x4c> + a044: e59f400c ldr r4, \[pc, #12\] ; a058 <_start\+0x50> + a048: e59f500c ldr r5, \[pc, #12\] ; a05c <_start\+0x54> +#------------------------------------------------------------------------------ +#------ f1's .iplt entry +#------------------------------------------------------------------------------ + a04c: 00009020 \.word 0x00009020 +#------------------------------------------------------------------------------ +#------ PC-relative offset of f1's .iplt entry +#------------------------------------------------------------------------------ + a050: ffffefd0 \.word 0xffffefd0 +#------------------------------------------------------------------------------ +#------ GP-relative offset of f1's .iplt entry +#------------------------------------------------------------------------------ + a054: ffff8020 \.word 0xffff8020 +#------------------------------------------------------------------------------ +#------ .got offset for f1's .iplt entry +#------------------------------------------------------------------------------ + a058: 0000001c \.word 0x0000001c +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for f1's .iplt entry +#------------------------------------------------------------------------------ + a05c: 00006fc0 \.word 0x00006fc0 +#------------------------------------------------------------------------------ +#------ f2's .plt entry +#------------------------------------------------------------------------------ + a060: ebfffbeb bl 9014 <f3-0x18> + a064: e59f400c ldr r4, \[pc, #12\] ; a078 <_start\+0x70> + a068: e59f400c ldr r4, \[pc, #12\] ; a07c <_start\+0x74> + a06c: e59f400c ldr r4, \[pc, #12\] ; a080 <_start\+0x78> + a070: e59f400c ldr r4, \[pc, #12\] ; a084 <_start\+0x7c> + a074: e59f500c ldr r5, \[pc, #12\] ; a088 <_start\+0x80> +#------------------------------------------------------------------------------ +#------ f2's .plt entry +#------------------------------------------------------------------------------ + a078: 00009014 \.word 0x00009014 +#------------------------------------------------------------------------------ +#------ PC-relative offset of f2's .plt entry +#------------------------------------------------------------------------------ + a07c: ffffef98 \.word 0xffffef98 +#------------------------------------------------------------------------------ +#------ GP-relative offset of f2's .plt entry +#------------------------------------------------------------------------------ + a080: ffff8014 \.word 0xffff8014 +#------------------------------------------------------------------------------ +#------ .got offset for f2 +#------------------------------------------------------------------------------ + a084: 00000028 \.word 0x00000028 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for f2 +#------------------------------------------------------------------------------ + a088: 00006fa0 \.word 0x00006fa0 + a08c: ebfffbe6 bl 902c <f3> + a090: e59f400c ldr r4, \[pc, #12\] ; a0a4 <_start\+0x9c> + a094: e59f400c ldr r4, \[pc, #12\] ; a0a8 <_start\+0xa0> + a098: e59f400c ldr r4, \[pc, #12\] ; a0ac <_start\+0xa4> + a09c: e59f400c ldr r4, \[pc, #12\] ; a0b0 <_start\+0xa8> + a0a0: e59f500c ldr r5, \[pc, #12\] ; a0b4 <_start\+0xac> +#------------------------------------------------------------------------------ +#------ f3 +#------------------------------------------------------------------------------ + a0a4: 0000902c \.word 0x0000902c +#------------------------------------------------------------------------------ +#------ PC-relative offset of f3 +#------------------------------------------------------------------------------ + a0a8: ffffef84 \.word 0xffffef84 +#------------------------------------------------------------------------------ +#------ GP-relative offset of f3 +#------------------------------------------------------------------------------ + a0ac: ffff802c \.word 0xffff802c +#------------------------------------------------------------------------------ +#------ .got offset for f3 +#------------------------------------------------------------------------------ + a0b0: 00000024 \.word 0x00000024 +#------------------------------------------------------------------------------ +#------ PC-relative offset of .got entry for f3 +#------------------------------------------------------------------------------ + a0b4: 00006f70 \.word 0x00006f70 diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-9.gd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-9.gd new file mode 100644 index 0000000..6f220d1 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-9.gd @@ -0,0 +1,29 @@ + +.* + +Contents of section \.data: +#------------------------------------------------------------------------------ +#------ 00010000: foo +#------------------------------------------------------------------------------ + 10000 44332211 .* +Contents of section \.got: +#------------------------------------------------------------------------------ +#------ 00011000: .got.plt +#------ 00011004: reserved .got.plt entry +#------ 00011008: reserved .got.plt entry +#------ 0001100c: f2's .got.plt entry [R_ARM_JUMP_SLOT] +#------------------------------------------------------------------------------ + 11000 00200100 00000000 00000000 00900000 .* +#------------------------------------------------------------------------------ +#------ 00011010: f1's .igot.plt entry [R_ARM_IRELATIVE] +#------ 00011014: f3's .igot.plt pointer to 0xa004 [R_ARM_IRELATIVE] +#------ 00011018: .got entry for foo +#------ 0001101c: .got entry for f1's .iplt entry +#------------------------------------------------------------------------------ + 11010 00a00000 04a00000 00000100 20900000 .* +#------------------------------------------------------------------------------ +#------ 00011020: .got entry for foo +#------ 00011024: .got entry for f3 +#------ 00011028: .got entry for f2 [R_ARM_GLOB_DAT] +#------------------------------------------------------------------------------ + 11020 00000100 2c900000 00000000 .* diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-9.rd b/binutils-2.24/ld/testsuite/ld-arm/ifunc-9.rd new file mode 100644 index 0000000..689f663 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-9.rd @@ -0,0 +1,10 @@ + +Relocation section '\.rel\.dyn' at offset 0x8000 contains 3 entries: + Offset Info Type Sym\.Value Sym\. Name +00011010 ......a0 R_ARM_IRELATIVE +00011014 ......a0 R_ARM_IRELATIVE +00011028 ......15 R_ARM_GLOB_DAT 00009014 f2 + +Relocation section '\.rel\.plt' at offset 0x8018 contains 1 entries: + Offset Info Type Sym\.Value Sym\. Name +0001100c ......16 R_ARM_JUMP_SLOT 00009014 f2 diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-9.s b/binutils-2.24/ld/testsuite/ld-arm/ifunc-9.s new file mode 100644 index 0000000..25b682f --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-9.s @@ -0,0 +1,44 @@ + .macro define,name + .type \name,%gnu_indirect_function +\name: + mov pc,lr + .size \name,.-\name + .endm + + .macro test_relocs,name + bl \name + ldr r4,1f + ldr r4,2f + ldr r4,3f + ldr r4,4f + ldr r5,5f +1: + .word \name +2: + .word \name-. +3: + .word \name(GOTOFF) +4: + .word \name(GOT) +5: + .word \name(GOT_PREL) + .endm + + .global f3 + .hidden f3 + + define f1 + # f2 provided by ifunc-3.so + define f3 + + .globl _start +_start: + test_relocs foo + test_relocs f1 + test_relocs f2 + test_relocs f3 + .size _start,.-_start + + .data +foo: + .word 0x11223344 diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-dynamic.ld b/binutils-2.24/ld/testsuite/ld-arm/ifunc-dynamic.ld new file mode 100644 index 0000000..1e030d8 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-dynamic.ld @@ -0,0 +1,33 @@ +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x07000; + .hash : { *(.hash) } + .gnu.hash : { *(.gnu.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + . = 0x08000; + .rel.dyn : { + *(.rel.dyn) + *(.rel.data) + *(.rel.got) + PROVIDE_HIDDEN (__irel_start = .); + *(.rel.iplt) + PROVIDE_HIDDEN (__irel_end = .); + } + .rel.plt : { *(.rel.plt) } + . = 0x09000; + .plt : { *(.plt) } + .iplt : { *(.iplt) } + . = 0x0A000; + .text : { *(.text) } + . = 0x10000; + .data : { *(.data) } + . = 0x11000; + .got : { *(.got.plt) *(.igot.plt) *(.got) *(.igot) } + . = 0x12000; + .dynamic : { *(.dynamic) } + . = 0x13000; + .bss : { *(.bss) } +} diff --git a/binutils-2.24/ld/testsuite/ld-arm/ifunc-static.ld b/binutils-2.24/ld/testsuite/ld-arm/ifunc-static.ld new file mode 100644 index 0000000..80cf6a2 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/ifunc-static.ld @@ -0,0 +1,21 @@ +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x08000; + .rel.dyn : { + PROVIDE_HIDDEN (__irel_start = .); + *(.rel.iplt) + PROVIDE_HIDDEN (__irel_end = .); + } + . = 0x09000; + .iplt : { *(.iplt) } + . = 0x0A000; + .text : { *(.text) } + . = 0x10000; + .data : { *(.data) } + . = 0x11000; + .got : { *(.got.plt) *(.igot.plt) *(.got) *(.igot) } + . = 0x12000; + .bss : { *(.bss) } +} diff --git a/binutils-2.24/ld/testsuite/ld-arm/jump-reloc-veneers-long.d b/binutils-2.24/ld/testsuite/ld-arm/jump-reloc-veneers-long.d new file mode 100644 index 0000000..c69e688 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/jump-reloc-veneers-long.d @@ -0,0 +1,21 @@ + +.*: file format.* + + +Disassembly of section destsect: + +09000000 <[^>]*>: + 9000000: e7fe b.n 9000000 <dest> + +Disassembly of section .text: + +000080.. <[^>]*>: + 80..: b802f000 .word 0xb802f000 + 80..: 00000000 andeq r0, r0, r0 + +000080.. <[^>]*>: + 80..: 4778 bx pc + 80..: 46c0 nop ; \(mov r8, r8\) + 80..: e59fc000 ldr ip, \[pc\] ; 80.. <__dest_veneer\+0xc> + 80..: e12fff1c bx ip + 80..: 09000001 .word 0x09000001 diff --git a/binutils-2.24/ld/testsuite/ld-arm/jump-reloc-veneers-short1.d b/binutils-2.24/ld/testsuite/ld-arm/jump-reloc-veneers-short1.d new file mode 100644 index 0000000..3796652 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/jump-reloc-veneers-short1.d @@ -0,0 +1,13 @@ + +.*: file format.* + + +Disassembly of section destsect: + +00009000 <[^>]*>: + 9000: e7fe b.n 9000 <dest> + +Disassembly of section .text: + +000080.. <[^>]*>: + 80..: f000 bf.. b.w 9000 <dest> diff --git a/binutils-2.24/ld/testsuite/ld-arm/jump-reloc-veneers-short2.d b/binutils-2.24/ld/testsuite/ld-arm/jump-reloc-veneers-short2.d new file mode 100644 index 0000000..22fa6df --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/jump-reloc-veneers-short2.d @@ -0,0 +1,13 @@ + +.*: file format.* + + +Disassembly of section destsect: + +00900000 <[^>]*>: + 900000: e7fe b.n 900000 <dest> + +Disassembly of section .text: + +000080.. <[^>]*>: + 80..: f0f7 9f.. b.w 900000 <dest> diff --git a/binutils-2.24/ld/testsuite/ld-arm/jump-reloc-veneers.s b/binutils-2.24/ld/testsuite/ld-arm/jump-reloc-veneers.s new file mode 100644 index 0000000..c646e71 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/jump-reloc-veneers.s @@ -0,0 +1,12 @@ + .text + .syntax unified + .thumb_func + .global _start + .type _start,%function +_start: + b.w dest + + .section destsect, "x" + .thumb_func +dest: + b.n dest diff --git a/binutils-2.24/ld/testsuite/ld-arm/jump19.d b/binutils-2.24/ld/testsuite/ld-arm/jump19.d new file mode 100644 index 0000000..a631de2 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/jump19.d @@ -0,0 +1,12 @@ + +.*jump19: file format elf32-(big|little)arm.* + +Disassembly of section .text: + +00008000 <_start>: + 8000: 4280 cmp r0, r0 + 8002: f010 8000 beq.w 18006 <bar> + ... + +00018006 <bar>: + 18006: 4770 bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/jump19.s b/binutils-2.24/ld/testsuite/ld-arm/jump19.s new file mode 100644 index 0000000..1e3ddf0 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/jump19.s @@ -0,0 +1,12 @@ +@ Test the Thumb-2 JUMP19 relocation. + + .syntax unified + .thumb + .global _start +_start: + cmp r0, r0 + beq.w bar + .space 65536 + .weak bar +bar: + bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/main.s b/binutils-2.24/ld/testsuite/ld-arm/main.s new file mode 100644 index 0000000..046d19d --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/main.s @@ -0,0 +1,8 @@ + .text + .globl _start + .type _start, %function +_start: + str lr, [sp, #-4]! + bl hidfn(PLT) + ldmfd sp!, {pc} + .size _start, . - _start diff --git a/binutils-2.24/ld/testsuite/ld-arm/mixed-app-v5.d b/binutils-2.24/ld/testsuite/ld-arm/mixed-app-v5.d new file mode 100644 index 0000000..82013f3 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/mixed-app-v5.d @@ -0,0 +1,56 @@ + +tmpdir/mixed-app-v5: file format elf32-(little|big)arm +architecture: armv4t, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x.* + +Disassembly of section .plt: + +.* <.plt>: + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) + .*: e59fe004 ldr lr, \[pc, #4\] ; .* <_start-0x28> + .*: e08fe00e add lr, pc, lr + .*: e5bef008 ldr pc, \[lr, #8\]! + .*: .* + .*: e28fc6.* add ip, pc, #.* + .*: e28cca.* add ip, ip, #.* ; 0x.* + .*: e5bcf.* ldr pc, \[ip, #.*\]!.* + .*: e28fc6.* add ip, pc, #.* + .*: e28cca.* add ip, ip, #.* ; 0x.* + .*: e5bcf.* ldr pc, \[ip, #.*\]!.* +Disassembly of section .text: + +.* <_start>: + .*: e1a0c00d mov ip, sp + .*: e92dd800 push {fp, ip, lr, pc} + .*: eb000004 bl .* <app_func> + .*: e89d6800 ldm sp, {fp, sp, lr} + .*: e12fff1e bx lr + .*: e1a00000 nop ; \(mov r0, r0\) + .*: e1a00000 nop ; \(mov r0, r0\) + .*: e1a00000 nop ; \(mov r0, r0\) + +.* <app_func>: + .*: e1a0c00d mov ip, sp + .*: e92dd800 push {fp, ip, lr, pc} + .*: ebffffee bl .* + .*: e89d6800 ldm sp, {fp, sp, lr} + .*: e12fff1e bx lr + .*: e1a00000 nop ; \(mov r0, r0\) + .*: e1a00000 nop ; \(mov r0, r0\) + .*: e1a00000 nop ; \(mov r0, r0\) + +.* <app_func2>: + .*: e12fff1e bx lr + .*: e1a00000 nop ; \(mov r0, r0\) + .*: e1a00000 nop ; \(mov r0, r0\) + .*: e1a00000 nop ; \(mov r0, r0\) + +.* <app_tfunc>: + .*: b500 push {lr} + .*: f7ff efc. blx .* <_start-0x..> + .*: bd00 pop {pc} + .*: 4770 bx lr + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) diff --git a/binutils-2.24/ld/testsuite/ld-arm/mixed-app.d b/binutils-2.24/ld/testsuite/ld-arm/mixed-app.d new file mode 100644 index 0000000..4de8e57 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/mixed-app.d @@ -0,0 +1,58 @@ + +tmpdir/mixed-app: file format elf32-(little|big)arm +architecture: armv4t, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x.* + +Disassembly of section .plt: + +.* <.plt>: + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) + .*: e59fe004 ldr lr, \[pc, #4\] ; .* <_start-0x28> + .*: e08fe00e add lr, pc, lr + .*: e5bef008 ldr pc, \[lr, #8\]! + .*: .* + .*: 4778 bx pc + .*: 46c0 nop ; \(mov r8, r8\) + .*: e28fc6.* add ip, pc, #.* + .*: e28cca.* add ip, ip, #.* ; 0x.* + .*: e5bcf.* ldr pc, \[ip, #.*\]!.* + .*: e28fc6.* add ip, pc, #.* + .*: e28cca.* add ip, ip, #.* ; 0x.* + .*: e5bcf.* ldr pc, \[ip, #.*\]!.* +Disassembly of section .text: + +.* <_start>: + .*: e1a0c00d mov ip, sp + .*: e92dd800 push {fp, ip, lr, pc} + .*: eb000004 bl .* <app_func> + .*: e89d6800 ldm sp, {fp, sp, lr} + .*: e12fff1e bx lr + .*: e1a00000 nop ; \(mov r0, r0\) + .*: e1a00000 nop ; \(mov r0, r0\) + .*: e1a00000 nop ; \(mov r0, r0\) + +.* <app_func>: + .*: e1a0c00d mov ip, sp + .*: e92dd800 push {fp, ip, lr, pc} + .*: ebffff.. bl .* + .*: e89d6800 ldm sp, {fp, sp, lr} + .*: e12fff1e bx lr + .*: e1a00000 nop ; \(mov r0, r0\) + .*: e1a00000 nop ; \(mov r0, r0\) + .*: e1a00000 nop ; \(mov r0, r0\) + +.* <app_func2>: + .*: e12fff1e bx lr + .*: e1a00000 nop ; \(mov r0, r0\) + .*: e1a00000 nop ; \(mov r0, r0\) + .*: e1a00000 nop ; \(mov r0, r0\) + +.* <app_tfunc>: + .*: b500 push {lr} + .*: f7ff ffc. bl .* <_start-0x..> + .*: bd00 pop {pc} + .*: 4770 bx lr + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) diff --git a/binutils-2.24/ld/testsuite/ld-arm/mixed-app.r b/binutils-2.24/ld/testsuite/ld-arm/mixed-app.r new file mode 100644 index 0000000..648e92f --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/mixed-app.r @@ -0,0 +1,10 @@ + +tmpdir/mixed-app.*: file format elf32-(little|big)arm + +DYNAMIC RELOCATION RECORDS +OFFSET TYPE VALUE +.* R_ARM_COPY data_obj +.* R_ARM_JUMP_SLOT lib_func2 +.* R_ARM_JUMP_SLOT lib_func1 + + diff --git a/binutils-2.24/ld/testsuite/ld-arm/mixed-app.s b/binutils-2.24/ld/testsuite/ld-arm/mixed-app.s new file mode 100644 index 0000000..ce82487 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/mixed-app.s @@ -0,0 +1,39 @@ + .text + .p2align 4 + .globl _start +_start: + mov ip, sp + stmdb sp!, {r11, ip, lr, pc} + bl app_func + ldmia sp, {r11, sp, lr} + bx lr + + .p2align 4 + .globl app_func + .type app_func,%function +app_func: + mov ip, sp + stmdb sp!, {r11, ip, lr, pc} + bl lib_func1 + ldmia sp, {r11, sp, lr} + bx lr + + .p2align 4 + .globl app_func2 + .type app_func2,%function +app_func2: + bx lr + + .p2align 4 + .globl app_tfunc + .type app_tfunc,%function + .thumb_func + .code 16 +app_tfunc: + push {lr} + bl lib_func2 + pop {pc} + bx lr + + .data + .long data_obj diff --git a/binutils-2.24/ld/testsuite/ld-arm/mixed-app.sym b/binutils-2.24/ld/testsuite/ld-arm/mixed-app.sym new file mode 100644 index 0000000..cfa35f5 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/mixed-app.sym @@ -0,0 +1,15 @@ + +Symbol table for image: + +Num +Buc: +Value +Size +Type +Bind +Vis +Ndx +Name + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +11 _edata + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +12 __bss_start__ + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +12 _end + +.. +..: ........ +4 +OBJECT +GLOBAL +DEFAULT +12 data_obj + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +12 __bss_end__ + +.. +..: 0*[^0]*.* +0 +FUNC +GLOBAL +DEFAULT +UND lib_func1 + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +11 __data_start + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +12 __end__ + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +12 __bss_start + +.. +..: .......0 +0 +FUNC +GLOBAL +DEFAULT +8 app_func2 + +.. +..: 0*[^0]*.* +0 +FUNC +GLOBAL +DEFAULT +UND lib_func2 + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +12 _bss_end__ diff --git a/binutils-2.24/ld/testsuite/ld-arm/mixed-lib.d b/binutils-2.24/ld/testsuite/ld-arm/mixed-lib.d new file mode 100644 index 0000000..d3a9ff9 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/mixed-lib.d @@ -0,0 +1,38 @@ + +tmpdir/mixed-lib.so: file format elf32-(little|big)arm +architecture: armv4t, flags 0x00000150: +HAS_SYMS, DYNAMIC, D_PAGED +start address 0x.* + +Disassembly of section .plt: + +.* <.plt>: + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) + .*: e59fe004 ldr lr, \[pc, #4\] ; .* <lib_func1-0x.*> + .*: e08fe00e add lr, pc, lr + .*: e5bef008 ldr pc, \[lr, #8\]! + .*: .* + .*: e28fc6.* add ip, pc, #.* + .*: e28cca.* add ip, ip, #.* ; 0x.* + .*: e5bcf.* ldr pc, \[ip, #.*\]!.* +Disassembly of section .text: + +.* <lib_func1>: + .*: e1a0c00d mov ip, sp + .*: e92dd800 push {fp, ip, lr, pc} + .*: ebfffff. bl .* <lib_func1-0x..?> + .*: e89d6800 ldm sp, {fp, sp, lr} + .*: e12fff1e bx lr + .*: e1a00000 nop ; \(mov r0, r0\) + .*: e1a00000 nop ; \(mov r0, r0\) + .*: e1a00000 nop ; \(mov r0, r0\) + +.* <lib_func2>: + .*: 4770 bx lr + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) + .*: 46c0 nop ; \(mov r8, r8\) diff --git a/binutils-2.24/ld/testsuite/ld-arm/mixed-lib.r b/binutils-2.24/ld/testsuite/ld-arm/mixed-lib.r new file mode 100644 index 0000000..0137880 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/mixed-lib.r @@ -0,0 +1,8 @@ + +tmpdir/mixed-lib.so: file format elf32-(little|big)arm + +DYNAMIC RELOCATION RECORDS +OFFSET TYPE VALUE +.* R_ARM_JUMP_SLOT app_func2 + + diff --git a/binutils-2.24/ld/testsuite/ld-arm/mixed-lib.s b/binutils-2.24/ld/testsuite/ld-arm/mixed-lib.s new file mode 100644 index 0000000..86f5ace --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/mixed-lib.s @@ -0,0 +1,28 @@ + .text + + .p2align 4 + .globl lib_func1 + .type lib_func1, %function +lib_func1: + mov ip, sp + stmdb sp!, {r11, ip, lr, pc} + bl app_func2 + ldmia sp, {r11, sp, lr} + bx lr + .size lib_func1, . - lib_func1 + + .p2align 4 + .globl lib_func2 + .type lib_func2, %function + .thumb_func + .code 16 +lib_func2: + bx lr + .size lib_func2, . - lib_func2 + + .data + .globl data_obj + .type data_obj, %object +data_obj: + .long 0 + .size data_obj, . - data_obj diff --git a/binutils-2.24/ld/testsuite/ld-arm/mixed-lib.sym b/binutils-2.24/ld/testsuite/ld-arm/mixed-lib.sym new file mode 100644 index 0000000..f5b16dc --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/mixed-lib.sym @@ -0,0 +1,15 @@ + +Symbol table for image: + +Num +Buc: +Value +Size +Type +Bind +Vis +Ndx +Name + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +9 _edata + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +9 __bss_start__ + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +9 _end + +.. +..: ........ +4 +OBJECT +GLOBAL +DEFAULT +9 data_obj + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +9 __bss_end__ + +.. +..: .......0 +20 +FUNC +GLOBAL +DEFAULT +6 lib_func1 + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +9 __data_start + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +9 __end__ + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +9 __bss_start + +.. +..: 00000000 +0 +NOTYPE +GLOBAL +DEFAULT +UND app_func2 + +.. +..: .......1 +2 +FUNC +GLOBAL +DEFAULT +6 lib_func2 + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +9 _bss_end__ diff --git a/binutils-2.24/ld/testsuite/ld-arm/movw-merge.d b/binutils-2.24/ld/testsuite/ld-arm/movw-merge.d new file mode 100644 index 0000000..40e1681 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/movw-merge.d @@ -0,0 +1,13 @@ + +.*: file format.* + +Disassembly of section .text: + +00008000 <[^>]*>: + 8000: e3080013 movw r0, #32787 ; 0x8013 + 8004: e3400000 movt r0, #0 + +00008008 <[^>]*>: + 8008: f248 0013 movw r0, #32787 ; 0x8013 + 800c: f2c0 0000 movt r0, #0 + diff --git a/binutils-2.24/ld/testsuite/ld-arm/movw-merge.s b/binutils-2.24/ld/testsuite/ld-arm/movw-merge.s new file mode 100644 index 0000000..17c70a5 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/movw-merge.s @@ -0,0 +1,20 @@ + .arch armv7-a + .syntax unified + .text + .global _start + .type _start, %function +_start: + movw r0, #:lower16:.LC0 + movt r0, #:upper16:.LC0 + .thumb + .global tfunc + .type tfunc, %function +tfunc: + movw r0, #:lower16:.LC0 + movt r0, #:upper16:.LC0 + + .section .rodata.str1.4,"aMS",%progbits,1 + .align 2 + .ascii "pad" +.LC0: + .ascii "inner: cont \000" diff --git a/binutils-2.24/ld/testsuite/ld-arm/movw-shared-1.d b/binutils-2.24/ld/testsuite/ld-arm/movw-shared-1.d new file mode 100644 index 0000000..5a05818 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/movw-shared-1.d @@ -0,0 +1,4 @@ +#name: MOVW/MOVT shared libraries test 1 +#source: movw-shared-1.s +#ld: -shared +#error: .*: relocation R_ARM_MOVW_ABS_NC against `a' can not be used when making a shared object; recompile with -fPIC diff --git a/binutils-2.24/ld/testsuite/ld-arm/movw-shared-1.s b/binutils-2.24/ld/testsuite/ld-arm/movw-shared-1.s new file mode 100644 index 0000000..512946a --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/movw-shared-1.s @@ -0,0 +1,5 @@ +.arch armv7-a +.text +.syntax unified +f: +movw r0, #:lower16:a diff --git a/binutils-2.24/ld/testsuite/ld-arm/movw-shared-2.d b/binutils-2.24/ld/testsuite/ld-arm/movw-shared-2.d new file mode 100644 index 0000000..08ceaf0 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/movw-shared-2.d @@ -0,0 +1,4 @@ +#name: MOVW/MOVT shared libraries test 2 +#source: movw-shared-2.s +#ld: -shared +#error: .*: relocation R_ARM_MOVT_ABS against `b' can not be used when making a shared object; recompile with -fPIC diff --git a/binutils-2.24/ld/testsuite/ld-arm/movw-shared-2.s b/binutils-2.24/ld/testsuite/ld-arm/movw-shared-2.s new file mode 100644 index 0000000..bd70b76 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/movw-shared-2.s @@ -0,0 +1,5 @@ +.arch armv7-a +.text +.syntax unified +f: +movt r0, #:upper16:b diff --git a/binutils-2.24/ld/testsuite/ld-arm/movw-shared-3.d b/binutils-2.24/ld/testsuite/ld-arm/movw-shared-3.d new file mode 100644 index 0000000..90b9cf1 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/movw-shared-3.d @@ -0,0 +1,4 @@ +#name: MOVW/MOVT shared libraries test 3 +#source: movw-shared-3.s +#ld: -shared +#error: .*: relocation R_ARM_THM_MOVW_ABS_NC against `c' can not be used when making a shared object; recompile with -fPIC diff --git a/binutils-2.24/ld/testsuite/ld-arm/movw-shared-3.s b/binutils-2.24/ld/testsuite/ld-arm/movw-shared-3.s new file mode 100644 index 0000000..a4db9a9 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/movw-shared-3.s @@ -0,0 +1,6 @@ +.arch armv7-a +.text +.syntax unified +f: +.thumb +movw r0, #:lower16:c diff --git a/binutils-2.24/ld/testsuite/ld-arm/movw-shared-4.d b/binutils-2.24/ld/testsuite/ld-arm/movw-shared-4.d new file mode 100644 index 0000000..cc7a418 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/movw-shared-4.d @@ -0,0 +1,4 @@ +#name: MOVW/MOVT shared libraries test 4 +#source: movw-shared-4.s +#ld: -shared +#error: .*: relocation R_ARM_THM_MOVT_ABS against `d' can not be used when making a shared object; recompile with -fPIC diff --git a/binutils-2.24/ld/testsuite/ld-arm/movw-shared-4.s b/binutils-2.24/ld/testsuite/ld-arm/movw-shared-4.s new file mode 100644 index 0000000..09f2952 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/movw-shared-4.s @@ -0,0 +1,6 @@ +.arch armv7-a +.text +.syntax unified +f: +.thumb +movt r0, #:upper16:d diff --git a/binutils-2.24/ld/testsuite/ld-arm/preempt-app.s b/binutils-2.24/ld/testsuite/ld-arm/preempt-app.s new file mode 100644 index 0000000..f1eccc2 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/preempt-app.s @@ -0,0 +1,27 @@ + @ Preempt an ARM shared library function with a Thumb function + @ in the application. + .text + .p2align 4 + .globl _start +_start: + mov ip, sp + stmdb sp!, {r11, ip, lr, pc} + bl lib_func1 + ldmia sp, {r11, sp, lr} + bx lr + + .p2align 4 + .globl app_func2 + .type app_func2,%function +app_func2: + bx lr + + .p2align 4 + .globl lib_func1 + .type lib_func1,%function + .thumb_func +lib_func1: + bx lr + + .data + .long data_obj diff --git a/binutils-2.24/ld/testsuite/ld-arm/preempt-app.sym b/binutils-2.24/ld/testsuite/ld-arm/preempt-app.sym new file mode 100644 index 0000000..ec1d6be --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/preempt-app.sym @@ -0,0 +1,14 @@ + +Symbol table for image: + +Num +Buc: +Value +Size +Type +Bind +Vis +Ndx +Name + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +9 _edata + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +10 __bss_start__ + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +10 _end + +.. +..: ........ +4 +OBJECT +GLOBAL +DEFAULT +10 data_obj + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +10 __bss_end__ + +.. +..: .......1 +20 +FUNC +GLOBAL +DEFAULT +6 lib_func1 + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +9 __data_start + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +10 __end__ + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +10 __bss_start + +.. +..: .......0 +0 +FUNC +GLOBAL +DEFAULT +6 app_func2 + +.. +..: ........ +0 +NOTYPE +GLOBAL +DEFAULT +10 _bss_end__ diff --git a/binutils-2.24/ld/testsuite/ld-arm/reloc-boundaries.d b/binutils-2.24/ld/testsuite/ld-arm/reloc-boundaries.d new file mode 100644 index 0000000..4bfaf0a --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/reloc-boundaries.d @@ -0,0 +1,6 @@ + +[^:]*: file format elf32-(little|big)arm.* + +Contents of section .text: + [0-9a-f]+ 80ff0080 ffff ...... +#... diff --git a/binutils-2.24/ld/testsuite/ld-arm/reloc-boundaries.s b/binutils-2.24/ld/testsuite/ld-arm/reloc-boundaries.s new file mode 100644 index 0000000..7e65bc0 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/reloc-boundaries.s @@ -0,0 +1,5 @@ +.syntax unified + .byte x -128 + .byte x +255 + .short y -32768 + .short y +65535 diff --git a/binutils-2.24/ld/testsuite/ld-arm/rodata-merge-map.ld b/binutils-2.24/ld/testsuite/ld-arm/rodata-merge-map.ld new file mode 100644 index 0000000..0790bcb --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/rodata-merge-map.ld @@ -0,0 +1,9 @@ +/* Script for ld testsuite */ +OUTPUT_ARCH(arm) +SECTIONS +{ + .rodata : + { + *(.rodata*) + } +} diff --git a/binutils-2.24/ld/testsuite/ld-arm/rodata-merge-map.sym b/binutils-2.24/ld/testsuite/ld-arm/rodata-merge-map.sym new file mode 100644 index 0000000..b1070a3 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/rodata-merge-map.sym @@ -0,0 +1,8 @@ + +Symbol table '.symtab' contains 5 entries: + Num: Value Size Type Bind Vis Ndx Name + 0: 00000000 0 NOTYPE LOCAL DEFAULT UND + 1: 00000000 0 SECTION LOCAL DEFAULT 1 + 2: 00000000 0 SECTION LOCAL DEFAULT 2 + 3: 00000000 0 NOTYPE LOCAL DEFAULT 1 \$d + 4: 0000000c 0 NOTYPE LOCAL DEFAULT 1 \$d diff --git a/binutils-2.24/ld/testsuite/ld-arm/rodata-merge-map1.s b/binutils-2.24/ld/testsuite/ld-arm/rodata-merge-map1.s new file mode 100644 index 0000000..df57c4b --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/rodata-merge-map1.s @@ -0,0 +1,8 @@ +@ Test to ensure that no nameless mapping symbol is inserted +@ within a merged section. +@ This file contains the 1st contribution, which is expected to +@ generate a $d symbol at its beginning. + + .section .rodata.str1.1,"aMS",%progbits,1 +.LC0: + .string "Hello world" diff --git a/binutils-2.24/ld/testsuite/ld-arm/rodata-merge-map2.s b/binutils-2.24/ld/testsuite/ld-arm/rodata-merge-map2.s new file mode 100644 index 0000000..7136774 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/rodata-merge-map2.s @@ -0,0 +1,9 @@ +@ This file contains the 2nd contribution, which is expected to +@ be fully merged into the 1st contribution (from +@ rodata-merge-map1.s), and generate no mapping symbol (which +@ would otherwise be converted in a symbol table entry with no +@ name). + + .section .rodata.str1.1,"aMS",%progbits,1 +.LC0: + .string "world" diff --git a/binutils-2.24/ld/testsuite/ld-arm/rodata-merge-map3.s b/binutils-2.24/ld/testsuite/ld-arm/rodata-merge-map3.s new file mode 100644 index 0000000..45aaef0 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/rodata-merge-map3.s @@ -0,0 +1,9 @@ +@ This file contains the 3rd contribution, which is expected to +@ be partially merged into the 1st contribution (from +@ rodata-merge-map1.s), and generate a (redundant, but harmless) +@ $d mapping symbol. + + .section .rodata.str1.1,"aMS",%progbits,1 +.LC0: + .string "foo" + .string "world" diff --git a/binutils-2.24/ld/testsuite/ld-arm/script-type.ld b/binutils-2.24/ld/testsuite/ld-arm/script-type.ld new file mode 100644 index 0000000..01995eb --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/script-type.ld @@ -0,0 +1,9 @@ +SECTIONS { + .text : { + foo_a = bar_a; + foo_t = bar_t; + foo_o = bar_o; + *(.text) + } + .ARM.attribues 0 : { *(.ARM.attributes) } +} diff --git a/binutils-2.24/ld/testsuite/ld-arm/script-type.s b/binutils-2.24/ld/testsuite/ld-arm/script-type.s new file mode 100644 index 0000000..f9d41e8 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/script-type.s @@ -0,0 +1,20 @@ +.syntax unified +.text +.global bar_a +.type bar_a %function +bar_a: +bx lr + +.p2align 4 +.global bar_o +.type bar_o %object +bar_o: +.word 0 + +.p2align 4 +.thumb +.global bar_t +.type bar_t %function +bar_t: +bx lr + diff --git a/binutils-2.24/ld/testsuite/ld-arm/script-type.sym b/binutils-2.24/ld/testsuite/ld-arm/script-type.sym new file mode 100644 index 0000000..4b54dd6 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/script-type.sym @@ -0,0 +1,18 @@ + +Symbol table '.symtab' contains [0-9]+ entries: + +Num: +Value +Size Type +Bind +Vis +Ndx Name +.* 0+ +0 NOTYPE +LOCAL +DEFAULT +UND +.* 0+ +0 SECTION LOCAL +DEFAULT +1 +.* 0+ +0 SECTION LOCAL +DEFAULT +2 +.* 0+ +0 FILE +LOCAL +DEFAULT +ABS .* +.* 0+ +0 NOTYPE +LOCAL +DEFAULT +1 \$a +.* 0+10 +0 NOTYPE +LOCAL +DEFAULT +1 \$d +.* 0+14 +0 NOTYPE +LOCAL +DEFAULT +1 \$a +.* 0+20 +0 NOTYPE +LOCAL +DEFAULT +1 \$t +.* 0+ +0 FILE +LOCAL +DEFAULT +ABS .* +.* 0+10 +0 OBJECT +GLOBAL DEFAULT +1 bar_o +.* 0+21 +0 FUNC +GLOBAL DEFAULT +1 bar_t +.* 0+ +0 FUNC +GLOBAL DEFAULT +1 foo_a +.* 0+21 +0 FUNC +GLOBAL DEFAULT +1 foo_t +.* 0+10 +0 OBJECT +GLOBAL DEFAULT +1 foo_o +.* 0+ +0 FUNC +GLOBAL DEFAULT +1 bar_a diff --git a/binutils-2.24/ld/testsuite/ld-arm/symbian-seg1.d b/binutils-2.24/ld/testsuite/ld-arm/symbian-seg1.d new file mode 100644 index 0000000..21d8a00 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/symbian-seg1.d @@ -0,0 +1,8 @@ +#source: symbian-seg1.s +#ld: -Ttext 0x10000 -Tdata 0x400000 +#objdump: -dR +#... + +10000: 00400000 .word 0x00400000 + +10000: R_ARM_RELATIVE .data + +10004: 00010008 .word 0x00010008 + +10004: R_ARM_RELATIVE .text diff --git a/binutils-2.24/ld/testsuite/ld-arm/symbian-seg1.s b/binutils-2.24/ld/testsuite/ld-arm/symbian-seg1.s new file mode 100644 index 0000000..8f893a2 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/symbian-seg1.s @@ -0,0 +1,13 @@ + .text + .globl _start +_start: + .word datavar + .word rodatavar + + .section ".rodata", "a" +rodatavar: + .word 0 + + .section ".data", "aw" +datavar: + .word 0 diff --git a/binutils-2.24/ld/testsuite/ld-arm/thumb-b-lks-sym.d b/binutils-2.24/ld/testsuite/ld-arm/thumb-b-lks-sym.d new file mode 100644 index 0000000..cc23bc3 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/thumb-b-lks-sym.d @@ -0,0 +1,7 @@ + +.*: file format.* + +Disassembly of section .text: + +00000000 <main>: + 0: f000 bffe b.w 1000 <.*> diff --git a/binutils-2.24/ld/testsuite/ld-arm/thumb-b-lks-sym.s b/binutils-2.24/ld/testsuite/ld-arm/thumb-b-lks-sym.s new file mode 100644 index 0000000..ae62f8b --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/thumb-b-lks-sym.s @@ -0,0 +1,16 @@ +@ Test to ensure that the b to linker script symbol isn't changed to other format. + + + .syntax unified + .cpu cortex-m3 + .fpu softvfp + .thumb + .file "x.c" + .text + .align 2 + .global main + .thumb + .thumb_func + .type main, %function +main: + b extFunc diff --git a/binutils-2.24/ld/testsuite/ld-arm/thumb-bl-lks-sym.d b/binutils-2.24/ld/testsuite/ld-arm/thumb-bl-lks-sym.d new file mode 100644 index 0000000..1da6928 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/thumb-bl-lks-sym.d @@ -0,0 +1,12 @@ + +.*: file format.* + +Disassembly of section .text: + +00000000 <main>: + 0: b580 push {r7, lr} + 2: af00 add r7, sp, #0 + 4: f000 fffc bl 1000 <.*> + 8: bd80 pop {r7, pc} + a: bf00 nop + diff --git a/binutils-2.24/ld/testsuite/ld-arm/thumb-bl-lks-sym.s b/binutils-2.24/ld/testsuite/ld-arm/thumb-bl-lks-sym.s new file mode 100644 index 0000000..60b7c3a --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/thumb-bl-lks-sym.s @@ -0,0 +1,19 @@ +@ Test to ensure that the bl to linker script symbol isn't changed to blx with immediate address. + + + .syntax unified + .cpu cortex-m3 + .fpu softvfp + .thumb + .file "x.c" + .text + .align 2 + .global main + .thumb + .thumb_func + .type main, %function +main: + push {r7, lr} + add r7, sp, #0 + bl extFunc + pop {r7, pc} diff --git a/binutils-2.24/ld/testsuite/ld-arm/thumb-entry.d b/binutils-2.24/ld/testsuite/ld-arm/thumb-entry.d new file mode 100644 index 0000000..602fd6c --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/thumb-entry.d @@ -0,0 +1,3 @@ +#... + Entry point address: 0x8001 +#... diff --git a/binutils-2.24/ld/testsuite/ld-arm/thumb-entry.s b/binutils-2.24/ld/testsuite/ld-arm/thumb-entry.s new file mode 100644 index 0000000..5b3659d --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/thumb-entry.s @@ -0,0 +1,8 @@ + .text + .arch armv4t + .thumb + .global _start + .thumb_func +_start: + bx lr + diff --git a/binutils-2.24/ld/testsuite/ld-arm/thumb-rel32.d b/binutils-2.24/ld/testsuite/ld-arm/thumb-rel32.d new file mode 100644 index 0000000..34cde4d --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/thumb-rel32.d @@ -0,0 +1,7 @@ + +.*: file format.* + +Contents of section .text: + 8000 (00000011 fffffffd 00ffffff f8000000|11000000 fdffffff 00f8ffff ff000000) .* +# Ignore .ARM.attributes section +#... diff --git a/binutils-2.24/ld/testsuite/ld-arm/thumb-rel32.s b/binutils-2.24/ld/testsuite/ld-arm/thumb-rel32.s new file mode 100644 index 0000000..83eb0e5 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/thumb-rel32.s @@ -0,0 +1,18 @@ + .text + .arch armv4t + .global _start + .type _start, %function + .thumb_func +_start: + .word bar - . + .word _start - . + .byte 0 + .4byte (_start - .) + 1 + .byte 0, 0, 0 + .section .after, "ax", %progbits + .global bar + .type bar, %function + .thumb_func +bar: + .word 0 + .ident "GCC: (GNU) 4.1.0 (CodeSourcery ARM)" diff --git a/binutils-2.24/ld/testsuite/ld-arm/thumb1-bl.d b/binutils-2.24/ld/testsuite/ld-arm/thumb1-bl.d new file mode 100644 index 0000000..a10db01 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/thumb1-bl.d @@ -0,0 +1,11 @@ + +.*thumb1-bl: file format elf32-.*arm.* + +Disassembly of section .text: + +00001000 <_start>: + 1000: f3ff fffe bl 401000 <bar> +Disassembly of section .foo: + +00401000 <bar>: + 401000: 4770 bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/thumb1-bl.s b/binutils-2.24/ld/testsuite/ld-arm/thumb1-bl.s new file mode 100644 index 0000000..cdecaa4 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/thumb1-bl.s @@ -0,0 +1,22 @@ +@ Test to ensure that a Thumb-1 BL works. + + .arch armv5t + .global _start + .syntax unified + +@ We will place the section .text at 0x1000. + + .text + .thumb_func + +_start: + bl bar + +@ We will place the section .foo at 0x401000. + + .section .foo, "xa" + .thumb_func + +bar: + bx lr + diff --git a/binutils-2.24/ld/testsuite/ld-arm/thumb2-b-interwork.d b/binutils-2.24/ld/testsuite/ld-arm/thumb2-b-interwork.d new file mode 100644 index 0000000..67cb863 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/thumb2-b-interwork.d @@ -0,0 +1,16 @@ + +.*thumb2-b-interwork: file format elf32-.*arm.* + +Disassembly of section .text: + +[0-9a-f]+ <_start>: + +[0-9a-f]+: f000 b802 b.w [0-9a-f]+ <__bar_from_thumb> + +[0-9a-f]+ <bar>: + +[0-9a-f]+: e12fff1e bx lr + +[0-9a-f]+ <__bar_from_thumb>: + +[0-9a-f]+: 4778 bx pc + +[0-9a-f]+: 46c0 nop ; \(mov r8, r8\) + +[0-9a-f]+: eafffffc b [0-9a-f]+ <bar> + diff --git a/binutils-2.24/ld/testsuite/ld-arm/thumb2-b-interwork.s b/binutils-2.24/ld/testsuite/ld-arm/thumb2-b-interwork.s new file mode 100644 index 0000000..4452a8f --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/thumb2-b-interwork.s @@ -0,0 +1,20 @@ +@ Test to ensure that a Thumb-2 B.W can branch to an ARM funtion. + + .arch armv7-a + .global _start + .syntax unified + .text + .thumb_func + +_start: + b.w bar + +@ Put this in a separate section to force the assembler to generate a reloc + + .arm + .section .after, "xa" + .global bar + .type bar, %function +bar: + bx lr + diff --git a/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl-as-thumb1-bad-noeabi.d b/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl-as-thumb1-bad-noeabi.d new file mode 100644 index 0000000..8872909 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl-as-thumb1-bad-noeabi.d @@ -0,0 +1,22 @@ +.*: file format .* + +Disassembly of section .text: + +00001000 <_start>: + 1000: f000 f802 bl 1008 <__bar_veneer> + 1004: 0000 movs r0, r0 + ... + +00001008 <__bar_veneer>: + 1008: b401 push {r0} + 100a: 4802 ldr r0, \[pc, #8\] \(1014 <__bar_veneer\+0xc>\) + 100c: 4684 mov ip, r0 + 100e: bc01 pop {r0} + 1010: 4760 bx ip + 1012: bf00 nop + 1014: 0100100d .word 0x0100100d + +Disassembly of section .foo: + +0100100c <bar>: + 100100c: 4770 bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl-as-thumb1-bad.d b/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl-as-thumb1-bad.d new file mode 100644 index 0000000..6b47810 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl-as-thumb1-bad.d @@ -0,0 +1,17 @@ +.*: file format .* + +Disassembly of section .text: + +00001000 <_start>: + 1000: f000 e802 blx 1008 <__bar_veneer> + 1004: 0000 movs r0, r0 + \.\.\. + +00001008 <__bar_veneer>: + 1008: e51ff004 ldr pc, \[pc, #-4\] ; 100c <__bar_veneer\+0x4> + 100c: 0100100d .word 0x0100100d + +Disassembly of section .foo: + +0100100c <bar>: + 100100c: 4770 bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl-as-thumb1-bad.s b/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl-as-thumb1-bad.s new file mode 100644 index 0000000..834001c --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl-as-thumb1-bad.s @@ -0,0 +1,22 @@ +@ Test to ensure that a Thumb-1 BL with a Thumb-2-only offset makes the linker generate a stub. + + .arch armv5t + .global _start + .syntax unified + +@ We will place the section .text at 0x1000. + + .text + .thumb_func + +_start: + bl bar + +@ We will place the section .foo at 0x100100c. + + .section .foo, "xa" + .thumb_func + +bar: + bx lr + diff --git a/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl-bad-noeabi.d b/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl-bad-noeabi.d new file mode 100644 index 0000000..8872909 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl-bad-noeabi.d @@ -0,0 +1,22 @@ +.*: file format .* + +Disassembly of section .text: + +00001000 <_start>: + 1000: f000 f802 bl 1008 <__bar_veneer> + 1004: 0000 movs r0, r0 + ... + +00001008 <__bar_veneer>: + 1008: b401 push {r0} + 100a: 4802 ldr r0, \[pc, #8\] \(1014 <__bar_veneer\+0xc>\) + 100c: 4684 mov ip, r0 + 100e: bc01 pop {r0} + 1010: 4760 bx ip + 1012: bf00 nop + 1014: 0100100d .word 0x0100100d + +Disassembly of section .foo: + +0100100c <bar>: + 100100c: 4770 bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl-bad.d b/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl-bad.d new file mode 100644 index 0000000..d78e451 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl-bad.d @@ -0,0 +1,16 @@ +.*: file format .* + +Disassembly of section .text: + +00001000 <_start>: + 1000: f000 e802 blx 1008 <__bar_veneer> + 1004: 0000 movs r0, r0 + \.\.\. + +00001008 <__bar_veneer>: + 1008: e51ff004 ldr pc, \[pc, #-4\] ; 100c <__bar_veneer\+0x4> + 100c: 0100100d .word 0x0100100d +Disassembly of section .foo: + +0100100c <bar>: + 100100c: 4770 bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl-bad.s b/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl-bad.s new file mode 100644 index 0000000..7685860 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl-bad.s @@ -0,0 +1,22 @@ +@ Test to ensure that a Thumb-2 BL with an oversize offset makes the linker generate a stub. + + .arch armv7 + .global _start + .syntax unified + +@ We will place the section .text at 0x1000. + + .text + .thumb_func + +_start: + bl bar + +@ We will place the section .foo at 0x100100c. + + .section .foo, "xa" + .thumb_func + +bar: + bx lr + diff --git a/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl-blx-interwork.d b/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl-blx-interwork.d new file mode 100644 index 0000000..ba5a732 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl-blx-interwork.d @@ -0,0 +1,71 @@ + +.*: file format .* + + +Disassembly of section \.text: + +00008000 <_start>: + 8000: f000 e81a blx 8038 <arm0> + 8004: f000 e81e blx 8044 <arm4> + 8008: bf00 nop + 800a: f000 e816 blx 8038 <arm0> + 800e: f000 e81a blx 8044 <arm4> + 8012: bf00 nop + 8014: f000 f818 bl 8048 <thumb0> + 8018: f000 f81b bl 8052 <thumb2> + 801c: f000 f81e bl 805c <thumb4> + 8020: f000 f821 bl 8066 <thumb6> + 8024: bf00 nop + 8026: f000 f80f bl 8048 <thumb0> + 802a: f000 f812 bl 8052 <thumb2> + 802e: f000 f815 bl 805c <thumb4> + 8032: f000 f818 bl 8066 <thumb6> + 8036: bf00 nop + +00008038 <arm0>: + 8038: e12fff1e bx lr + 803c: e320f000 nop \{0\} + 8040: e320f000 nop \{0\} + +00008044 <arm4>: + 8044: e12fff1e bx lr + +00008048 <thumb0>: + 8048: 4770 bx lr + 804a: bf00 nop + 804c: f3af 8000 nop\.w + 8050: bf00 nop + +00008052 <thumb2>: + 8052: 4770 bx lr + 8054: f3af 8000 nop\.w + 8058: bf00 nop + 805a: bf00 nop + +0000805c <thumb4>: + 805c: 4770 bx lr + 805e: bf00 nop + 8060: bf00 nop + 8062: bf00 nop + 8064: bf00 nop + +00008066 <thumb6>: + 8066: 4770 bx lr + +00008068 <backwards>: + 8068: f7ff efe6 blx 8038 <arm0> + 806c: f7ff efea blx 8044 <arm4> + 8070: bf00 nop + 8072: f7ff efe2 blx 8038 <arm0> + 8076: f7ff efe6 blx 8044 <arm4> + 807a: bf00 nop + 807c: f7ff ffe4 bl 8048 <thumb0> + 8080: f7ff ffe7 bl 8052 <thumb2> + 8084: f7ff ffea bl 805c <thumb4> + 8088: f7ff ffed bl 8066 <thumb6> + 808c: bf00 nop + 808e: f7ff ffdb bl 8048 <thumb0> + 8092: f7ff ffde bl 8052 <thumb2> + 8096: f7ff ffe1 bl 805c <thumb4> + 809a: f7ff ffe4 bl 8066 <thumb6> + 809e: bf00 nop diff --git a/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl-blx-interwork.s b/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl-blx-interwork.s new file mode 100644 index 0000000..dba46af --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl-blx-interwork.s @@ -0,0 +1,87 @@ + .arch armv7-a + .global _start + .syntax unified + .text + .thumb + + .macro do_calls + @ The following four instructions are accepted by gas, but generate + @ meaningless code. + @bl.w arm0 + @bl.w arm4 + @nop + @bl.w arm0 + @bl.w arm4 + @nop + blx.w arm0 + blx.w arm4 + nop + blx.w arm0 + blx.w arm4 + nop + bl.w thumb0 + bl.w thumb2 + bl.w thumb4 + bl.w thumb6 + nop + bl.w thumb0 + bl.w thumb2 + bl.w thumb4 + bl.w thumb6 + nop + @ These eight are all accepted by gas, but generate bad code. + @blx.w thumb0 + @blx.w thumb2 + @blx.w thumb4 + @blx.w thumb6 + @nop + @blx.w thumb0 + @blx.w thumb2 + @blx.w thumb4 + @blx.w thumb6 + .endm + + .thumb_func + .align 3 +_start: + do_calls + + .arm + .align 3 +arm0: + bx lr + + .align 3 + nop +arm4: + bx lr + + .thumb + .thumb_func + .align 3 +thumb0: + bx lr + + .thumb_func + .align 3 + nop +thumb2: + bx lr + + .thumb_func + .align 3 + nop + nop +thumb4: + bx lr + + .thumb_func + .align 3 + nop + nop + nop +thumb6: + bx lr + +backwards: + do_calls diff --git a/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl-undefweak.d b/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl-undefweak.d new file mode 100644 index 0000000..5c286be --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl-undefweak.d @@ -0,0 +1,9 @@ +#source: thumb2-bl-undefweak.s +#as: +#ld: -shared +#objdump: -dr +#... +Disassembly of section .text: + +.* <foo>: + +[0-9a-f]+: .... .... bl. [0-9a-f]+ <foo-0x[0-9a-f]+> diff --git a/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl-undefweak.s b/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl-undefweak.s new file mode 100644 index 0000000..5e70eea --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl-undefweak.s @@ -0,0 +1,10 @@ +@ Test that calls to undefined weak functions resolve to call through +@ the PLT in shared libraries. + + .arch armv7 + .syntax unified + .text + .thumb_func +foo: + bl bar + .weak bar diff --git a/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl-undefweak1.d b/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl-undefweak1.d new file mode 100644 index 0000000..a6907f5 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl-undefweak1.d @@ -0,0 +1,9 @@ +#source: thumb2-bl-undefweak1.s +#as: +#ld: -shared +#objdump: -dr +#... +Disassembly of section .text: + +.* <foo>: + +[0-9a-f]+: ........ bl [0-9a-f]+ <foo-0x[0-9a-f]+> diff --git a/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl-undefweak1.s b/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl-undefweak1.s new file mode 100644 index 0000000..a302811 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl-undefweak1.s @@ -0,0 +1,9 @@ +@ Test that calls to undefined weak functions resolve to call through +@ the PLT in shared libraries in ARM mode. + + .arch armv6 + .syntax unified + .text +foo: + bl bar + .weak bar diff --git a/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl.d b/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl.d new file mode 100644 index 0000000..298a044 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl.d @@ -0,0 +1,11 @@ + +.*thumb2-bl: file format elf32-.*arm.* + +Disassembly of section .text: + +00001000 <_start>: + 1000: f3ff d7fe bl 1001000 <bar> +Disassembly of section .foo: + +01001000 <bar>: + 1001000: 4770 bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl.s b/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl.s new file mode 100644 index 0000000..ddb1cd3 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/thumb2-bl.s @@ -0,0 +1,23 @@ +@ Test to ensure that a Thumb-2 BL works with an offset that is +@ not permissable for Thumb-1. + + .arch armv7 + .global _start + .syntax unified + +@ We will place the section .text at 0x1000. + + .text + .thumb_func + +_start: + bl bar + +@ We will place the section .foo at 0x1001000. + + .section .foo, "xa" + .thumb_func + +bar: + bx lr + diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-app.d b/binutils-2.24/ld/testsuite/ld-arm/tls-app.d new file mode 100644 index 0000000..a88ca7f --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-app.d @@ -0,0 +1,18 @@ + +.*: file format elf32-.*arm.* +architecture: armv4, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x000081c8 + +Disassembly of section .text: + +000081c8 <foo>: + 81c8: e1a00000 nop ; \(mov r0, r0\) + 81cc: e1a00000 nop ; \(mov r0, r0\) + 81d0: e1a0f00e mov pc, lr + 81d4: 000080bc .word 0x000080bc + 81d8: 000080b4 .word 0x000080b4 + 81dc: 000080ac .word 0x000080ac + 81e0: 00000004 .word 0x00000004 + 81e4: 000080c4 .word 0x000080c4 + 81e8: 00000014 .word 0x00000014 diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-app.r b/binutils-2.24/ld/testsuite/ld-arm/tls-app.r new file mode 100644 index 0000000..b156d52 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-app.r @@ -0,0 +1,10 @@ + +.*: file format elf32-.*arm.* + +DYNAMIC RELOCATION RECORDS +OFFSET TYPE VALUE +[0-9a-f]+ R_ARM_TLS_DTPMOD32 app_gd +[0-9a-f]+ R_ARM_TLS_DTPOFF32 app_gd +[0-9a-f]+ R_ARM_TLS_DTPMOD32 lib_gd +[0-9a-f]+ R_ARM_TLS_DTPOFF32 lib_gd +[0-9a-f]+ R_ARM_TLS_TPOFF32 app_ie diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-app.s b/binutils-2.24/ld/testsuite/ld-arm/tls-app.s new file mode 100644 index 0000000..d505295 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-app.s @@ -0,0 +1,34 @@ + .text + .globl foo + .type foo, %function +foo: + nop +.L2: + nop + mov pc, lr + +.Lpool: + .word lib_gd(tlsgd) + (. - .L2 - 8) + .word app_gd(tlsgd) + (. - .L2 - 8) + .word app_ld(tlsldm) + (. - .L2 - 8) + .word app_ld(tlsldo) + .word app_ie(gottpoff) + (. - .L2 - 8) + .word app_le(tpoff) + + .section .tdata,"awT" + .global app_gd +app_gd: + .space 4 + + .global app_ld +app_ld: + .space 4 + + .section .tbss,"awT",%nobits + .global app_ie +app_ie: + .space 4 + + .global app_le +app_le: + .space 4 diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-descrelax-be32.d b/binutils-2.24/ld/testsuite/ld-arm/tls-descrelax-be32.d new file mode 100644 index 0000000..c1c7fcd --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-descrelax-be32.d @@ -0,0 +1,108 @@ +.*: file format elf32-.* +architecture: armv5te, flags 0x[0-9a-f]+: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x[0-9a-f]+ + +Disassembly of section .text: + +00008000 <foo>: + 8000: e59f0004 ldr r0, \[pc, #4\] ; 800c <foo\+0xc> + 8004: e79f0000 ldr r0, \[pc, r0\] + 8008: e1a00000 nop ; .* + 800c: 00008138 .word 0x00008138 + 8010: e59f0004 ldr r0, \[pc, #4\] ; 801c <foo\+0x1c> + 8014: e79f0000 ldr r0, \[pc, r0\] + 8018: e1a00000 nop ; .* + 801c: 00008128 .word 0x00008128 + 8020: e59f0004 ldr r0, \[pc, #4\] ; 802c <foo\+0x2c> + 8024: e1a00000 nop ; .* + 8028: e1a00000 nop ; .* + 802c: 0000000c .word 0x0000000c + 8030: e59f0004 ldr r0, \[pc, #4\] ; 803c <foo\+0x3c> + 8034: e1a00000 nop ; .* + 8038: e1a00000 nop ; .* + 803c: 0000000c .word 0x0000000c + 8040: e59f000c ldr r0, \[pc, #12\] ; 8054 <foo\+0x54> + 8044: e08f0000 add r0, pc, r0 + 8048: e5901000 ldr r1, \[r0\] + 804c: e1a00001 mov r0, r1 + 8050: e1a00000 nop ; .* + 8054: 000080f8 .word 0x000080f8 + 8058: e59f000c ldr r0, \[pc, #12\] ; 806c <foo\+0x6c> + 805c: e08f0000 add r0, pc, r0 + 8060: e5901000 ldr r1, \[r0\] + 8064: e1a00001 mov r0, r1 + 8068: e1a00000 nop ; .* + 806c: 000080e0 .word 0x000080e0 + 8070: e59f000c ldr r0, \[pc, #12\] ; 8084 <foo\+0x84> + 8074: e1a00000 nop ; .* + 8078: e1a00000 nop ; .* + 807c: e1a00000 nop ; .* + 8080: e1a00000 nop ; .* + 8084: 0000000c .word 0x0000000c + 8088: e59f000c ldr r0, \[pc, #12\] ; 809c <foo\+0x9c> + 808c: e1a00000 nop ; .* + 8090: e1a00000 nop ; .* + 8094: e1a00000 nop ; .* + 8098: e1a00000 nop ; .* + 809c: 0000000c .word 0x0000000c + +000080a0 <bar>: + 80a0: 4801 ldr r0, \[pc, #4\] ; \(80a8 <bar\+0x8>\) + 80a2: 4478 add r0, pc + 80a4: 6800 ldr r0, \[r0, #0\] + 80a6: 46c0 nop ; .* + 80a8: 0000809e .word 0x0000809e + 80ac: 4801 ldr r0, \[pc, #4\] ; \(80b4 <bar\+0x14>\) + 80ae: 4478 add r0, pc + 80b0: 6800 ldr r0, \[r0, #0\] + 80b2: 46c0 nop ; .* + 80b4: 00008092 .word 0x00008092 + 80b8: 4801 ldr r0, \[pc, #4\] ; \(80c0 <bar\+0x20>\) + 80ba: 4478 add r0, pc + 80bc: 6800 ldr r0, \[r0, #0\] + 80be: 46c0 nop ; .* + 80c0: 0000808a .word 0x0000808a + 80c4: 4801 ldr r0, \[pc, #4\] ; \(80cc <bar\+0x2c>\) + 80c6: 46c0 nop ; .* + 80c8: 46c0 nop ; .* + 80ca: 46c0 nop ; .* + 80cc: 0000000c .word 0x0000000c + 80d0: 4801 ldr r0, \[pc, #4\] ; \(80d8 <bar\+0x38>\) + 80d2: bf00 nop + 80d4: bf00 nop + 80d6: 46c0 nop ; .* + 80d8: 0000000c .word 0x0000000c + 80dc: 4801 ldr r0, \[pc, #4\] ; \(80e4 <bar\+0x44>\) + 80de: bf00 nop + 80e0: bf00 nop + 80e2: 46c0 nop ; .* + 80e4: 00000014 .word 0x00000014 + 80e8: 4802 ldr r0, \[pc, #8\] ; \(80f4 <bar\+0x54>\) + 80ea: 4478 add r0, pc + 80ec: 6801 ldr r1, \[r0, #0\] + 80ee: 1c08 adds r0, r1, #0 + 80f0: 46c0 nop ; .* + 80f2: 46c0 nop ; .* + 80f4: 00008056 .word 0x00008056 + 80f8: 4802 ldr r0, \[pc, #8\] ; \(8104 <bar\+0x64>\) + 80fa: 4478 add r0, pc + 80fc: 6801 ldr r1, \[r0, #0\] + 80fe: 4608 mov r0, r1 + 8100: 46c0 nop ; .* + 8102: 46c0 nop ; .* + 8104: 00008046 .word 0x00008046 + 8108: 4802 ldr r0, \[pc, #8\] ; \(8114 <bar\+0x74>\) + 810a: 46c0 nop ; .* + 810c: 46c0 nop ; .* + 810e: 46c0 nop ; .* + 8110: 46c0 nop ; .* + 8112: 46c0 nop ; .* + 8114: 0000000c .word 0x0000000c + 8118: 4802 ldr r0, \[pc, #8\] ; \(8124 <bar\+0x84>\) + 811a: 46c0 nop ; .* + 811c: 46c0 nop ; .* + 811e: 46c0 nop ; .* + 8120: 46c0 nop ; .* + 8122: 46c0 nop ; .* + 8124: 0000000c .word 0x0000000c diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-descrelax-be32.s b/binutils-2.24/ld/testsuite/ld-arm/tls-descrelax-be32.s new file mode 100644 index 0000000..dae5458 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-descrelax-be32.s @@ -0,0 +1,198 @@ +@ we can relax local and non-weak globals for non-shared links + + .arch armv5te + .text + .arm + + .p2align 2 +foo: +@tlscall global, manually relaxed to IE + ldr r0, 1f +2: ldr r0, [pc, r0] + nop + .p2align 2 +1: .word gd1(gottpoff) + (. - 2b - 8) + + .p2align 2 +@tlscall global, should relax to IE + ldr r0, 1f +2: blx gd1(tlscall) + nop + .p2align 2 +1: .word gd1(tlsdesc) + (. - 2b) + + .p2align 2 +@tlscall local, manually relaxed to LE + ldr r0, 1f + nop + nop + .p2align 2 +1: .word ld1(tpoff) + + .p2align 2 +@tlscall local, should relax to LE + ldr r0, 1f +2: blx ld1(tlscall) + nop + .p2align 2 +1: .word ld1(tlsdesc) + (. - 2b) + + .p2align 2 +@open coded global, manually relaxed to IE + ldr r0, 1f +2: + add r0, pc, r0 + ldr r1, [r0] + mov r0, r1 + nop + .p2align 2 +1: .word gd1(gottpoff) + (. - 2b - 8) + + .p2align 2 +@open coded global, should relax to IE + ldr r0, 1f +2: +.tlsdescseq gd1 + add r0, pc, r0 +.tlsdescseq gd1 + ldr r1, [r0,#4] +.tlsdescseq gd1 + blx r1 + nop + .p2align 2 +1: .word gd1(tlsdesc) + (. - 2b) + + .p2align 2 +@open coded local, manually relaxed to LE + ldr r0, 1f +2: + nop + nop + nop + nop + .p2align 2 +1: .word ld1(tpoff) + + .p2align 2 +@open coded local, should relax to LE + ldr r0, 1f +2: +.tlsdescseq ld1 + add r0, pc, r0 +.tlsdescseq ld1 + ldr r1, [r0,#4] +.tlsdescseq ld1 + blx r1 + nop + .p2align 2 +1: .word ld1(tlsdesc) + (. - 2b) + + + .thumb + .p2align 1 +bar: +@tlscall global, manually relaxed to IE + ldr r0, 1f +2: add r0, pc, r0 + ldr r0, [r0] + nop + .p2align 2 +1: .word gd1(gottpoff) + (. - 2b - 4) + + .p2align 1 +@tlscall global, should relax to IE + ldr r0, 1f +2: blx gd1(tlscall) + nop + .p2align 2 +1: .word gd1(tlsdesc) + (. - 2b + 1) + + .p2align 1 +@tlscall global, should relax to IE + ldr r0, 1f +2: blx r1(tlscall) + nop + .p2align 2 +1: .word r1(tlsdesc) + (. - 2b + 1) + + .p2align 1 +@tlscall local, manually relaxed to LE + ldr r0, 1f + nop + nop + .p2align 2 +1: .word ld1(tpoff) + + .p2align 1 +@tlscall local, should relax to LE + ldr r0, 1f +2: blx ld1(tlscall) + nop + .p2align 2 +1: .word ld1(tlsdesc) + (. - 2b + 1) + + .p2align 1 +@tlscall local, should relax to LE + ldr r0, 1f +2: blx r0(tlscall) + nop + .p2align 2 +1: .word r0(tlsdesc) + (. - 2b + 1) + + .p2align 1 +@open coded global, manually relaxed to IE + ldr r0, 1f +2: + add r0, pc + ldr r1, [r0] + mov r0, r1 + nop + .p2align 2 +1: .word gd1(gottpoff) + (. - 2b - 4) + + .p2align 1 +@open coded global, should relax to IE + ldr r0, 1f +2: +.tlsdescseq gd1 + add r0, pc +.tlsdescseq gd1 + ldr r1, [r0,#4] +.tlsdescseq gd1 + blx r1 + nop + .p2align 2 +1: .word gd1(tlsdesc) + (. - 2b + 1) + + .p2align 1 +@open coded local, manually relaxed to LE + ldr r0, 1f +2: + nop + nop + nop + nop + .p2align 2 +1: .word ld1(tpoff) + + .p2align 1 +@open coded local, should relax to LE + ldr r0, 1f +2: +.tlsdescseq ld1 + add r0, pc +.tlsdescseq ld1 + ldr r1, [r0,#4] +.tlsdescseq ld1 + blx r1 + nop + .p2align 2 +1: .word ld1(tlsdesc) + (. - 2b + 1) + + .section .tdata,"awT" + .global gd1 +gd1: .space 4 +ld1: .space 4 + .globl r1 +r1: .space 4 +r0: .space 4 diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-descrelax-be8.d b/binutils-2.24/ld/testsuite/ld-arm/tls-descrelax-be8.d new file mode 100644 index 0000000..1b2159c --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-descrelax-be8.d @@ -0,0 +1,108 @@ +.*: file format elf32-.* +architecture: arm, flags 0x[0-9a-f]+: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x[0-9a-f]+ + +Disassembly of section .text: + +00008000 <foo>: + 8000: e59f0004 ldr r0, \[pc, #4\] ; 800c <foo\+0xc> + 8004: e79f0000 ldr r0, \[pc, r0\] + 8008: e320f000 nop \{0\} + 800c: 00008138 .word 0x00008138 + 8010: e59f0004 ldr r0, \[pc, #4\] ; 801c <foo\+0x1c> + 8014: e79f0000 ldr r0, \[pc, r0\] + 8018: e320f000 nop \{0\} + 801c: 00008128 .word 0x00008128 + 8020: e59f0004 ldr r0, \[pc, #4\] ; 802c <foo\+0x2c> + 8024: e320f000 nop \{0\} + 8028: e320f000 nop \{0\} + 802c: 0000000c .word 0x0000000c + 8030: e59f0004 ldr r0, \[pc, #4\] ; 803c <foo\+0x3c> + 8034: e1a00000 nop ; .* + 8038: e320f000 nop \{0\} + 803c: 0000000c .word 0x0000000c + 8040: e59f000c ldr r0, \[pc, #12\] ; 8054 <foo\+0x54> + 8044: e08f0000 add r0, pc, r0 + 8048: e5901000 ldr r1, \[r0\] + 804c: e1a00001 mov r0, r1 + 8050: e320f000 nop \{0\} + 8054: 000080f8 .word 0x000080f8 + 8058: e59f000c ldr r0, \[pc, #12\] ; 806c <foo\+0x6c> + 805c: e08f0000 add r0, pc, r0 + 8060: e5901000 ldr r1, \[r0\] + 8064: e1a00001 mov r0, r1 + 8068: e320f000 nop \{0\} + 806c: 000080e0 .word 0x000080e0 + 8070: e59f000c ldr r0, \[pc, #12\] ; 8084 <foo\+0x84> + 8074: e320f000 nop \{0\} + 8078: e320f000 nop \{0\} + 807c: e320f000 nop \{0\} + 8080: e320f000 nop \{0\} + 8084: 0000000c .word 0x0000000c + 8088: e59f000c ldr r0, \[pc, #12\] ; 809c <foo\+0x9c> + 808c: e1a00000 nop ; .* + 8090: e1a00000 nop ; .* + 8094: e1a00000 nop ; .* + 8098: e320f000 nop \{0\} + 809c: 0000000c .word 0x0000000c + +000080a0 <bar>: + 80a0: 4801 ldr r0, \[pc, #4\] ; \(80a8 <bar\+0x8>\) + 80a2: 4478 add r0, pc + 80a4: 6800 ldr r0, \[r0, #0\] + 80a6: 46c0 nop ; .* + 80a8: 0000809e .word 0x0000809e + 80ac: 4801 ldr r0, \[pc, #4\] ; \(80b4 <bar\+0x14>\) + 80ae: 4478 add r0, pc + 80b0: 6800 ldr r0, \[r0, #0\] + 80b2: 46c0 nop ; \(mov r8, r8\) + 80b4: 00008092 .word 0x00008092 + 80b8: 4801 ldr r0, \[pc, #4\] ; \(80c0 <bar\+0x20>\) + 80ba: 4478 add r0, pc + 80bc: 6800 ldr r0, \[r0, #0\] + 80be: 46c0 nop ; \(mov r8, r8\) + 80c0: 0000808a .word 0x0000808a + 80c4: 4801 ldr r0, \[pc, #4\] ; \(80cc <bar\+0x2c>\) + 80c6: 46c0 nop ; \(mov r8, r8\) + 80c8: 46c0 nop ; \(mov r8, r8\) + 80ca: bf00 nop + 80cc: 0000000c .word 0x0000000c + 80d0: 4801 ldr r0, \[pc, #4\] ; \(80d8 <bar\+0x38>\) + 80d2: (f3af 8000)|(bf00 ) nop(.w)? +#... + 80d6: 46c0 nop ; \(mov r8, r8\) + 80d8: 0000000c .word 0x0000000c + 80dc: 4801 ldr r0, \[pc, #4\] ; \(80e4 <bar\+0x44>\) + 80de: (f3af 8000)|(bf00 ) nop(.w)? +#... + 80e2: 46c0 nop ; \(mov r8, r8\) + 80e4: 00000014 .word 0x00000014 + 80e8: 4802 ldr r0, \[pc, #8\] ; \(80f4 <bar\+0x54>\) + 80ea: 4478 add r0, pc + 80ec: 6801 ldr r1, \[r0, #0\] + 80ee: 1c08 adds r0, r1, #0 + 80f0: 46c0 nop ; \(mov r8, r8\) + 80f2: bf00 nop + 80f4: 00008056 .word 0x00008056 + 80f8: 4802 ldr r0, \[pc, #8\] ; \(8104 <bar\+0x64>\) + 80fa: 4478 add r0, pc + 80fc: 6801 ldr r1, \[r0, #0\] + 80fe: 4608 mov r0, r1 + 8100: 46c0 nop ; \(mov r8, r8\) + 8102: bf00 nop + 8104: 00008046 .word 0x00008046 + 8108: 4802 ldr r0, \[pc, #8\] ; \(8114 <bar\+0x74>\) + 810a: 46c0 nop ; \(mov r8, r8\) + 810c: 46c0 nop ; \(mov r8, r8\) + 810e: 46c0 nop ; \(mov r8, r8\) + 8110: 46c0 nop ; \(mov r8, r8\) + 8112: bf00 nop + 8114: 0000000c .word 0x0000000c + 8118: 4802 ldr r0, \[pc, #8\] ; \(8124 <bar\+0x84>\) + 811a: 46c0 nop ; \(mov r8, r8\) + 811c: 46c0 nop ; \(mov r8, r8\) + 811e: 46c0 nop ; \(mov r8, r8\) + 8120: 46c0 nop ; \(mov r8, r8\) + 8122: bf00 nop + 8124: 0000000c .word 0x0000000c diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-descrelax-be8.s b/binutils-2.24/ld/testsuite/ld-arm/tls-descrelax-be8.s new file mode 100644 index 0000000..a8c028b --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-descrelax-be8.s @@ -0,0 +1,198 @@ +@ we can relax local and non-weak globals for non-shared links + + .arch armv7-a + .text + .arm + + .p2align 2 +foo: +@tlscall global, manually relaxed to IE + ldr r0, 1f +2: ldr r0, [pc, r0] + nop + .p2align 2 +1: .word gd1(gottpoff) + (. - 2b - 8) + + .p2align 2 +@tlscall global, should relax to IE + ldr r0, 1f +2: blx gd1(tlscall) + nop + .p2align 2 +1: .word gd1(tlsdesc) + (. - 2b) + + .p2align 2 +@tlscall local, manually relaxed to LE + ldr r0, 1f + nop + nop + .p2align 2 +1: .word ld1(tpoff) + + .p2align 2 +@tlscall local, should relax to LE + ldr r0, 1f +2: blx ld1(tlscall) + nop + .p2align 2 +1: .word ld1(tlsdesc) + (. - 2b) + + .p2align 2 +@open coded global, manually relaxed to IE + ldr r0, 1f +2: + add r0, pc, r0 + ldr r1, [r0] + mov r0, r1 + nop + .p2align 2 +1: .word gd1(gottpoff) + (. - 2b - 8) + + .p2align 2 +@open coded global, should relax to IE + ldr r0, 1f +2: +.tlsdescseq gd1 + add r0, pc, r0 +.tlsdescseq gd1 + ldr r1, [r0,#4] +.tlsdescseq gd1 + blx r1 + nop + .p2align 2 +1: .word gd1(tlsdesc) + (. - 2b) + + .p2align 2 +@open coded local, manually relaxed to LE + ldr r0, 1f +2: + nop + nop + nop + nop + .p2align 2 +1: .word ld1(tpoff) + + .p2align 2 +@open coded local, should relax to LE + ldr r0, 1f +2: +.tlsdescseq ld1 + add r0, pc, r0 +.tlsdescseq ld1 + ldr r1, [r0,#4] +.tlsdescseq ld1 + blx r1 + nop + .p2align 2 +1: .word ld1(tlsdesc) + (. - 2b) + + + .thumb + .p2align 1 +bar: +@tlscall global, manually relaxed to IE + ldr r0, 1f +2: add r0, pc, r0 + ldr r0, [r0] + nop + .p2align 2 +1: .word gd1(gottpoff) + (. - 2b - 4) + + .p2align 1 +@tlscall global, should relax to IE + ldr r0, 1f +2: blx gd1(tlscall) + nop + .p2align 2 +1: .word gd1(tlsdesc) + (. - 2b + 1) + + .p2align 1 +@tlscall global, should relax to IE + ldr r0, 1f +2: blx r1(tlscall) + nop + .p2align 2 +1: .word r1(tlsdesc) + (. - 2b + 1) + + .p2align 1 +@tlscall local, manually relaxed to LE + ldr r0, 1f + nop + nop + .p2align 2 +1: .word ld1(tpoff) + + .p2align 1 +@tlscall local, should relax to LE + ldr r0, 1f +2: blx ld1(tlscall) + nop + .p2align 2 +1: .word ld1(tlsdesc) + (. - 2b + 1) + + .p2align 1 +@tlscall local, should relax to LE + ldr r0, 1f +2: blx r0(tlscall) + nop + .p2align 2 +1: .word r0(tlsdesc) + (. - 2b + 1) + + .p2align 1 +@open coded global, manually relaxed to IE + ldr r0, 1f +2: + add r0, pc + ldr r1, [r0] + mov r0, r1 + nop + .p2align 2 +1: .word gd1(gottpoff) + (. - 2b - 4) + + .p2align 1 +@open coded global, should relax to IE + ldr r0, 1f +2: +.tlsdescseq gd1 + add r0, pc +.tlsdescseq gd1 + ldr r1, [r0,#4] +.tlsdescseq gd1 + blx r1 + nop + .p2align 2 +1: .word gd1(tlsdesc) + (. - 2b + 1) + + .p2align 1 +@open coded local, manually relaxed to LE + ldr r0, 1f +2: + nop + nop + nop + nop + .p2align 2 +1: .word ld1(tpoff) + + .p2align 1 +@open coded local, should relax to LE + ldr r0, 1f +2: +.tlsdescseq ld1 + add r0, pc +.tlsdescseq ld1 + ldr r1, [r0,#4] +.tlsdescseq ld1 + blx r1 + nop + .p2align 2 +1: .word ld1(tlsdesc) + (. - 2b + 1) + + .section .tdata,"awT" + .global gd1 +gd1: .space 4 +ld1: .space 4 + .globl r1 +r1: .space 4 +r0: .space 4 diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-descrelax-v7.d b/binutils-2.24/ld/testsuite/ld-arm/tls-descrelax-v7.d new file mode 100644 index 0000000..1b2159c --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-descrelax-v7.d @@ -0,0 +1,108 @@ +.*: file format elf32-.* +architecture: arm, flags 0x[0-9a-f]+: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x[0-9a-f]+ + +Disassembly of section .text: + +00008000 <foo>: + 8000: e59f0004 ldr r0, \[pc, #4\] ; 800c <foo\+0xc> + 8004: e79f0000 ldr r0, \[pc, r0\] + 8008: e320f000 nop \{0\} + 800c: 00008138 .word 0x00008138 + 8010: e59f0004 ldr r0, \[pc, #4\] ; 801c <foo\+0x1c> + 8014: e79f0000 ldr r0, \[pc, r0\] + 8018: e320f000 nop \{0\} + 801c: 00008128 .word 0x00008128 + 8020: e59f0004 ldr r0, \[pc, #4\] ; 802c <foo\+0x2c> + 8024: e320f000 nop \{0\} + 8028: e320f000 nop \{0\} + 802c: 0000000c .word 0x0000000c + 8030: e59f0004 ldr r0, \[pc, #4\] ; 803c <foo\+0x3c> + 8034: e1a00000 nop ; .* + 8038: e320f000 nop \{0\} + 803c: 0000000c .word 0x0000000c + 8040: e59f000c ldr r0, \[pc, #12\] ; 8054 <foo\+0x54> + 8044: e08f0000 add r0, pc, r0 + 8048: e5901000 ldr r1, \[r0\] + 804c: e1a00001 mov r0, r1 + 8050: e320f000 nop \{0\} + 8054: 000080f8 .word 0x000080f8 + 8058: e59f000c ldr r0, \[pc, #12\] ; 806c <foo\+0x6c> + 805c: e08f0000 add r0, pc, r0 + 8060: e5901000 ldr r1, \[r0\] + 8064: e1a00001 mov r0, r1 + 8068: e320f000 nop \{0\} + 806c: 000080e0 .word 0x000080e0 + 8070: e59f000c ldr r0, \[pc, #12\] ; 8084 <foo\+0x84> + 8074: e320f000 nop \{0\} + 8078: e320f000 nop \{0\} + 807c: e320f000 nop \{0\} + 8080: e320f000 nop \{0\} + 8084: 0000000c .word 0x0000000c + 8088: e59f000c ldr r0, \[pc, #12\] ; 809c <foo\+0x9c> + 808c: e1a00000 nop ; .* + 8090: e1a00000 nop ; .* + 8094: e1a00000 nop ; .* + 8098: e320f000 nop \{0\} + 809c: 0000000c .word 0x0000000c + +000080a0 <bar>: + 80a0: 4801 ldr r0, \[pc, #4\] ; \(80a8 <bar\+0x8>\) + 80a2: 4478 add r0, pc + 80a4: 6800 ldr r0, \[r0, #0\] + 80a6: 46c0 nop ; .* + 80a8: 0000809e .word 0x0000809e + 80ac: 4801 ldr r0, \[pc, #4\] ; \(80b4 <bar\+0x14>\) + 80ae: 4478 add r0, pc + 80b0: 6800 ldr r0, \[r0, #0\] + 80b2: 46c0 nop ; \(mov r8, r8\) + 80b4: 00008092 .word 0x00008092 + 80b8: 4801 ldr r0, \[pc, #4\] ; \(80c0 <bar\+0x20>\) + 80ba: 4478 add r0, pc + 80bc: 6800 ldr r0, \[r0, #0\] + 80be: 46c0 nop ; \(mov r8, r8\) + 80c0: 0000808a .word 0x0000808a + 80c4: 4801 ldr r0, \[pc, #4\] ; \(80cc <bar\+0x2c>\) + 80c6: 46c0 nop ; \(mov r8, r8\) + 80c8: 46c0 nop ; \(mov r8, r8\) + 80ca: bf00 nop + 80cc: 0000000c .word 0x0000000c + 80d0: 4801 ldr r0, \[pc, #4\] ; \(80d8 <bar\+0x38>\) + 80d2: (f3af 8000)|(bf00 ) nop(.w)? +#... + 80d6: 46c0 nop ; \(mov r8, r8\) + 80d8: 0000000c .word 0x0000000c + 80dc: 4801 ldr r0, \[pc, #4\] ; \(80e4 <bar\+0x44>\) + 80de: (f3af 8000)|(bf00 ) nop(.w)? +#... + 80e2: 46c0 nop ; \(mov r8, r8\) + 80e4: 00000014 .word 0x00000014 + 80e8: 4802 ldr r0, \[pc, #8\] ; \(80f4 <bar\+0x54>\) + 80ea: 4478 add r0, pc + 80ec: 6801 ldr r1, \[r0, #0\] + 80ee: 1c08 adds r0, r1, #0 + 80f0: 46c0 nop ; \(mov r8, r8\) + 80f2: bf00 nop + 80f4: 00008056 .word 0x00008056 + 80f8: 4802 ldr r0, \[pc, #8\] ; \(8104 <bar\+0x64>\) + 80fa: 4478 add r0, pc + 80fc: 6801 ldr r1, \[r0, #0\] + 80fe: 4608 mov r0, r1 + 8100: 46c0 nop ; \(mov r8, r8\) + 8102: bf00 nop + 8104: 00008046 .word 0x00008046 + 8108: 4802 ldr r0, \[pc, #8\] ; \(8114 <bar\+0x74>\) + 810a: 46c0 nop ; \(mov r8, r8\) + 810c: 46c0 nop ; \(mov r8, r8\) + 810e: 46c0 nop ; \(mov r8, r8\) + 8110: 46c0 nop ; \(mov r8, r8\) + 8112: bf00 nop + 8114: 0000000c .word 0x0000000c + 8118: 4802 ldr r0, \[pc, #8\] ; \(8124 <bar\+0x84>\) + 811a: 46c0 nop ; \(mov r8, r8\) + 811c: 46c0 nop ; \(mov r8, r8\) + 811e: 46c0 nop ; \(mov r8, r8\) + 8120: 46c0 nop ; \(mov r8, r8\) + 8122: bf00 nop + 8124: 0000000c .word 0x0000000c diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-descrelax-v7.s b/binutils-2.24/ld/testsuite/ld-arm/tls-descrelax-v7.s new file mode 100644 index 0000000..a8c028b --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-descrelax-v7.s @@ -0,0 +1,198 @@ +@ we can relax local and non-weak globals for non-shared links + + .arch armv7-a + .text + .arm + + .p2align 2 +foo: +@tlscall global, manually relaxed to IE + ldr r0, 1f +2: ldr r0, [pc, r0] + nop + .p2align 2 +1: .word gd1(gottpoff) + (. - 2b - 8) + + .p2align 2 +@tlscall global, should relax to IE + ldr r0, 1f +2: blx gd1(tlscall) + nop + .p2align 2 +1: .word gd1(tlsdesc) + (. - 2b) + + .p2align 2 +@tlscall local, manually relaxed to LE + ldr r0, 1f + nop + nop + .p2align 2 +1: .word ld1(tpoff) + + .p2align 2 +@tlscall local, should relax to LE + ldr r0, 1f +2: blx ld1(tlscall) + nop + .p2align 2 +1: .word ld1(tlsdesc) + (. - 2b) + + .p2align 2 +@open coded global, manually relaxed to IE + ldr r0, 1f +2: + add r0, pc, r0 + ldr r1, [r0] + mov r0, r1 + nop + .p2align 2 +1: .word gd1(gottpoff) + (. - 2b - 8) + + .p2align 2 +@open coded global, should relax to IE + ldr r0, 1f +2: +.tlsdescseq gd1 + add r0, pc, r0 +.tlsdescseq gd1 + ldr r1, [r0,#4] +.tlsdescseq gd1 + blx r1 + nop + .p2align 2 +1: .word gd1(tlsdesc) + (. - 2b) + + .p2align 2 +@open coded local, manually relaxed to LE + ldr r0, 1f +2: + nop + nop + nop + nop + .p2align 2 +1: .word ld1(tpoff) + + .p2align 2 +@open coded local, should relax to LE + ldr r0, 1f +2: +.tlsdescseq ld1 + add r0, pc, r0 +.tlsdescseq ld1 + ldr r1, [r0,#4] +.tlsdescseq ld1 + blx r1 + nop + .p2align 2 +1: .word ld1(tlsdesc) + (. - 2b) + + + .thumb + .p2align 1 +bar: +@tlscall global, manually relaxed to IE + ldr r0, 1f +2: add r0, pc, r0 + ldr r0, [r0] + nop + .p2align 2 +1: .word gd1(gottpoff) + (. - 2b - 4) + + .p2align 1 +@tlscall global, should relax to IE + ldr r0, 1f +2: blx gd1(tlscall) + nop + .p2align 2 +1: .word gd1(tlsdesc) + (. - 2b + 1) + + .p2align 1 +@tlscall global, should relax to IE + ldr r0, 1f +2: blx r1(tlscall) + nop + .p2align 2 +1: .word r1(tlsdesc) + (. - 2b + 1) + + .p2align 1 +@tlscall local, manually relaxed to LE + ldr r0, 1f + nop + nop + .p2align 2 +1: .word ld1(tpoff) + + .p2align 1 +@tlscall local, should relax to LE + ldr r0, 1f +2: blx ld1(tlscall) + nop + .p2align 2 +1: .word ld1(tlsdesc) + (. - 2b + 1) + + .p2align 1 +@tlscall local, should relax to LE + ldr r0, 1f +2: blx r0(tlscall) + nop + .p2align 2 +1: .word r0(tlsdesc) + (. - 2b + 1) + + .p2align 1 +@open coded global, manually relaxed to IE + ldr r0, 1f +2: + add r0, pc + ldr r1, [r0] + mov r0, r1 + nop + .p2align 2 +1: .word gd1(gottpoff) + (. - 2b - 4) + + .p2align 1 +@open coded global, should relax to IE + ldr r0, 1f +2: +.tlsdescseq gd1 + add r0, pc +.tlsdescseq gd1 + ldr r1, [r0,#4] +.tlsdescseq gd1 + blx r1 + nop + .p2align 2 +1: .word gd1(tlsdesc) + (. - 2b + 1) + + .p2align 1 +@open coded local, manually relaxed to LE + ldr r0, 1f +2: + nop + nop + nop + nop + .p2align 2 +1: .word ld1(tpoff) + + .p2align 1 +@open coded local, should relax to LE + ldr r0, 1f +2: +.tlsdescseq ld1 + add r0, pc +.tlsdescseq ld1 + ldr r1, [r0,#4] +.tlsdescseq ld1 + blx r1 + nop + .p2align 2 +1: .word ld1(tlsdesc) + (. - 2b + 1) + + .section .tdata,"awT" + .global gd1 +gd1: .space 4 +ld1: .space 4 + .globl r1 +r1: .space 4 +r0: .space 4 diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-descrelax.d b/binutils-2.24/ld/testsuite/ld-arm/tls-descrelax.d new file mode 100644 index 0000000..97cbe00 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-descrelax.d @@ -0,0 +1,108 @@ +.*: file format elf32-.* +architecture: armv5t, flags 0x[0-9a-f]+: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x[0-9a-f]+ + +Disassembly of section .text: + +00008000 <foo>: + 8000: e59f0004 ldr r0, \[pc, #4\] ; 800c <foo\+0xc> + 8004: e79f0000 ldr r0, \[pc, r0\] + 8008: e1a00000 nop ; \(mov r0, r0\) + 800c: 00008138 .word 0x00008138 + 8010: e59f0004 ldr r0, \[pc, #4\] ; 801c <foo\+0x1c> + 8014: e79f0000 ldr r0, \[pc, r0\] + 8018: e1a00000 nop ; \(mov r0, r0\) + 801c: 00008128 .word 0x00008128 + 8020: e59f0004 ldr r0, \[pc, #4\] ; 802c <foo\+0x2c> + 8024: e1a00000 nop ; \(mov r0, r0\) + 8028: e1a00000 nop ; \(mov r0, r0\) + 802c: 0000000c .word 0x0000000c + 8030: e59f0004 ldr r0, \[pc, #4\] ; 803c <foo\+0x3c> + 8034: e1a00000 nop ; \(mov r0, r0\) + 8038: e1a00000 nop ; \(mov r0, r0\) + 803c: 0000000c .word 0x0000000c + 8040: e59f000c ldr r0, \[pc, #12\] ; 8054 <foo\+0x54> + 8044: e08f0000 add r0, pc, r0 + 8048: e5901000 ldr r1, \[r0\] + 804c: e1a00001 mov r0, r1 + 8050: e1a00000 nop ; \(mov r0, r0\) + 8054: 000080f8 .word 0x000080f8 + 8058: e59f000c ldr r0, \[pc, #12\] ; 806c <foo\+0x6c> + 805c: e08f0000 add r0, pc, r0 + 8060: e5901000 ldr r1, \[r0\] + 8064: e1a00001 mov r0, r1 + 8068: e1a00000 nop ; \(mov r0, r0\) + 806c: 000080e0 .word 0x000080e0 + 8070: e59f000c ldr r0, \[pc, #12\] ; 8084 <foo\+0x84> + 8074: e1a00000 nop ; \(mov r0, r0\) + 8078: e1a00000 nop ; \(mov r0, r0\) + 807c: e1a00000 nop ; \(mov r0, r0\) + 8080: e1a00000 nop ; \(mov r0, r0\) + 8084: 0000000c .word 0x0000000c + 8088: e59f000c ldr r0, \[pc, #12\] ; 809c <foo\+0x9c> + 808c: e1a00000 nop ; \(mov r0, r0\) + 8090: e1a00000 nop ; \(mov r0, r0\) + 8094: e1a00000 nop ; \(mov r0, r0\) + 8098: e1a00000 nop ; \(mov r0, r0\) + 809c: 0000000c .word 0x0000000c + +000080a0 <bar>: + 80a0: 4801 ldr r0, \[pc, #4\] ; \(80a8 <bar\+0x8>\) + 80a2: 4478 add r0, pc + 80a4: 6800 ldr r0, \[r0, #0\] + 80a6: 46c0 nop ; \(mov r8, r8\) + 80a8: 0000809e .word 0x0000809e + 80ac: 4801 ldr r0, \[pc, #4\] ; \(80b4 <bar\+0x14>\) + 80ae: 4478 add r0, pc + 80b0: 6800 ldr r0, \[r0, #0\] + 80b2: 46c0 nop ; \(mov r8, r8\) + 80b4: 00008092 .word 0x00008092 + 80b8: 4801 ldr r0, \[pc, #4\] ; \(80c0 <bar\+0x20>\) + 80ba: 4478 add r0, pc + 80bc: 6800 ldr r0, \[r0, #0\] + 80be: 46c0 nop ; \(mov r8, r8\) + 80c0: 0000808a .word 0x0000808a + 80c4: 4801 ldr r0, \[pc, #4\] ; \(80cc <bar\+0x2c>\) + 80c6: 46c0 nop ; \(mov r8, r8\) + 80c8: 46c0 nop ; \(mov r8, r8\) + 80ca: 46c0 nop ; \(mov r8, r8\) + 80cc: 0000000c .word 0x0000000c + 80d0: 4801 ldr r0, \[pc, #4\] ; \(80d8 <bar\+0x38>\) + 80d2: bf00 nop + 80d4: bf00 nop + 80d6: 46c0 nop ; \(mov r8, r8\) + 80d8: 0000000c .word 0x0000000c + 80dc: 4801 ldr r0, \[pc, #4\] ; \(80e4 <bar\+0x44>\) + 80de: bf00 nop + 80e0: bf00 nop + 80e2: 46c0 nop ; \(mov r8, r8\) + 80e4: 00000014 .word 0x00000014 + 80e8: 4802 ldr r0, \[pc, #8\] ; \(80f4 <bar\+0x54>\) + 80ea: 4478 add r0, pc + 80ec: 6801 ldr r1, \[r0, #0\] + 80ee: 1c08 adds r0, r1, #0 + 80f0: 46c0 nop ; \(mov r8, r8\) + 80f2: 46c0 nop ; \(mov r8, r8\) + 80f4: 00008056 .word 0x00008056 + 80f8: 4802 ldr r0, \[pc, #8\] ; \(8104 <bar\+0x64>\) + 80fa: 4478 add r0, pc + 80fc: 6801 ldr r1, \[r0, #0\] + 80fe: 4608 mov r0, r1 + 8100: 46c0 nop ; \(mov r8, r8\) + 8102: 46c0 nop ; \(mov r8, r8\) + 8104: 00008046 .word 0x00008046 + 8108: 4802 ldr r0, \[pc, #8\] ; \(8114 <bar\+0x74>\) + 810a: 46c0 nop ; \(mov r8, r8\) + 810c: 46c0 nop ; \(mov r8, r8\) + 810e: 46c0 nop ; \(mov r8, r8\) + 8110: 46c0 nop ; \(mov r8, r8\) + 8112: 46c0 nop ; \(mov r8, r8\) + 8114: 0000000c .word 0x0000000c + 8118: 4802 ldr r0, \[pc, #8\] ; \(8124 <bar\+0x84>\) + 811a: 46c0 nop ; \(mov r8, r8\) + 811c: 46c0 nop ; \(mov r8, r8\) + 811e: 46c0 nop ; \(mov r8, r8\) + 8120: 46c0 nop ; \(mov r8, r8\) + 8122: 46c0 nop ; \(mov r8, r8\) + 8124: 0000000c .word 0x0000000c diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-descrelax.s b/binutils-2.24/ld/testsuite/ld-arm/tls-descrelax.s new file mode 100644 index 0000000..826f169 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-descrelax.s @@ -0,0 +1,197 @@ +@ we can relax local and non-weak globals for non-shared links + + .text + .arm + + .p2align 2 +foo: +@tlscall global, manually relaxed to IE + ldr r0, 1f +2: ldr r0, [pc, r0] + nop + .p2align 2 +1: .word gd1(gottpoff) + (. - 2b - 8) + + .p2align 2 +@tlscall global, should relax to IE + ldr r0, 1f +2: blx gd1(tlscall) + nop + .p2align 2 +1: .word gd1(tlsdesc) + (. - 2b) + + .p2align 2 +@tlscall local, manually relaxed to LE + ldr r0, 1f + nop + nop + .p2align 2 +1: .word ld1(tpoff) + + .p2align 2 +@tlscall local, should relax to LE + ldr r0, 1f +2: blx ld1(tlscall) + nop + .p2align 2 +1: .word ld1(tlsdesc) + (. - 2b) + + .p2align 2 +@open coded global, manually relaxed to IE + ldr r0, 1f +2: + add r0, pc, r0 + ldr r1, [r0] + mov r0, r1 + nop + .p2align 2 +1: .word gd1(gottpoff) + (. - 2b - 8) + + .p2align 2 +@open coded global, should relax to IE + ldr r0, 1f +2: +.tlsdescseq gd1 + add r0, pc, r0 +.tlsdescseq gd1 + ldr r1, [r0,#4] +.tlsdescseq gd1 + blx r1 + nop + .p2align 2 +1: .word gd1(tlsdesc) + (. - 2b) + + .p2align 2 +@open coded local, manually relaxed to LE + ldr r0, 1f +2: + nop + nop + nop + nop + .p2align 2 +1: .word ld1(tpoff) + + .p2align 2 +@open coded local, should relax to LE + ldr r0, 1f +2: +.tlsdescseq ld1 + add r0, pc, r0 +.tlsdescseq ld1 + ldr r1, [r0,#4] +.tlsdescseq ld1 + blx r1 + nop + .p2align 2 +1: .word ld1(tlsdesc) + (. - 2b) + + + .thumb + .p2align 1 +bar: +@tlscall global, manually relaxed to IE + ldr r0, 1f +2: add r0, pc, r0 + ldr r0, [r0] + nop + .p2align 2 +1: .word gd1(gottpoff) + (. - 2b - 4) + + .p2align 1 +@tlscall global, should relax to IE + ldr r0, 1f +2: blx gd1(tlscall) + nop + .p2align 2 +1: .word gd1(tlsdesc) + (. - 2b + 1) + + .p2align 1 +@tlscall global, should relax to IE + ldr r0, 1f +2: blx r1(tlscall) + nop + .p2align 2 +1: .word r1(tlsdesc) + (. - 2b + 1) + + .p2align 1 +@tlscall local, manually relaxed to LE + ldr r0, 1f + nop + nop + .p2align 2 +1: .word ld1(tpoff) + + .p2align 1 +@tlscall local, should relax to LE + ldr r0, 1f +2: blx ld1(tlscall) + nop + .p2align 2 +1: .word ld1(tlsdesc) + (. - 2b + 1) + + .p2align 1 +@tlscall local, should relax to LE + ldr r0, 1f +2: blx r0(tlscall) + nop + .p2align 2 +1: .word r0(tlsdesc) + (. - 2b + 1) + + .p2align 1 +@open coded global, manually relaxed to IE + ldr r0, 1f +2: + add r0, pc + ldr r1, [r0] + mov r0, r1 + nop + .p2align 2 +1: .word gd1(gottpoff) + (. - 2b - 4) + + .p2align 1 +@open coded global, should relax to IE + ldr r0, 1f +2: +.tlsdescseq gd1 + add r0, pc +.tlsdescseq gd1 + ldr r1, [r0,#4] +.tlsdescseq gd1 + blx r1 + nop + .p2align 2 +1: .word gd1(tlsdesc) + (. - 2b + 1) + + .p2align 1 +@open coded local, manually relaxed to LE + ldr r0, 1f +2: + nop + nop + nop + nop + .p2align 2 +1: .word ld1(tpoff) + + .p2align 1 +@open coded local, should relax to LE + ldr r0, 1f +2: +.tlsdescseq ld1 + add r0, pc +.tlsdescseq ld1 + ldr r1, [r0,#4] +.tlsdescseq ld1 + blx r1 + nop + .p2align 2 +1: .word ld1(tlsdesc) + (. - 2b + 1) + + .section .tdata,"awT" + .global gd1 +gd1: .space 4 +ld1: .space 4 + .globl r1 +r1: .space 4 +r0: .space 4 diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-descseq.d b/binutils-2.24/ld/testsuite/ld-arm/tls-descseq.d new file mode 100644 index 0000000..d39a891 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-descseq.d @@ -0,0 +1,44 @@ + +tmpdir/tls-lib2inline.so: file format elf32-.*arm +architecture: armv5t, flags 0x[0-9a-f]+: +HAS_SYMS, DYNAMIC, D_PAGED +start address 0x[0-9a-f]+ + +Disassembly of section .plt: + +[0-9a-f]+ <.plt>: + [0-9a-f]+: e52de004 push {lr} ; .* + [0-9a-f]+: e59fe004 ldr lr, \[pc, #4\] ; .* + [0-9a-f]+: e08fe00e add lr, pc, lr + [0-9a-f]+: e5bef008 ldr pc, \[lr, #8\]! + [0-9a-f]+: 000080e4 .word 0x000080e4 + [0-9a-f]+: e08e0000 add r0, lr, r0 + [0-9a-f]+: e5901004 ldr r1, \[r0, #4\] + [0-9a-f]+: e12fff11 bx r1 + [0-9a-f]+: e52d2004 push {r2} ; .* + [0-9a-f]+: e59f200c ldr r2, \[pc, #12\] ; .* + [0-9a-f]+: e59f100c ldr r1, \[pc, #12\] ; .* + [0-9a-f]+: e79f2002 ldr r2, \[pc, r2\] + [0-9a-f]+: e081100f add r1, r1, pc + [0-9a-f]+: e12fff12 bx r2 + [0-9a-f]+: 000080d4 .word 0x000080d4 + [0-9a-f]+: 000080bc .word 0x000080bc + +Disassembly of section .text: + +[0-9a-f]+ <foo>: + [0-9a-f]+: e59f000c ldr r0, \[pc, #12\] ; .* + [0-9a-f]+: e08f0000 add r0, pc, r0 + [0-9a-f]+: e5901004 ldr r1, \[r0, #4\] + [0-9a-f]+: e12fff31 blx r1 + [0-9a-f]+: e1a00000 nop ; .* + [0-9a-f]+: 000080b4 .word 0x000080b4 + +[0-9a-f]+ <bar>: + [0-9a-f]+: 4802 ldr r0, \[pc, #8\] ; .* + [0-9a-f]+: 4478 add r0, pc + [0-9a-f]+: 6841 ldr r1, \[r0, #4\] + [0-9a-f]+: 4788 blx r1 + [0-9a-f]+: 46c0 nop ; .* + [0-9a-f]+: 46c0 nop ; .* + [0-9a-f]+: 000080a2 .word 0x000080a2 diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-descseq.r b/binutils-2.24/ld/testsuite/ld-arm/tls-descseq.r new file mode 100644 index 0000000..23d4637 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-descseq.r @@ -0,0 +1,6 @@ + +.*: file format elf32-.*arm + +DYNAMIC RELOCATION RECORDS +OFFSET TYPE VALUE +[0-9a-f]+ R_ARM_TLS_DESC lib_gd2 diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-descseq.s b/binutils-2.24/ld/testsuite/ld-arm/tls-descseq.s new file mode 100644 index 0000000..9b2628d --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-descseq.s @@ -0,0 +1,41 @@ + .text + .arm + .globl foo + .type foo, %function +foo: + ldr r0, 1f +2: +.tlsdescseq lib_gd2 + add r0, pc, r0 +.tlsdescseq lib_gd2 + ldr r1, [r0,#4] +.tlsdescseq lib_gd2 + blx r1 + nop + +1: + .word lib_gd2(tlsdesc) + (. - 2b) + + .thumb + .globl bar + .type bar, %function +bar: + ldr r0, 1f +2: +.tlsdescseq lib_gd2 + add r0, pc +.tlsdescseq lib_gd2 + ldr r1, [r0,#4] +.tlsdescseq lib_gd2 + blx r1 + nop + + .p2align 2 +1: + .word lib_gd2(tlsdesc) + (. - 2b + 1) + + .section .tdata,"awT" + .global lib_gd2 +lib_gd2: + .space 4 + diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-gdesc-got.d b/binutils-2.24/ld/testsuite/ld-arm/tls-gdesc-got.d new file mode 100644 index 0000000..4d7777a --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-gdesc-got.d @@ -0,0 +1,30 @@ + +.*/tls-lib2-got.so: file format elf32-.*arm.* +architecture: armv4, flags 0x00000150: +HAS_SYMS, DYNAMIC, D_PAGED +start address 0x000082.0 + + +Disassembly of section .got: + +000103.0 <.*>: + 103.0: 000102.8 .* + ... + 103.c: 00000008 .* + 103.c: R_ARM_TLS_DESC \*ABS\* + 103.0: 00000000 .* + 103.4: 0000000c .* + 103.4: R_ARM_TLS_DESC \*ABS\* + 103.8: 00000000 .* + 103.c: 80000004 .* + 103.c: R_ARM_TLS_DESC glob1 + 103.0: 00000000 .* + 103.4: 80000006 .* + 103.4: R_ARM_TLS_DESC ext2 + 103.8: 00000000 .* + 103.c: 80000007 .* + 103.c: R_ARM_TLS_DESC ext1 + 103.0: 00000000 .* + 103.4: 80000009 .* + 103.4: R_ARM_TLS_DESC glob2 + ... diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-gdesc-got.s b/binutils-2.24/ld/testsuite/ld-arm/tls-gdesc-got.s new file mode 100644 index 0000000..8128ff7 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-gdesc-got.s @@ -0,0 +1,45 @@ + + .arm +foo: + ldr r0,1f +2: bl loc1(tlscall) + nop +1: .word loc1(tlsdesc) + (. - 2b) + + ldr r0,1f +2: bl loc2(tlscall) + nop +1: .word loc2(tlsdesc) + (. - 2b) + + ldr r0,1f +2: bl glob1(tlscall) + nop +1: .word glob1(tlsdesc) + (. - 2b) + + ldr r0,1f +2: bl glob2(tlscall) + nop +1: .word glob2(tlsdesc) + (. - 2b) + + ldr r0,1f +2: bl ext1(tlscall) + nop +1: .word ext1(tlsdesc) + (. - 2b) + + ldr r0,1f +2: bl ext2(tlscall) + nop +1: .word ext2(tlsdesc) + (. - 2b) + + .section .tdata,"awT",%progbits + .space 8 + .type loc1, %object +loc1: .space 4 + .type loc2, %object +loc2: .space 4 + .globl glob1 + .type glob1, %object +glob1: .space 4 + .globl glob2 + .type glob2, %object +glob2: .space 4 diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-gdesc-nlazy.g b/binutils-2.24/ld/testsuite/ld-arm/tls-gdesc-nlazy.g new file mode 100644 index 0000000..4b53a98 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-gdesc-nlazy.g @@ -0,0 +1,4 @@ + +Hex dump of section '.got': + 0x[0-9a-f]+ [0-9a-f]+ 00000000 00000000 00000000 ................ + 0x[0-9a-f]+ 00000000 00000000 00000000 ............ diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-gdesc-nlazy.s b/binutils-2.24/ld/testsuite/ld-arm/tls-gdesc-nlazy.s new file mode 100644 index 0000000..2cd8109 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-gdesc-nlazy.s @@ -0,0 +1,17 @@ + .text + .globl foo + .type foo, %function +foo: + nop +.L2: + blx lib_gd2(tlscall) + mov pc, lr + +.Lpool: + .word lib_gd2(tlsdesc) + (. - .L2) + + .section .tdata,"awT" + .global lib_gd2 +lib_gd2: + .space 4 + diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-gdesc.d b/binutils-2.24/ld/testsuite/ld-arm/tls-gdesc.d new file mode 100644 index 0000000..43ad706 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-gdesc.d @@ -0,0 +1,42 @@ + +tmpdir/tls-lib2.so: file format elf32-.*arm +architecture: armv.t, flags 0x[0-9a-f]+: +HAS_SYMS, DYNAMIC, D_PAGED +start address 0x[0-9a-f]+ + +Disassembly of section .plt: + +[0-9a-f]+ <.plt>: + [0-9a-f]+: e52de004 push {lr} ; .* + [0-9a-f]+: e59fe004 ldr lr, \[pc, #4\] ; .* + [0-9a-f]+: e08fe00e add lr, pc, lr + [0-9a-f]+: e5bef008 ldr pc, \[lr, #8\]! + [0-9a-f]+: 000080e8 .word 0x000080e8 + [0-9a-f]+: e08e0000 add r0, lr, r0 + [0-9a-f]+: e5901004 ldr r1, \[r0, #4\] + [0-9a-f]+: e12fff11 bx r1 + [0-9a-f]+: e52d2004 push {r2} ; .* + [0-9a-f]+: e59f200c ldr r2, \[pc, #12\] ; .* + [0-9a-f]+: e59f100c ldr r1, \[pc, #12\] ; .* + [0-9a-f]+: e79f2002 ldr r2, \[pc, r2\] + [0-9a-f]+: e081100f add r1, r1, pc + [0-9a-f]+: e12fff12 bx r2 + [0-9a-f]+: 000080e0 .word 0x000080e0 + [0-9a-f]+: 000080c0 .word 0x000080c0 +Disassembly of section .text: + +[0-9a-f]+ <foo>: + [0-9a-f]+: e59f0004 ldr r0, \[pc, #4\] ; .* + [0-9a-f]+: fafffff2 blx [0-9a-f]+ .* + [0-9a-f]+: e1a00000 nop ; .* + [0-9a-f]+: 000080c4 .word 0x000080c4 + +[0-9a-f]+ <bar>: + [0-9a-f]+: 4801 ldr r0, \[pc, #4\] ; .* + [0-9a-f]+: f7ff efe0 blx [0-9a-f]+ .* + [0-9a-f]+: 46c0 nop ; .* + [0-9a-f]+: 000080b5 .word 0x000080b5 + [0-9a-f]+: 4801 ldr r0, \[pc, #4\] ; .* + [0-9a-f]+: f7ff efda blx [0-9a-f]+ .* + [0-9a-f]+: 46c0 nop ; .* + [0-9a-f]+: 000080a1 .word 0x000080a1 diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-gdesc.r b/binutils-2.24/ld/testsuite/ld-arm/tls-gdesc.r new file mode 100644 index 0000000..3de3ae8 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-gdesc.r @@ -0,0 +1,7 @@ + +.*: file format elf32-.*arm + +DYNAMIC RELOCATION RECORDS +OFFSET TYPE VALUE +[0-9a-f]+ R_ARM_TLS_DESC lib_gd2 +[0-9a-f]+ R_ARM_TLS_DESC r0 diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-gdesc.s b/binutils-2.24/ld/testsuite/ld-arm/tls-gdesc.s new file mode 100644 index 0000000..482ee29 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-gdesc.s @@ -0,0 +1,41 @@ + .text + .arm + .globl foo + .type foo, %function +foo: + ldr r0,1f +2: + blx lib_gd2(tlscall) + nop + +1: + .word lib_gd2(tlsdesc) + (. - 2b) + + .thumb + .globl bar + .type bar, %function +bar: + ldr r0,1f +2: + blx lib_gd2(tlscall) + nop + + .p2align 2 +1: + .word lib_gd2(tlsdesc) + (. - 2b + 1) + + ldr r0,1f +2: + blx r0(tlscall) + nop + + .p2align 2 +1: + .word r0(tlsdesc) + (. - 2b + 1) + + .section .tdata,"awT" + .global lib_gd2 +lib_gd2: + .space 4 + .globl r0 +r0: .space 4 diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-gdierelax.d b/binutils-2.24/ld/testsuite/ld-arm/tls-gdierelax.d new file mode 100644 index 0000000..bb450ab --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-gdierelax.d @@ -0,0 +1,20 @@ + +tmpdir/tls-app-rel-ie: file format elf32-.*arm.* +architecture: armv5t, flags 0x[0-9a-f]+: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x[0-9a-f]+ + +Disassembly of section .text: + +[0-9a-f]+ <foo>: + [0-9a-f]+: e59f0004 ldr r0, \[pc, #4\] ; .* + [0-9a-f]+: e79f0000 ldr r0, \[pc, r0\] + [0-9a-f]+: e1a00000 nop ; .* + [0-9a-f]+: 00008020 .word 0x00008020 + +[0-9a-f]+ <bar>: + [0-9a-f]+: 4801 ldr r0, \[pc, #4\] ; .* + [0-9a-f]+: 4478 add r0, pc + [0-9a-f]+: 6800 ldr r0, \[r0, #0\] + [0-9a-f]+: 46c0 nop ; .* + [0-9a-f]+: 00008016 .word 0x00008016 diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-gdierelax.s b/binutils-2.24/ld/testsuite/ld-arm/tls-gdierelax.s new file mode 100644 index 0000000..db62008 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-gdierelax.s @@ -0,0 +1,34 @@ + .text + .arm + .globl foo + .type foo, %function +foo: + ldr r0, 1f +2: + blx lib_gd2(tlscall) + nop + +1: + .word lib_gd2(tlsdesc) + (. - 2b) + + .thumb + .globl bar + .type bar, %function +bar: + ldr r0,1f +2: + blx lib_gd2(tlscall) + nop + + .p2align 2 +1: + .word lib_gd2(tlsdesc) + (. - 2b + 1) + + .globl _start +_start: + + .section .tdata,"awT" + .global lib_gd2 +lib_gd2: + .space 4 + diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-gdierelax2.d b/binutils-2.24/ld/testsuite/ld-arm/tls-gdierelax2.d new file mode 100644 index 0000000..3a80094 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-gdierelax2.d @@ -0,0 +1,23 @@ + +tmpdir/tls-app-rel-ie2: file format elf32-.*arm.* +architecture: armv5t, flags 0x[0-9a-f]+: +HAS_SYMS, DYNAMIC, D_PAGED +start address 0x[0-9a-f]+ + +Disassembly of section .text: + +[0-9a-f]+ <foo>: + [0-9a-f]+: e1a00000 nop ; .* + [0-9a-f]+: e59f0004 ldr r0, \[pc, #4\] ; .* + [0-9a-f]+: e79f0000 ldr r0, \[pc, r0\] + [0-9a-f]+: e1a00000 nop ; .* + [0-9a-f]+: 00008098 .word 0x00008098 + [0-9a-f]+: 0000809c .word 0x0000809c + +[0-9a-f]+ <bar>: + [0-9a-f]+: 4801 ldr r0, \[pc, #4\] ; .* + [0-9a-f]+: 4478 add r0, pc + [0-9a-f]+: 6800 ldr r0, \[r0, #0\] + [0-9a-f]+: 46c0 nop ; .* + [0-9a-f]+: 0000808a .word 0x0000808a + [0-9a-f]+: 0000808c .word 0x0000808c diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-gdierelax2.s b/binutils-2.24/ld/testsuite/ld-arm/tls-gdierelax2.s new file mode 100644 index 0000000..2f4edad --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-gdierelax2.s @@ -0,0 +1,35 @@ + .text + .arm + .globl foo + .type foo, %function +foo: + nop +3: ldr r0,1f +2: bl lib_gd2(tlscall) + nop + +1: + .word lib_gd2(tlsdesc) + (. - 2b) + .word lib_gd2(gottpoff) + (. - 3b - 8) + + .thumb + .globl bar + .type bar, %function +bar: +3: ldr r0,1f +2: blx lib_gd2(tlscall) + nop + + .p2align 2 +1: + .word lib_gd2(tlsdesc) + (. - 2b + 1) + .word lib_gd2(gottpoff) + (. - 3b - 4) + + .globl _start +_start: + + .section .tdata,"awT" + .global lib_gd2 +lib_gd2: + .space 4 + diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-gdlerelax.d b/binutils-2.24/ld/testsuite/ld-arm/tls-gdlerelax.d new file mode 100644 index 0000000..02bddad --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-gdlerelax.d @@ -0,0 +1,13 @@ + +tmpdir/tls-app-rel-le: file format elf32-.*arm.* +architecture: armv5t, flags 0x[0-9a-f]+: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x[0-9a-f]+ + +Disassembly of section .text: + +[0-9a-f]+ <foo>: + [0-9a-f]+: e1a00000 nop ; .* + [0-9a-f]+: e1a00000 nop ; .* + [0-9a-f]+: e1a0f00e mov pc, lr + [0-9a-f]+: 00000008 .word 0x00000008 diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-gdlerelax.s b/binutils-2.24/ld/testsuite/ld-arm/tls-gdlerelax.s new file mode 100644 index 0000000..3952837 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-gdlerelax.s @@ -0,0 +1,16 @@ + .text + .globl foo + .type foo, %function +foo: + nop +.L2: + blx lib_gd2(tlscall) + mov pc, lr + +.Lpool: + .word lib_gd2(tlsdesc) + (. - .L2) + + .section .tdata,"awT" +lib_gd2: + .space 4 + diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-lib-loc.d b/binutils-2.24/ld/testsuite/ld-arm/tls-lib-loc.d new file mode 100644 index 0000000..8dc4d71 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-lib-loc.d @@ -0,0 +1,33 @@ + +.*: file format elf32-.*arm +architecture: armv5t, flags 0x00000150: +HAS_SYMS, DYNAMIC, D_PAGED +start address 0x.* + +Disassembly of section .plt: + +[0-9a-f]+ <.plt>: + [0-9a-f]+: e52de004 push {lr} ; .* + [0-9a-f]+: e59fe004 ldr lr, \[pc, #4\] ; 8150 .* + [0-9a-f]+: e08fe00e add lr, pc, lr + [0-9a-f]+: e5bef008 ldr pc, \[lr, #8\]! + 8150: 000080cc .word 0x000080cc + 8154: e08e0000 add r0, lr, r0 + [0-9a-f]+: e5901004 ldr r1, \[r0, #4\] + [0-9a-f]+: e12fff11 bx r1 + [0-9a-f]+: e52d2004 push {r2} ; .* + 8164: e59f200c ldr r2, \[pc, #12\] ; 8178 .* + [0-9a-f]+: e59f100c ldr r1, \[pc, #12\] ; 817c .* + [0-9a-f]+: e79f2002 ldr r2, \[pc, r2\] + [0-9a-f]+: e081100f add r1, r1, pc + [0-9a-f]+: e12fff12 bx r2 + 8178: 000080bc .word 0x000080bc + 817c: 000080a4 .word 0x000080a4 + +Disassembly of section .text: + +[0-9a-f]+ <foo>: + [0-9a-f]+: e59f0004 ldr r0, \[pc, #4\] ; 818c .* + [0-9a-f]+: fafffff2 blx 8154 <.*\+0x8154> + [0-9a-f]+: e1a00000 nop ; .* + 818c: 000080a0 .word 0x000080a0 diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-lib-loc.r b/binutils-2.24/ld/testsuite/ld-arm/tls-lib-loc.r new file mode 100644 index 0000000..ba54f61 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-lib-loc.r @@ -0,0 +1,6 @@ + +.*: file format elf32-.*arm + +DYNAMIC RELOCATION RECORDS +OFFSET TYPE VALUE +.* R_ARM_TLS_DESC \*ABS\* diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-lib-loc.s b/binutils-2.24/ld/testsuite/ld-arm/tls-lib-loc.s new file mode 100644 index 0000000..a0e4dc7 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-lib-loc.s @@ -0,0 +1,14 @@ + .text + .arm + +foo: + ldr r0,1f +2: blx loc(tlscall) + nop + + .p2align 2 +1: .word loc(tlsdesc) + (. - 2b) + + .section .tdata,"awT" +loc: + .space 4 diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-lib.d b/binutils-2.24/ld/testsuite/ld-arm/tls-lib.d new file mode 100644 index 0000000..a299fba --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-lib.d @@ -0,0 +1,15 @@ + +.*: file format elf32-.*arm.* +architecture: armv4, flags 0x00000150: +HAS_SYMS, DYNAMIC, D_PAGED +start address 0x.* + +Disassembly of section .text: + +.* <foo>: + .*: e1a00000 nop ; \(mov r0, r0\) + .*: e1a00000 nop ; \(mov r0, r0\) + .*: e1a0f00e mov pc, lr + .*: 00008098 .word 0x00008098 + .*: 0000808c .word 0x0000808c + .*: 00000004 .word 0x00000004 diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-lib.r b/binutils-2.24/ld/testsuite/ld-arm/tls-lib.r new file mode 100644 index 0000000..3847f77 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-lib.r @@ -0,0 +1,10 @@ + +.*: file format elf32-.*arm.* + +DYNAMIC RELOCATION RECORDS +OFFSET TYPE VALUE +.* R_ARM_TLS_DTPMOD32 \*ABS\* +.* R_ARM_TLS_DTPMOD32 lib_gd +.* R_ARM_TLS_DTPOFF32 lib_gd + + diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-lib.s b/binutils-2.24/ld/testsuite/ld-arm/tls-lib.s new file mode 100644 index 0000000..fa928c0 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-lib.s @@ -0,0 +1,22 @@ + .text + .globl foo + .type foo, %function +foo: + nop +.L2: + nop + mov pc, lr + +.Lpool: + .word lib_gd(tlsgd) + (. - .L2 - 8) + .word lib_ld(tlsldm) + (. - .L2 - 8) + .word lib_ld(tlsldo) + + .section .tdata,"awT" + .global lib_gd +lib_gd: + .space 4 + + .global lib_ld +lib_ld: + .space 4 diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-local-static.d b/binutils-2.24/ld/testsuite/ld-arm/tls-local-static.d new file mode 100644 index 0000000..d246ab1 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-local-static.d @@ -0,0 +1,11 @@ + +.*/tls-local-static: file format elf32-.*arm.* +architecture: .*, flags 0x[0-9a-f]+: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x[0-9a-f]+ + +Disassembly of section .text: + +[0-9a-f]+ <_start>: + [0-9a-f]+: e12fff1e bx lr + [0-9a-f]+: 00000ff8 .word 0x00000ff8 diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-local-static.s b/binutils-2.24/ld/testsuite/ld-arm/tls-local-static.s new file mode 100644 index 0000000..15a409a --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-local-static.s @@ -0,0 +1,15 @@ + .text + .arch armv4t + .global _start +_start: +.LPIC0: + bx lr + .align 2 + .word var(tlsgd) + (. - .LPIC0 - 8) + + .section .tbss,"awT",%nobits + .align 2 + .type var, %object + .size var, 4 +var: + .space 4 diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-longplt-lib.d b/binutils-2.24/ld/testsuite/ld-arm/tls-longplt-lib.d new file mode 100644 index 0000000..2c81fbe --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-longplt-lib.d @@ -0,0 +1,59 @@ +.*: file format elf32-.*arm +architecture: arm, flags 0x00000150: +HAS_SYMS, DYNAMIC, D_PAGED +start address 0x.* + +Disassembly of section .plt: + +00008198 <.plt>: + 8198: e52de004 push {lr} ; .* + 819c: e59fe004 ldr lr, \[pc, #4\] ; .* + 81a0: e08fe00e add lr, pc, lr + 81a4: e5bef008 ldr pc, \[lr, #8\]! + 81a8: 000080e0 .word 0x000080e0 + 81ac: e08e0000 add r0, lr, r0 + 81b0: e5901004 ldr r1, \[r0, #4\] + 81b4: e12fff11 bx r1 + 81b8: e52d2004 push {r2} ; .* + 81bc: e59f200c ldr r2, \[pc, #12\] ; .* + 81c0: e59f100c ldr r1, \[pc, #12\] ; .* + 81c4: e79f2002 ldr r2, \[pc, r2\] + 81c8: e081100f add r1, r1, pc + 81cc: e12fff12 bx r2 + 81d0: 000080d8 .word 0x000080d8 + 81d4: 000080b8 .word 0x000080b8 + +Disassembly of section .text: + +000081d8 <text>: + 81d8: e59f0004 ldr r0, \[pc, #4\] ; .* + 81dc: fafffff2 blx 81ac .* + 81e0: e1a00000 nop ; .* + 81e4: 000080b4 .word 0x000080b4 + 81e8: 4801 ldr r0, \[pc, #4\] ; .* + 81ea: f7ff efe0 blx 81ac <.*> + 81ee: 46c0 nop ; .* + 81f0: 000080a5 .word 0x000080a5 + +Disassembly of section .foo: + +04001000 <foo>: + 4001000: e59f0004 ldr r0, \[pc, #4\] ; .* + 4001004: fa000009 blx 4001030 .* + 4001008: e1a00000 nop ; .* + 400100c: fc00f28c .word 0xfc00f28c + 4001010: e59f0004 ldr r0, \[pc, #4\] ; .* + 4001014: fa000005 blx 4001030 .* + 4001018: e1a00000 nop ; .* + 400101c: fc00f284 .word 0xfc00f284 + 4001020: 4801 ldr r0, \[pc, #4\] ; .* + 4001022: f000 e806 blx 4001030 .* + 4001026: 46c0 nop ; .* + 4001028: fc00f26d .word 0xfc00f26d + 400102c: 00000000 .word 0x00000000 + +04001030 <__unnamed_veneer>: + 4001030: e59f1000 ldr r1, \[pc\] ; .* + 4001034: e08ff001 add pc, pc, r1 + 4001038: fc007170 .word 0xfc007170 + 400103c: 00000000 .word 0x00000000 diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-longplt-lib.s b/binutils-2.24/ld/testsuite/ld-arm/tls-longplt-lib.s new file mode 100644 index 0000000..e0650cb --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-longplt-lib.s @@ -0,0 +1,51 @@ + .syntax unified + .text +text: + .arm + ldr r0,1f +2: blx loc(tlscall) + nop + .p2align 2 +1: .word loc(tlsdesc) + (. - 2b) + + .thumb + ldr r0,1f +2: blx loc(tlscall) + nop + .p2align 2 +1: .word loc(tlsdesc) + (. - 2b + 1) + + .section ".foo","ax" +foo: + .arm + ldr r0,1f +2: blx loc(tlscall) + nop + .p2align 2 +1: .word loc(tlsdesc) + (. - 2b) + + .arm + ldr r0,1f +2: blx glob(tlscall) + nop + .p2align 2 +1: .word glob(tlsdesc) + (. - 2b) + + .thumb + ldr r0,1f +2: blx loc(tlscall) + nop + .p2align 2 +1: .word loc(tlsdesc) + (. - 2b + 1) + + .section .tdata,"awT" + .type loc, %object +loc: .space 4 + + @ glob1 and glob2 used by tls-longplt + .type glob1, %object + .globl glob1 +glob1: .space 4 + .type glob2, %object + .globl glob2 +glob2: .space 4 diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-longplt.d b/binutils-2.24/ld/testsuite/ld-arm/tls-longplt.d new file mode 100644 index 0000000..175c561 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-longplt.d @@ -0,0 +1,64 @@ +.*: file format elf32-.*arm +architecture: arm, flags 0x00000112: +EXEC_P, HAS_SYMS, D_PAGED +start address 0x.* + +Disassembly of section .plt: + +0000819c <.plt>: + 819c: e52de004 push {lr} ; .* + 81a0: e59fe004 ldr lr, \[pc, #4\] ; .* + 81a4: e08fe00e add lr, pc, lr + 81a8: e5bef008 ldr pc, \[lr, #8\]! + 81ac: 00008100 .word 0x00008100 + 81b0: e08e0000 add r0, lr, r0 + 81b4: e5901004 ldr r1, \[r0, #4] + 81b8: e12fff11 bx r1 + 81bc: e52d2004 push {r2} ; .* + 81c0: e59f200c ldr r2, \[pc, #12\] ; .* + 81c4: e59f100c ldr r1, \[pc, #12\] ; .* + 81c8: e79f2002 ldr r2, \[pc, r2\] + 81cc: e081100f add r1, r1, pc + 81d0: e12fff12 bx r2 + 81d4: 000080f4 .word 0x000080f4 + 81d8: 000080d8 .word 0x000080d8 + +Disassembly of section .text: + +000081dc <text>: + 81dc: e59f0004 ldr r0, \[pc, #4\] ; .* + 81e0: fafffff2 blx 81b0 .* + 81e4: e1a00000 nop ; .* + 81e8: 000080d4 .word 0x000080d4 + 81ec: 4801 ldr r0, \[pc, #4\] ; .* + 81ee: f7ff efe0 blx 81b0 .* + 81f2: 46c0 nop ; .* + 81f4: 000080c5 .word 0x000080c5 + +Disassembly of section .foo: + +04001000 <foo>: + 4001000: e59f0004 ldr r0, \[pc, #4\] ; .* + 4001004: e79f0000 ldr r0, \[pc, r0\] + 4001008: e1a00000 nop ; .* + 400100c: fc00f2b4 .word 0xfc00f2b4 + 4001010: e59f0004 ldr r0, \[pc, #4\] ; .* + 4001014: fa000005 blx 4001030 .* + 4001018: e1a00000 nop ; .* + 400101c: fc00f2a0 .word 0xfc00f2a0 + 4001020: 4801 ldr r0, \[pc, #4\] ; .* + 4001022: f000 f809 bl 4001038 .* + 4001026: 46c0 nop ; .* + 4001028: fc00f291 .word 0xfc00f291 + 400102c: 00000000 .word 0x00000000 + +04001030 <__unnamed_veneer>: + 4001030: e51ff004 ldr pc, \[pc, #-4\] ; .* + 4001034: 000081b0 .word 0x000081b0 + +04001038 <__unnamed_veneer>: + 4001038: 4778 bx pc + 400103a: 46c0 nop ; .* + 400103c: e51ff004 ldr pc, \[pc, #-4\] ; .* + 4001040: 000081b0 .word 0x000081b0 + 4001044: 00000000 .word 0x00000000 diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-longplt.s b/binutils-2.24/ld/testsuite/ld-arm/tls-longplt.s new file mode 100644 index 0000000..42eea19 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-longplt.s @@ -0,0 +1,47 @@ + .syntax unified + .text +text: + .arm + ldr r0,1f +2: blx udefw(tlscall) + nop + .p2align 2 +1: .word udefw(tlsdesc) + (. - 2b) + + .thumb + ldr r0,1f +2: blx udefw(tlscall) + nop + .p2align 2 +1: .word udefw(tlsdesc) + (. - 2b + 1) + + .section ".foo","ax" +foo: + .arm + ldr r0,1f +2: blx glob1(tlscall) + nop + .p2align 2 +1: .word glob1(tlsdesc) + (. - 2b) + + .arm + ldr r0,1f +2: blx udefw(tlscall) + nop + .p2align 2 +1: .word udefw(tlsdesc) + (. - 2b) + + .thumb + ldr r0,1f +2: blx udefw(tlscall) + nop + .p2align 2 +1: .word udefw(tlsdesc) + (. - 2b + 1) + + .section .tdata,"awT" + @ glob used by tls-longplt-lib + .type glob, %object + .globl glob +glob: .space 4 + .globl udefw + .weak udefw diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-mixed.r b/binutils-2.24/ld/testsuite/ld-arm/tls-mixed.r new file mode 100644 index 0000000..02f9b02 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-mixed.r @@ -0,0 +1,10 @@ + +.*: file format elf32-.*arm.* + +DYNAMIC RELOCATION RECORDS +OFFSET TYPE VALUE +[0-9a-f]+ R_ARM_TLS_DTPMOD32 lib_gd2 +[0-9a-f]+ R_ARM_TLS_DTPOFF32 lib_gd2 +[0-9a-f]+ R_ARM_TLS_DTPMOD32 lib_gd +[0-9a-f]+ R_ARM_TLS_DTPOFF32 lib_gd +[0-9a-f]+ R_ARM_TLS_DESC lib_gd2 diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-mixed.s b/binutils-2.24/ld/testsuite/ld-arm/tls-mixed.s new file mode 100644 index 0000000..af2377d --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-mixed.s @@ -0,0 +1,25 @@ + .text + .globl foo + .type foo, %function +foo: + nop +.L1: + nop +.L2: + bl lib_gd2(tlscall) + mov pc, lr + +.Lpool: + .word lib_gd(tlsgd) + (. - .L1 - 8) +.Lpool2: + .word lib_gd2(tlsdesc) + (. - .L2) + .word lib_gd2(tlsgd) + (. - .L2 - 8) + + .section .tdata,"awT" + .global lib_gd +lib_gd: + .space 4 + .global lib_gd2 +lib_gd2: + .space 4 + diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-thumb1.d b/binutils-2.24/ld/testsuite/ld-arm/tls-thumb1.d new file mode 100644 index 0000000..86c59a4 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-thumb1.d @@ -0,0 +1,74 @@ +.*: file format elf32-.*arm +architecture: armv4t, flags 0x00000150: +HAS_SYMS, DYNAMIC, D_PAGED +start address 0x.* + +Disassembly of section .plt: + +00008164 <.plt>: + 8164: e52de004 push {lr} ; .* + 8168: e59fe004 ldr lr, \[pc, #4\] ; .* + 816c: e08fe00e add lr, pc, lr + 8170: e5bef008 ldr pc, \[lr, #8\]! + 8174: 000080f0 .word 0x000080f0 + 8178: e08e0000 add r0, lr, r0 + 817c: e5901004 ldr r1, \[r0, #4\] + 8180: e12fff11 bx r1 + 8184: e52d2004 push {r2} ; .* + 8188: e59f200c ldr r2, \[pc, #12\] ; .* + 818c: e59f100c ldr r1, \[pc, #12\] ; .* + 8190: e79f2002 ldr r2, \[pc, r2\] + 8194: e081100f add r1, r1, pc + 8198: e12fff12 bx r2 + 819c: 000080e8 .word 0x000080e8 + 81a0: 000080c8 .word 0x000080c8 + +Disassembly of section .text: + +000081a8 <text>: + 81a8: e59f0004 ldr r0, \[pc, #4\] ; .* + 81ac: ebfffff1 bl 8178 .* + 81b0: e1a00000 nop ; .* + 81b4: 000080c0 .word 0x000080c0 + 81b8: 4801 ldr r0, \[pc, #4\] ; .* + 81ba: f000 f805 bl 81c8 .* + 81be: 46c0 nop ; .* + 81c0: 000080b1 .word 0x000080b1 + 81c4: 00000000 .word 0x00000000 + +000081c8 <__unnamed_veneer>: + 81c8: 4778 bx pc + 81ca: 46c0 nop ; .* + 81cc: e59f1000 ldr r1, \[pc\] ; .* + 81d0: e081f00f add pc, r1, pc + 81d4: ffffffa0 .word 0xffffffa0 + +Disassembly of section .foo: + +04001000 <foo>: + 4001000: e59f0004 ldr r0, \[pc, #4\] ; .* + 4001004: eb000009 bl 4001030 .* + 4001008: e1a00000 nop ; .* + 400100c: fc00f268 .word 0xfc00f268 + 4001010: e59f0004 ldr r0, \[pc, #4\] ; .* + 4001014: eb000005 bl 4001030 .* + 4001018: e1a00000 nop ; .* + 400101c: fc00f260 .word 0xfc00f260 + 4001020: 4801 ldr r0, \[pc, #4\] ; .* + 4001022: f000 f80b bl 400103c .* + 4001026: 46c0 nop ; .* + 4001028: fc00f249 .word 0xfc00f249 + 400102c: 00000000 .word 0x00000000 + +04001030 <__unnamed_veneer>: + 4001030: e59f1000 ldr r1, \[pc\] ; .* + 4001034: e08ff001 add pc, pc, r1 + 4001038: fc00713c .word 0xfc00713c + +0400103c <__unnamed_veneer>: + 400103c: 4778 bx pc + 400103e: 46c0 nop ; .* + 4001040: e59f1000 ldr r1, \[pc\] ; .* + 4001044: e081f00f add pc, r1, pc + 4001048: fc00712c .word 0xfc00712c + 400104c: 00000000 .word 0x00000000 diff --git a/binutils-2.24/ld/testsuite/ld-arm/tls-thumb1.s b/binutils-2.24/ld/testsuite/ld-arm/tls-thumb1.s new file mode 100644 index 0000000..634511e --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/tls-thumb1.s @@ -0,0 +1,43 @@ + .arch armv4t + .syntax unified + .text +text: + .arm + ldr r0,1f +2: bl +loc(tlscall) + nop + .p2align 2 +1: .word loc(tlsdesc) + (. - 2b) + + .thumb + ldr r0,1f +2: bl +loc(tlscall) + nop + .p2align 2 +1: .word loc(tlsdesc) + (. - 2b + 1) + + .section ".foo","ax" +foo: + .arm + ldr r0,1f +2: bl +loc(tlscall) + nop + .p2align 2 +1: .word loc(tlsdesc) + (. - 2b) + + .arm + ldr r0,1f +2: bl +glob(tlscall) + nop + .p2align 2 +1: .word glob(tlsdesc) + (. - 2b) + + .thumb + ldr r0,1f +2: bl +loc(tlscall) + nop + .p2align 2 +1: .word loc(tlsdesc) + (. - 2b + 1) + + .section .tdata,"awT" +loc: .space 4 diff --git a/binutils-2.24/ld/testsuite/ld-arm/unresolved-1-dyn.d b/binutils-2.24/ld/testsuite/ld-arm/unresolved-1-dyn.d new file mode 100644 index 0000000..21cd959 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/unresolved-1-dyn.d @@ -0,0 +1,8 @@ +#source: unresolved-1.s +#ld: --warn-unresolved tmpdir/mixed-lib.so +#warning: \(\.text\+0x8\): warning: undefined reference to `foo' +#readelf: -r + +Relocation section '\.rel\.dyn' .* + Offset .* +.* R_ARM_GLOB_DAT +00000000 +foo diff --git a/binutils-2.24/ld/testsuite/ld-arm/unresolved-1.d b/binutils-2.24/ld/testsuite/ld-arm/unresolved-1.d new file mode 100644 index 0000000..cfc1b04 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/unresolved-1.d @@ -0,0 +1,8 @@ +#ld: --warn-unresolved +#warning: \(\.text\+0x8\): warning: undefined reference to `foo' +#objdump: -sj.rel.dyn -sj.got + +.* + +Contents of section \.got: + *[^ ]* 00000000 00000000 00000000 00000000 .* diff --git a/binutils-2.24/ld/testsuite/ld-arm/unresolved-1.s b/binutils-2.24/ld/testsuite/ld-arm/unresolved-1.s new file mode 100644 index 0000000..4db4aea --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/unresolved-1.s @@ -0,0 +1,6 @@ + .globl _start +_start: + ldr r4,1f + mov pc,lr +1: + .word foo(GOT) diff --git a/binutils-2.24/ld/testsuite/ld-arm/unresolved-2.d b/binutils-2.24/ld/testsuite/ld-arm/unresolved-2.d new file mode 100644 index 0000000..cd5e013 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/unresolved-2.d @@ -0,0 +1,5 @@ +#name: SB relocations failure test +#source: unresolved-2.s +#ld: +#error: \(\.text\+0x0\): undefined reference to `foo' + diff --git a/binutils-2.24/ld/testsuite/ld-arm/unresolved-2.s b/binutils-2.24/ld/testsuite/ld-arm/unresolved-2.s new file mode 100644 index 0000000..92b7f7f --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/unresolved-2.s @@ -0,0 +1,5 @@ + .text + .globl _start +_start: + ldr r1, [r0, #:sb_g0:(foo)] + diff --git a/binutils-2.24/ld/testsuite/ld-arm/unwind-1.d b/binutils-2.24/ld/testsuite/ld-arm/unwind-1.d new file mode 100644 index 0000000..add5cb7 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/unwind-1.d @@ -0,0 +1,10 @@ +#ld: -T arm.ld +#objdump: -s + +.*: file format.* + +#... +Contents of section .ARM.exidx: + 8008 (f8ffff7f b0b0a880 f4ffff7f 01000000|7ffffff8 80a8b0b0 7ffffff4 00000001) .* +Contents of section .far: +#... diff --git a/binutils-2.24/ld/testsuite/ld-arm/unwind-1.s b/binutils-2.24/ld/testsuite/ld-arm/unwind-1.s new file mode 100644 index 0000000..a4eb390 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/unwind-1.s @@ -0,0 +1,19 @@ + .syntax unified + .text + .global _start + .type _start, %function +_start: + .fnstart + .save {r4, lr} + bx lr + .fnend + + @ Section with no unwinding information. Linker should insert a cantunwind entry. + .section .after, "xa" + .global __aeabi_unwind_cpp_pr0 + .type __aeabi_unwind_cpp_pr0, %function +__aeabi_unwind_cpp_pr0: + bx lr + + .section .far + .word 0 diff --git a/binutils-2.24/ld/testsuite/ld-arm/unwind-2.d b/binutils-2.24/ld/testsuite/ld-arm/unwind-2.d new file mode 100644 index 0000000..a096c9b --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/unwind-2.d @@ -0,0 +1,10 @@ +#ld: -T arm.ld +#objdump: -s + +.*: file format.* + +#... +Contents of section .ARM.exidx: + 8004 (fcffff7f b0b0a880 f8ffff7f 01000000|7ffffffc 80a8b0b0 7ffffff8 00000001) .* +Contents of section .far: +#... diff --git a/binutils-2.24/ld/testsuite/ld-arm/unwind-2.s b/binutils-2.24/ld/testsuite/ld-arm/unwind-2.s new file mode 100644 index 0000000..cd5851c --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/unwind-2.s @@ -0,0 +1,19 @@ + .syntax unified + .text + + .global __aeabi_unwind_cpp_pr0 + .type __aeabi_unwind_cpp_pr0, %function +__aeabi_unwind_cpp_pr0: + .global _start + .type _start, %function +_start: + .fnstart + .save {r4, lr} + bx lr + .fnend + + @ last text section has unwind information. Linker should append a + @ terminating cantunwind entry. + + .section .far + .word 0 diff --git a/binutils-2.24/ld/testsuite/ld-arm/unwind-3.d b/binutils-2.24/ld/testsuite/ld-arm/unwind-3.d new file mode 100644 index 0000000..0b8e85e --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/unwind-3.d @@ -0,0 +1,11 @@ +#ld: -T arm.ld +#objdump: -s + +.*: file format.* + +#... +Contents of section .ARM.exidx: + 800c (f4ffff7f b0b0a880 f0ffff7f 01000000|7ffffff4 80a8b0b0 7ffffff0 00000001) .* + 801c (ecffff7f b0b0a880 e8ffff7f 01000000|7fffffec 80a8b0b0 7fffffe8 00000001) .* +Contents of section .far: +#... diff --git a/binutils-2.24/ld/testsuite/ld-arm/unwind-3.s b/binutils-2.24/ld/testsuite/ld-arm/unwind-3.s new file mode 100644 index 0000000..9cd8514 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/unwind-3.s @@ -0,0 +1,29 @@ + .syntax unified + .text + @ section without unwind info + .global _start + .type _start, %function +_start: + bl _before + + @ Section that will be placed first + .section .before, "xa" + .type _before, %function +_before: + .fnstart + .save {r4, lr} + bx lr + .fnend + + @ section that will be placed last + .section .after, "xa" + .global __aeabi_unwind_cpp_pr0 + .type __aeabi_unwind_cpp_pr0, %function +__aeabi_unwind_cpp_pr0: + .fnstart + .save {r4, lr} + bx lr + .fnend + + .section .far + .word 0 diff --git a/binutils-2.24/ld/testsuite/ld-arm/unwind-4.d b/binutils-2.24/ld/testsuite/ld-arm/unwind-4.d new file mode 100644 index 0000000..0a4427a --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/unwind-4.d @@ -0,0 +1,11 @@ +#ld: -T arm.ld +#objdump: -s + +.*: file format.* + +#... +Contents of section .ARM.exidx: + 8020 (e0ffff7f b0b0a880 dcffff7f e8ffff7f|7fffffe0 80a8b0b0 7fffffdc 7fffffe8) .* + 8030 (d8ffff7f b0b0a880 d8ffff7f 01000000|7fffffd8 80a8b0b0 7fffffd8 00000001) .* +Contents of section .far: +#... diff --git a/binutils-2.24/ld/testsuite/ld-arm/unwind-4.s b/binutils-2.24/ld/testsuite/ld-arm/unwind-4.s new file mode 100644 index 0000000..015311b --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/unwind-4.s @@ -0,0 +1,49 @@ + .syntax unified + .text + @ out of line table entry + .global _start + .type _start, %function +_start: + .fnstart + .save {r4, lr} + .vsave {d0} + .vsave {d4} + bl _before + .fnend + + @ entry that can be merged + .fnstart + .save {r4, lr} + bx lr + .fnend + + @ Section that will be placed first + .section .before, "xa" + .type _before, %function +_before: + .fnstart + .save {r4, lr} + bx lr + .fnend + + @ section that will be placed last + .section .after, "xa" + .global __aeabi_unwind_cpp_pr0 + .type __aeabi_unwind_cpp_pr0, %function +__aeabi_unwind_cpp_pr0: + .fnstart + .save {r4, lr} + bx lr + .fnend + @ final function is cantunwind, so output table size is smaller + @ than sum of input sections + .global __aeabi_unwind_cpp_pr1 + .type __aeabi_unwind_cpp_pr1, %function +__aeabi_unwind_cpp_pr1: + .fnstart + .cantunwind + bx lr + .fnend + + .section .far + .word 0 diff --git a/binutils-2.24/ld/testsuite/ld-arm/unwind-5.d b/binutils-2.24/ld/testsuite/ld-arm/unwind-5.d new file mode 100644 index 0000000..4928874 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/unwind-5.d @@ -0,0 +1,7 @@ +#ld: -T discard-unwind.ld +#objdump: -s + +.*: file format.* + +# Check we don't crash when discarding unwind info. +#... diff --git a/binutils-2.24/ld/testsuite/ld-arm/unwind-5.s b/binutils-2.24/ld/testsuite/ld-arm/unwind-5.s new file mode 100644 index 0000000..d15677d --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/unwind-5.s @@ -0,0 +1,12 @@ + .syntax unified + .text + .global __aeabi_unwind_cpp_pr0 + .type __aeabi_unwind_cpp_pr0, %function +__aeabi_unwind_cpp_pr0: + .global _start + .type _start, %function +_start: + .fnstart + .save {r4, lr} + bx lr + .fnend diff --git a/binutils-2.24/ld/testsuite/ld-arm/use-thumb-lib.s b/binutils-2.24/ld/testsuite/ld-arm/use-thumb-lib.s new file mode 100644 index 0000000..07a7f57 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/use-thumb-lib.s @@ -0,0 +1,25 @@ + .cpu arm10tdmi + .fpu softvfp + .eabi_attribute 18, 4 + .eabi_attribute 20, 1 + .eabi_attribute 21, 1 + .eabi_attribute 23, 3 + .eabi_attribute 24, 1 + .eabi_attribute 25, 1 + .eabi_attribute 26, 2 + .eabi_attribute 30, 6 + .file "use_thumb_lib.c" + .text + .align 2 + .global foo + .type foo, %function +foo: + @ args = 0, pretend = 0, frame = 0 + @ frame_needed = 1, uses_anonymous_args = 0 + mov ip, sp + stmfd sp!, {fp, ip, lr, pc} + sub fp, ip, #4 + bl lib_func2 + ldmfd sp, {fp, sp, pc} + .size foo, .-foo + .ident "GCC: (GNU) 4.1.0 (CodeSourcery ARM 2006q1-7)" diff --git a/binutils-2.24/ld/testsuite/ld-arm/use-thumb-lib.sym b/binutils-2.24/ld/testsuite/ld-arm/use-thumb-lib.sym new file mode 100644 index 0000000..2db6c06 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/use-thumb-lib.sym @@ -0,0 +1,4 @@ +#... + +.. +..: 0+ +0 +FUNC +GLOBAL +DEFAULT +UND lib_func2 +#pass + diff --git a/binutils-2.24/ld/testsuite/ld-arm/vfp11-fix-none.d b/binutils-2.24/ld/testsuite/ld-arm/vfp11-fix-none.d new file mode 100644 index 0000000..e1be0e0 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/vfp11-fix-none.d @@ -0,0 +1,9 @@ + +.*: .*file format elf32-(big|little)arm.* + +Disassembly of section \.text: + +00008000 <_start>: + 8000: ee474a20 \.word 0xee474a20 + 8004: ed927a00 \.word 0xed927a00 + 8008: e12fff1e bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/vfp11-fix-none.s b/binutils-2.24/ld/testsuite/ld-arm/vfp11-fix-none.s new file mode 100644 index 0000000..a016c49 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/vfp11-fix-none.s @@ -0,0 +1,7 @@ + .arm + .text + .globl _start +_start: + .word 0xee474a20 + .word 0xed927a00 + bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/vfp11-fix-scalar.d b/binutils-2.24/ld/testsuite/ld-arm/vfp11-fix-scalar.d new file mode 100644 index 0000000..a817af8 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/vfp11-fix-scalar.d @@ -0,0 +1,15 @@ + +.*: .*file format elf32-(big|little)arm.* + +Disassembly of section \.text: + +00008000 <_start>: + 8000: 0a000001 beq 800c <__vfp11_veneer_0> + +00008004 <__vfp11_veneer_0_r>: + 8004: ed927a00 (vldr|flds) s14, \[r2\] + 8008: e12fff1e bx lr + +0000800c <__vfp11_veneer_0>: + 800c: 0e474a20 (vmlaeq\.f32|fmacseq) s9, s14, s1 + 8010: eafffffb b 8004 <__vfp11_veneer_0_r> diff --git a/binutils-2.24/ld/testsuite/ld-arm/vfp11-fix-scalar.s b/binutils-2.24/ld/testsuite/ld-arm/vfp11-fix-scalar.s new file mode 100644 index 0000000..4ffb891 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/vfp11-fix-scalar.s @@ -0,0 +1,7 @@ + .arm + .text + .globl _start +_start: + fmacseq s9, s14, s1 + flds s14, [r2] + bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/vfp11-fix-vector.d b/binutils-2.24/ld/testsuite/ld-arm/vfp11-fix-vector.d new file mode 100644 index 0000000..b19645e --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/vfp11-fix-vector.d @@ -0,0 +1,16 @@ + +.*: .*file format elf32-(big|little)arm.* + +Disassembly of section \.text: + +00008000 <_start>: + 8000: 0a000002 beq 8010 <__vfp11_veneer_0> + +00008004 <__vfp11_veneer_0_r>: + 8004: e1a02003 mov r2, r3 + 8008: ed927a00 (vldr|flds) s14, \[r2\] + 800c: e12fff1e bx lr + +00008010 <__vfp11_veneer_0>: + 8010: 0e474a20 (vmlaeq\.f32|fmacseq) s9, s14, s1 + 8014: eafffffa b 8004 <__vfp11_veneer_0_r> diff --git a/binutils-2.24/ld/testsuite/ld-arm/vfp11-fix-vector.s b/binutils-2.24/ld/testsuite/ld-arm/vfp11-fix-vector.s new file mode 100644 index 0000000..05b6100 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/vfp11-fix-vector.s @@ -0,0 +1,8 @@ + .arm + .text + .globl _start +_start: + fmacseq s9, s14, s1 + mov r2,r3 + flds s14, [r2] + bx lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/vxworks1-lib.dd b/binutils-2.24/ld/testsuite/ld-arm/vxworks1-lib.dd new file mode 100644 index 0000000..77bdf72 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/vxworks1-lib.dd @@ -0,0 +1,41 @@ + +.*: file format .* + +Disassembly of section \.plt: + +00080800 <_PROCEDURE_LINKAGE_TABLE_>: + 80800: e59fc000 ldr ip, \[pc, #0\] ; 80808 <.*> + 80804: e79cf009 ldr pc, \[ip, r9\] + 80808: 0000000c .word 0x0000000c + 8080c: e59fc000 ldr ip, \[pc, #0\] ; 80814 <.*> + 80810: e599f008 ldr pc, \[r9, #8\] + 80814: 00000000 .word 0x00000000 + 80818: e59fc000 ldr ip, \[pc, #0\] ; 80820 <.*> + 8081c: e79cf009 ldr pc, \[ip, r9\] + 80820: 00000010 .word 0x00000010 + 80824: e59fc000 ldr ip, \[pc, #0\] ; 8082c <.*> + 80828: e599f008 ldr pc, \[r9, #8\] + 8082c: 0000000c .word 0x0000000c +Disassembly of section \.text: + +00080c00 <foo>: + 80c00: e92dc200 push {r9, lr, pc} + 80c04: e59f9024 ldr r9, \[pc, #36\] ; 80c30 <.*> + 80c08: e5999000 ldr r9, \[r9\] + 80c0c: e5999000 ldr r9, \[r9\] + 80c10: e59f001c ldr r0, \[pc, #28\] ; 80c34 <.*> + 80c14: e7991000 ldr r1, \[r9, r0\] + 80c18: e2811001 add r1, r1, #1 ; 0x1 + 80c1c: e7891000 str r1, \[r9, r0\] + 80c20: eb000004 bl 80c38 <slocal> + 80c24: ebfffefb bl 80818 <.*> + 80c28: ebfffef4 bl 80800 <.*> + 80c2c: e8bd8200 pop {r9, pc} + 80c30: 00000000 .word 0x00000000 + 80c34: 00000014 .word 0x00000014 + +00080c38 <slocal>: + 80c38: e1a0f00e mov pc, lr + +00080c3c <sglobal>: + 80c3c: e1a0f00e mov pc, lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/vxworks1-lib.nd b/binutils-2.24/ld/testsuite/ld-arm/vxworks1-lib.nd new file mode 100644 index 0000000..edf3db3 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/vxworks1-lib.nd @@ -0,0 +1,9 @@ +#... +Symbol table '\.dynsym' .*: +#... +.*: 00081400 * 0 * OBJECT * GLOBAL * DEFAULT * [0-9]+ _GLOBAL_OFFSET_TABLE_ +#... +Symbol table '\.symtab' .*: +#... +.*: 00081400 * 0 * OBJECT * GLOBAL * DEFAULT * [0-9]+ _GLOBAL_OFFSET_TABLE_ +#pass diff --git a/binutils-2.24/ld/testsuite/ld-arm/vxworks1-lib.rd b/binutils-2.24/ld/testsuite/ld-arm/vxworks1-lib.rd new file mode 100644 index 0000000..226bd09 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/vxworks1-lib.rd @@ -0,0 +1,12 @@ + +Relocation section '\.rela\.plt' at offset .* contains 2 entries: + Offset Info Type Sym\.Value Sym\. Name \+ Addend +0008140c .*16 R_ARM_JUMP_SLOT 00000000 sexternal \+ 0 +00081410 .*16 R_ARM_JUMP_SLOT 00080c3c sglobal \+ 0 + +Relocation section '\.rela\.dyn' at offset .* contains 4 entries: + Offset Info Type Sym\.Value Sym\. Name \+ Addend +00081800 00000017 R_ARM_RELATIVE * 00080c38 +00080c0c .*06 R_ARM_ABS12 00000000 __GOTT_INDEX__ \+ 0 +00080c30 .*02 R_ARM_ABS32 00000000 __GOTT_BASE__ \+ 0 +00081414 .*15 R_ARM_GLOB_DAT 00081c00 x \+ 0 diff --git a/binutils-2.24/ld/testsuite/ld-arm/vxworks1-lib.s b/binutils-2.24/ld/testsuite/ld-arm/vxworks1-lib.s new file mode 100644 index 0000000..66dfd1e --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/vxworks1-lib.s @@ -0,0 +1,36 @@ + .text + .globl foo + .type foo, %function +foo: + stmfd sp!, {r9, lr, pc} + ldr r9, 1f + ldr r9, [r9] + ldr r9, [r9, #__GOTT_INDEX__] + ldr r0, 1f + 4 + ldr r1, [r9, r0] + add r1, r1, #1 + str r1, [r9, r0] + bl slocal(PLT) + bl sglobal(PLT) + bl sexternal(PLT) + ldmfd sp!, {r9, pc} +1: + .word __GOTT_BASE__ + .word x(got) + .size foo, .-foo + + .type slocal, %function +slocal: + mov pc,lr + .size slocal, .-slocal + + .globl sglobal + .type sglobal, %function +sglobal: + mov pc,lr + .size sglobal, .-sglobal + + .data + .4byte slocal + + .comm x,4,4 diff --git a/binutils-2.24/ld/testsuite/ld-arm/vxworks1-lib.td b/binutils-2.24/ld/testsuite/ld-arm/vxworks1-lib.td new file mode 100644 index 0000000..9f223e3 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/vxworks1-lib.td @@ -0,0 +1,3 @@ +#... + 0x0+16 \(TEXTREL\) +0x0 +#pass diff --git a/binutils-2.24/ld/testsuite/ld-arm/vxworks1-static.d b/binutils-2.24/ld/testsuite/ld-arm/vxworks1-static.d new file mode 100644 index 0000000..88c0baf --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/vxworks1-static.d @@ -0,0 +1,4 @@ +#name: VxWorks executable test 1 (static) +#source: vxworks1.s +#ld: tmpdir/libvxworks1.so -Tvxworks1.ld +#error: Dynamic sections created in non-dynamic link diff --git a/binutils-2.24/ld/testsuite/ld-arm/vxworks1.dd b/binutils-2.24/ld/testsuite/ld-arm/vxworks1.dd new file mode 100644 index 0000000..0443122 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/vxworks1.dd @@ -0,0 +1,37 @@ + +.*: file format .* + +Disassembly of section \.plt: + +00080800 <_PROCEDURE_LINKAGE_TABLE_>: + 80800: e52dc008 str ip, \[sp, #-8\]! + 80804: e59fc000 ldr ip, \[pc, #0\] ; 8080c <.*> + 80808: e59cf008 ldr pc, \[ip, #8\] + 8080c: 00081400 .word 0x00081400 + 8080c: R_ARM_ABS32 _GLOBAL_OFFSET_TABLE_ + 80810: e59fc000 ldr ip, \[pc, #0\] ; 80818 <.*> + 80814: e59cf000 ldr pc, \[ip\] + 80818: 0008140c .word 0x0008140c + 80818: R_ARM_ABS32 _GLOBAL_OFFSET_TABLE_\+0xc + 8081c: e59fc000 ldr ip, \[pc, #0\] ; 80824 <.*> + 80820: eafffff6 b 80800 <.*> + 80824: 00000000 .word 0x00000000 + 80828: e59fc000 ldr ip, \[pc, #0\] ; 80830 <.*> + 8082c: e59cf000 ldr pc, \[ip\] + 80830: 00081410 .word 0x00081410 + 80830: R_ARM_ABS32 _GLOBAL_OFFSET_TABLE_\+0x10 + 80834: e59fc000 ldr ip, \[pc, #0\] ; 8083c <.*> + 80838: eafffff0 b 80800 <.*> + 8083c: 0000000c .word 0x0000000c +Disassembly of section \.text: + +00080c00 <_start>: + 80c00: ebffff08 bl 80828 <.*> + 80c00: R_ARM_PC24 \.plt\+0x20 + 80c04: eb000000 bl 80c0c <sexternal> + 80c04: R_ARM_PC24 sexternal\+0xfffffff8 + 80c08: eaffff00 b 80810 <.*> + 80c08: R_ARM_PC24 \.plt\+0x8 + +00080c0c <sexternal>: + 80c0c: e1a0f00e mov pc, lr diff --git a/binutils-2.24/ld/testsuite/ld-arm/vxworks1.ld b/binutils-2.24/ld/testsuite/ld-arm/vxworks1.ld new file mode 100644 index 0000000..65bf65d --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/vxworks1.ld @@ -0,0 +1,30 @@ +SECTIONS +{ + . = 0x80000; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + + . = ALIGN (0x400); + .rela.dyn : { *(.rela.dyn) } + .rela.plt : { *(.rela.plt) } + + . = ALIGN (0x400); + .plt : { *(.plt) } + + . = ALIGN (0x400); + .text : { *(.text) } + + . = ALIGN (0x1000); + .dynamic : { *(.dynamic) } + + . = ALIGN (0x400); + .got : { *(.got.plt) *(.got) } + + . = ALIGN (0x400); + .data : { *(.data) } + + . = ALIGN (0x400); + .bss : { *(.bss) *(.dynbss) } +} diff --git a/binutils-2.24/ld/testsuite/ld-arm/vxworks1.rd b/binutils-2.24/ld/testsuite/ld-arm/vxworks1.rd new file mode 100644 index 0000000..8d7d5cb --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/vxworks1.rd @@ -0,0 +1,19 @@ + +Relocation section '\.rela\.plt' at offset .* contains 2 entries: + Offset Info Type Sym\.Value Sym\. Name \+ Addend +0008140c .*16 R_ARM_JUMP_SLOT 00080810 sglobal \+ 0 +00081410 .*16 R_ARM_JUMP_SLOT 00080828 foo \+ 0 + +Relocation section '\.rela\.text' at offset .* contains 3 entries: + Offset Info Type Sym.Value Sym. Name \+ Addend +00080c00 .*01 R_ARM_PC24 00080800 \.plt \+ 20 +00080c04 .*01 R_ARM_PC24 00080c0c sexternal \+ fffffff8 +00080c08 .*01 R_ARM_PC24 00080800 \.plt \+ 8 + +Relocation section '\.rela\.plt\.unloaded' at offset .* contains 5 entries: + Offset Info Type Sym\.Value Sym\. Name \+ Addend +0008080c .*02 R_ARM_ABS32 00081400 _GLOBAL_OFFSET_TABLE_ \+ 0 +00080818 .*02 R_ARM_ABS32 00081400 _GLOBAL_OFFSET_TABLE_ \+ c +0008140c .*02 R_ARM_ABS32 00080800 _PROCEDURE_LINKAGE_TAB.* \+ 0 +00080830 .*02 R_ARM_ABS32 00081400 _GLOBAL_OFFSET_TABLE_ \+ 10 +00081410 .*02 R_ARM_ABS32 00080800 _PROCEDURE_LINKAGE_TAB.* \+ 0 diff --git a/binutils-2.24/ld/testsuite/ld-arm/vxworks1.s b/binutils-2.24/ld/testsuite/ld-arm/vxworks1.s new file mode 100644 index 0000000..0139a11 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/vxworks1.s @@ -0,0 +1,14 @@ + .text + .globl _start + .type _start, %function +_start: + bl foo + bl sexternal + b sglobal + .size _start, .-_start + + .globl sexternal + .type sexternal, %function +sexternal: + mov pc, lr + .size sexternal, .-sexternal diff --git a/binutils-2.24/ld/testsuite/ld-arm/vxworks2-static.sd b/binutils-2.24/ld/testsuite/ld-arm/vxworks2-static.sd new file mode 100644 index 0000000..912755b --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/vxworks2-static.sd @@ -0,0 +1,9 @@ +#... +Elf file type is EXEC \(Executable file\) +Entry point 0x80000 +#... +Program Headers: + Type .* + LOAD .* 0x00080000 0x00080000 .* R E 0x1000 + +#... diff --git a/binutils-2.24/ld/testsuite/ld-arm/vxworks2.s b/binutils-2.24/ld/testsuite/ld-arm/vxworks2.s new file mode 100644 index 0000000..1bd207b --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/vxworks2.s @@ -0,0 +1,5 @@ + .globl _start + .type _start, %function +_start: + mov pc, lr + .end _start diff --git a/binutils-2.24/ld/testsuite/ld-arm/vxworks2.sd b/binutils-2.24/ld/testsuite/ld-arm/vxworks2.sd new file mode 100644 index 0000000..5ff87d3 --- /dev/null +++ b/binutils-2.24/ld/testsuite/ld-arm/vxworks2.sd @@ -0,0 +1,13 @@ +#... +Elf file type is EXEC \(Executable file\) +Entry point 0x80400 +#... +Program Headers: + Type .* + PHDR .* +#... + LOAD .* 0x00080000 0x00080000 .* R E 0x1000 + LOAD .* 0x00081000 0x00081000 .* RW 0x1000 + DYNAMIC .* + +#... |