| Commit message (Collapse) | Author | Age | Files | Lines |
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Change-Id: I0454073cfad254ee5e28c5d597d615abdef9331d
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Change-Id: I5e0be2e412d13fe4a5d738d7949bfb11909783d0
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Change-Id: Iea5ae8c19790beebc6188b094895cbe7c7c221c5
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opcodes/ChangeLog:
2015-03-10 Renlin Li <renlin.li@arm.com>
* aarch64-tbl.h (aarch64_opcode_table): Remove strub, ldurb, ldursb,
stur, ldur, sturh, ldurh, ldursh, ldursw, prfum F_HAS_ALIAS flag and
related alias.
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Likewise.
* aarch64-opc-2.c: Likewise.
gas/testsuite/ChangeLog:
2015-03-10 Renlin Li <renlin.li@arm.com>
* gas/aarch64/ldst-reg-uns-imm.d: Adjust expected output.
* gas/aarch64/ldst-reg-unscaled-imm.d: Likewise.
* gas/aarch64/reloc-insn.d: Likewise.
Change-Id: Ifdaa84564771ef57093943c5778e80570ec04af4
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Removing a group of unused functions from the AArch64 BFD backend.
Change-Id: I9dc2a43084f21ee2771d26d32e1a26692018bb5c
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The BFD/LD patch for Cortex-A53 erratum 835769
(https://sourceware.org/ml/binutils/2014-10/msg00199.html)
does not handle a particular case of the AArch64 ELF ABI where mapping
symbols are allowed to be unordered in the symbol table (not in address order).
The unordering causes section maps to be traversed with incorrect span boundaries
(in the erratum scanning function) which causes memory faults. The attached
patch fixes this issue by ordering the section maps by their 'vma' before
starting to traverse them.
While this is not an issue with a the GNU toolchain, it is a potential issue
with Clang/LLVM. We have observed at least one case where LLVM generates an
ELF object with mapping symbols unordered in the symbol table and causes a fault.
We have been unable to construct a test case with the GNU toolchain. We have verified
by manual inspection the correctness of the traversal with this patch for an
LLVM-generated ELF object which triggered this issue. This patch has been bootstrapped
on aarch64-linux and regressed.
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2015-03-03 Cary Coutant <ccoutant@google.com>
gold/
* parameters.cc (Parameters::set_target_once): Call
Target::select_as_default_target just once from here...
(set_parameters_target): ...instead of from here.
Change-Id: Ic4b1503b1bb453b9812188e0a98482bc489d9197
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1. revert https://android-review.googlesource.com/#/c/38591.
2. add a few constants from ToT
3. fix a typo about pthread_mutexattr_settype
Change-Id: I55a829e7907658f920aedbf1100c6d9b1a93052b
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commit be66981e1605eff305ac9c561825f4bd6801fca2
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Sun Feb 22 05:18:50 2015 -0800
Set GOLD_DEFAULT_SIZE to 32 for x32
* configure.ac (default_size): Set to 32 for x32.
* configure: Regenerated.
Change-Id: I4b2d8927e4e41cf2fac3c92d00e8aef69b5ce21f
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Backport trunk commit 635aa that fixes race condition causing assert in
Eh_frame_hdr::do_sized_write().
2014-09-23 Taiju Tsuiki <tzik@google.com>
Cary Coutant <ccoutant@google.com>
gold/
* gold.cc (queue_final_tasks): Add Write_sections_task as a
* blocker
on input_sections_blocker.
* layout.cc (Write_sections_task::locks): Unblock
input_sections_blocker_.
* layout.h (Write_sections_task::Write_sections_task): Add
input_sections_blocker.
* testsuite/Makefile.am (exception_x86_64_bnd_test): Add
* gcctestdir/ld
to DEPENDENCIES.
* testsuite/Makefile.in: Regenerate.
Change-Id: I17a0f2aaf565b775f92f4806c4abcbea5d2dd803
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DT_MIPS_RLD_MAP2 is used by the loader to communicate shared library
information of a PIE to the GDB.
Signed-off-by: Raghu Gandham <raghu.gandham@imgtec.com>
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MXU support, and a fix to needed by gdbserver.
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For 64-bit address space, it should be 8-bytes aligned.
'ALIGNMENT' will be expanded to '64 / 8' for 64-bit and '32 / 8' for 32-bit.
Change-Id: Ide4cda93afae0535ccc30bff53c67b0d637a4198
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e0bca373a85fa71b89d9ea42370433b3c0499b9d
160ce55a90bcdcb3000d74805795969edc3f8422
b33d0ddc123435be5e60ebb15a37b3bfb651dc7e
f25603579c0a04b3d5099259cf54c5b3c8775b78
1000fadfaa979b623e1fbd0c87858be4f5b6dffd
83cabeb81083ac53719eaaf68c48734ff9c48fa9
Change-Id: I15f9c78c69f4cfce7a617b7e9d91dd855b6d8efc
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local patches will be re-applied later
commit a30720e3e633f275250e26f85ccae5dbdddfb6c6
Author: Alan Modra <amodra@gmail.com>
Date: Wed Nov 19 10:30:16 2014 +1030
daily update
Change-Id: Ieb2a3f4dd2ecb289ac5305ff08d428b2847494ab
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executable.
Prevent the linker from generating a seg-fault when the user attempts to link an
ARM ELF binary into an AARCH64 ELF executable.
2014-03-12 Nick Clifton <nickc@redhat.com>
PR ld/16671
* elf32-arm.c (elf32_arm_add_symbol_hook): Check for ARM format
before testing for vxworks.
Change-Id: Ibc81a168b85f70422d428d857b8de0c71e2824ed
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For 64-bit address space, it should be 8-bytes aligned.
'ALIGNMENT' will be expanded to '64 / 8' for 64-bit and '32 / 8' for 32-bit.
Change-Id: I7bbbf04a9b4e68a342201ec7c04f67497e3fa3a1
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7a17fb955bb42018c3c84e003700ac120c3502d4
b2a417bdb17191ef2afc20bbd308e308c0730403
e0bca373a85fa71b89d9ea42370433b3c0499b9d
57fbbfbda5a77b558c24a44e7eed8c4030c31bcd
160ce55a90bcdcb3000d74805795969edc3f8422
b33d0ddc123435be5e60ebb15a37b3bfb651dc7e
f25603579c0a04b3d5099259cf54c5b3c8775b78
1000fadfaa979b623e1fbd0c87858be4f5b6dffd
83cabeb81083ac53719eaaf68c48734ff9c48fa9
Change-Id: I174be6632426ed720e643bca7c48a9077b31d34b
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For MIPS -mmsa support
Change-Id: I08c4f002fa7b33dec85ed75956e6ab551bb03c96
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