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authorWolfgang Ocker <weo@reccoware.de>2008-08-26 19:55:23 +0200
committerStefan Roese <sr@denx.de>2008-08-29 10:21:31 +0200
commit52aef8f9ba28b747973bf76741c23db658d5773c (patch)
tree0cba97e72c65ed34333674c2a15e8c60645aef23
parent5bc542a593abc9e974fbd34704af85c37c366c60 (diff)
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ppc4xx: NAND configuration
Made NAND bank configuration setting a config variable. Signed-off-by: Wolfgang Ocker <weo@reccoware.de> Signed-off-by: Stefan Roese <sr@denx.de>
-rw-r--r--cpu/ppc4xx/ndfc.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/cpu/ppc4xx/ndfc.c b/cpu/ppc4xx/ndfc.c
index 72acfd0..a8e8aba 100644
--- a/cpu/ppc4xx/ndfc.c
+++ b/cpu/ppc4xx/ndfc.c
@@ -149,6 +149,10 @@ static int ndfc_verify_buf(struct mtd_info *mtdinfo, const uint8_t *buf, int len
}
#endif /* #ifndef CONFIG_NAND_SPL */
+#ifndef CFG_NAND_BCR
+#define CFG_NAND_BCR 0x80002222
+#endif
+
void board_nand_select_device(struct nand_chip *nand, int chip)
{
/*
@@ -161,7 +165,7 @@ void board_nand_select_device(struct nand_chip *nand, int chip)
/* Set NandFlash Core Configuration Register */
/* 1 col x 2 rows */
out_be32((u32 *)(base + NDFC_CCR), 0x00000000 | (cs << 24));
- out_be32((u32 *)(base + NDFC_BCFG0 + (cs << 2)), 0x80002222);
+ out_be32((u32 *)(base + NDFC_BCFG0 + (cs << 2)), CFG_NAND_BCR);
}
int board_nand_init(struct nand_chip *nand)