diff options
author | Prafulla Wadaskar <prafulla@marvell.com> | 2009-06-20 11:01:52 +0200 |
---|---|---|
committer | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2009-07-06 21:52:15 +0200 |
commit | 5c3d5817e5e68b828c165c501c215e793dc63aac (patch) | |
tree | 6a78d85a298f0dfbb212a4a2910f768dbaf29e84 | |
parent | 9c8c706c92e53433a871a563946c38075d76504d (diff) | |
download | bootable_bootloader_goldelico_gta04-5c3d5817e5e68b828c165c501c215e793dc63aac.zip bootable_bootloader_goldelico_gta04-5c3d5817e5e68b828c165c501c215e793dc63aac.tar.gz bootable_bootloader_goldelico_gta04-5c3d5817e5e68b828c165c501c215e793dc63aac.tar.bz2 |
arm: generic cache.h for ARM architectures
This patch is required for Kirkwood SoC support
may be used by other ARM architectures
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
-rw-r--r-- | include/asm-arm/cache.h | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/include/asm-arm/cache.h b/include/asm-arm/cache.h new file mode 100644 index 0000000..248240b --- /dev/null +++ b/include/asm-arm/cache.h @@ -0,0 +1,41 @@ +/* + * (C) Copyright 2009 + * Marvell Semiconductor <www.marvell.com> + * Written-by: Prafulla Wadaskar <prafulla@marvell.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef _ASM_CACHE_H +#define _ASM_CACHE_H + +#include <asm/system.h> + +/* + * Invalidate L2 Cache using co-proc instruction + */ +static inline void invalidate_l2_cache(void) +{ + unsigned int val=0; + + asm volatile("mcr p15, 1, %0, c15, c11, 0 @ invl l2 cache" + : : "r" (val) : "cc"); + isb(); +} +#endif /* _ASM_CACHE_H */ |