summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorStefan Roese <sr@denx.de>2009-05-20 10:58:01 +0200
committerStefan Roese <sr@denx.de>2009-05-23 12:51:39 +0200
commit5d841fac8249a2b3f9a814da2140132be0a9f60d (patch)
tree443875d17da9b95c034b42d92d0e500a64e96f0f
parent5af210c2ed5bc38e2d059d512ca4e46e81221af5 (diff)
downloadbootable_bootloader_goldelico_gta04-5d841fac8249a2b3f9a814da2140132be0a9f60d.zip
bootable_bootloader_goldelico_gta04-5d841fac8249a2b3f9a814da2140132be0a9f60d.tar.gz
bootable_bootloader_goldelico_gta04-5d841fac8249a2b3f9a814da2140132be0a9f60d.tar.bz2
ppc4xx: Move definition for PPC4xx NAND FLASH controller to header
This patch moves the definition for the PPC4xx NAND FLASH controller (NDFC) CONFIG_NAND_NDFC into include/ppc4xx.h. This is needed for the upcoming fix for the ECC byte ordering of the NDFC driver. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Scott Wood <scottwood@freescale.com>
-rw-r--r--cpu/ppc4xx/ndfc.c9
-rw-r--r--include/ppc4xx.h7
2 files changed, 10 insertions, 6 deletions
diff --git a/cpu/ppc4xx/ndfc.c b/cpu/ppc4xx/ndfc.c
index 3a5af12..ba481ad 100644
--- a/cpu/ppc4xx/ndfc.c
+++ b/cpu/ppc4xx/ndfc.c
@@ -1,9 +1,9 @@
/*
* Overview:
* Platform independend driver for NDFC (NanD Flash Controller)
- * integrated into EP440 cores
+ * integrated into IBM/AMCC PPC4xx cores
*
- * (C) Copyright 2006-2007
+ * (C) Copyright 2006-2009
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* Based on original work by
@@ -32,10 +32,7 @@
#include <common.h>
#if defined(CONFIG_CMD_NAND) && !defined(CONFIG_NAND_LEGACY) && \
- (defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
- defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
- defined(CONFIG_405EZ) || defined(CONFIG_405EX) || \
- defined(CONFIG_460EX) || defined(CONFIG_460GT))
+ defined(CONFIG_NAND_NDFC)
#include <nand.h>
#include <linux/mtd/ndfc.h>
diff --git a/include/ppc4xx.h b/include/ppc4xx.h
index f147885..55ff323 100644
--- a/include/ppc4xx.h
+++ b/include/ppc4xx.h
@@ -46,6 +46,13 @@
#define CONFIG_SDRAM_PPC4xx_IBM_DDR2 /* IBM DDR(2) controller */
#endif
+#if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
+ defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
+ defined(CONFIG_405EZ) || defined(CONFIG_405EX) || \
+ defined(CONFIG_460EX) || defined(CONFIG_460GT)
+#define CONFIG_NAND_NDFC
+#endif
+
/* PLB4 CrossBar Arbiter Core supported across PPC4xx families */
#if defined(CONFIG_405EX) || \
defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \