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| author | Mingkai Hu <Mingkai.hu@freescale.com> | 2009-08-18 15:37:15 +0800 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2009-08-28 17:12:41 -0500 |
| commit | 76b474e2f5a223fcabfeaa4f1c8fb699062b986c (patch) | |
| tree | 5b3dc4828ac7b9ce1775778f0296480ba6c87be0 | |
| parent | 158c6724c99368a4d8eef11ee7e3c7ad0ef03a15 (diff) | |
| download | bootable_bootloader_goldelico_gta04-76b474e2f5a223fcabfeaa4f1c8fb699062b986c.zip bootable_bootloader_goldelico_gta04-76b474e2f5a223fcabfeaa4f1c8fb699062b986c.tar.gz bootable_bootloader_goldelico_gta04-76b474e2f5a223fcabfeaa4f1c8fb699062b986c.tar.bz2 | |
85xx: Add L2SRAM Register's macro definition
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| -rw-r--r-- | cpu/mpc85xx/cpu_init.c | 5 | ||||
| -rw-r--r-- | include/asm-ppc/immap_85xx.h | 5 |
2 files changed, 8 insertions, 2 deletions
diff --git a/cpu/mpc85xx/cpu_init.c b/cpu/mpc85xx/cpu_init.c index 41de694..c4d1a9d 100644 --- a/cpu/mpc85xx/cpu_init.c +++ b/cpu/mpc85xx/cpu_init.c @@ -330,11 +330,12 @@ int cpu_init_r(void) break; } - if (l2cache->l2ctl & 0x80000000) { + if (l2cache->l2ctl & MPC85xx_L2CTL_L2E) { puts("already enabled"); l2srbar = l2cache->l2srbar0; #ifdef CONFIG_SYS_INIT_L2_ADDR - if (l2cache->l2ctl & 0x00010000 && l2srbar >= CONFIG_SYS_FLASH_BASE) { + if (l2cache->l2ctl & MPC85xx_L2CTL_L2SRAM_ENTIRE + && l2srbar >= CONFIG_SYS_FLASH_BASE) { l2srbar = CONFIG_SYS_INIT_L2_ADDR; l2cache->l2srbar0 = l2srbar; printf("moving to 0x%08x", CONFIG_SYS_INIT_L2_ADDR); diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h index 0efef05..375d804 100644 --- a/include/asm-ppc/immap_85xx.h +++ b/include/asm-ppc/immap_85xx.h @@ -411,6 +411,11 @@ typedef struct ccsr_l2cache { char res15[420]; } ccsr_l2cache_t; +#define MPC85xx_L2CTL_L2E 0x80000000 +#define MPC85xx_L2CTL_L2SRAM_ENTIRE 0x00010000 +#define MPC85xx_L2ERRDIS_MBECC 0x00000008 +#define MPC85xx_L2ERRDIS_SBECC 0x00000004 + /* * DMA Registers(0x2_1000-0x2_2000) */ |