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authorH. Nikolaus Schaller <hns@goldelico.com>2011-05-29 21:49:53 +0200
committerH. Nikolaus Schaller <hns@goldelico.com>2011-05-29 21:49:53 +0200
commit89c6341eca3dd330494f33192a92fcee91998741 (patch)
treea66b9c081b7e7bb118ed74b66ea78159a5d44201
parentc4c609fff5cd7afba6fc4f55a7dc1e52f9bd6132 (diff)
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added systest audio command; added some code fragment to send audio data stored in a code table through McBSP2 to the BeagleBoard audio out
-rw-r--r--board/goldelico/gta04/commands.c11
-rw-r--r--board/goldelico/gta04/systest.c261
-rw-r--r--board/goldelico/gta04/systest.h1
3 files changed, 266 insertions, 7 deletions
diff --git a/board/goldelico/gta04/commands.c b/board/goldelico/gta04/commands.c
index 339857c..110c455 100644
--- a/board/goldelico/gta04/commands.c
+++ b/board/goldelico/gta04/commands.c
@@ -581,10 +581,16 @@ U_BOOT_CMD(gps, 3, 0, do_gps, "GPS sub-system",
static int do_systest(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
{
+ if(argc == 2) {
+ if (strncmp ("au", argv[1], 2) == 0) {
+ return audiotest();
+ }
+ }
return systest();
}
-U_BOOT_CMD(systest, 2, 0, do_systest, "System Test", "");
+U_BOOT_CMD(systest, 3, 0, do_systest, "System Test",
+ "audio - test audio\n");
static int do_halt(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
@@ -597,7 +603,8 @@ static int do_halt(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
return (0);
}
-U_BOOT_CMD(halt, 2, 0, do_halt, "Powerdown", "");
+U_BOOT_CMD(halt, 2, 0, do_halt, "Powerdown",
+ "");
static int do_mux(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
diff --git a/board/goldelico/gta04/systest.c b/board/goldelico/gta04/systest.c
index 7d16350..58df02a 100644
--- a/board/goldelico/gta04/systest.c
+++ b/board/goldelico/gta04/systest.c
@@ -95,7 +95,15 @@ int systest(void)
printf("OV9655: %s\n", !i2c_probe(0x30)?"found":"-");
printf("TPS61050: %s\n", !i2c_probe(0x33)?"found":"-");
printf("EEPROM: %s\n", !i2c_probe(0x50)?"found":"-");
+ printf("VCNL4000: %s\n", !i2c_probe(0x13)?"found":"-");
i2c_set_bus_num(2); // I2C3
+ /* nothing to check */
+ i2c_set_bus_num(0); // I2C1
+ if(!jbt_check())
+ printf("DISPLAY: ok\n");
+ else
+ printf("DISPLAY: failed\n");
+
// LEDs
// GPS UART
// RAM-Test
@@ -103,11 +111,254 @@ int systest(void)
// Buttons
// Power
// Display communication
- if(!jbt_check())
- printf("DISPLAY: ok\n");
- else
- printf("DISPLAY: failed\n");
- i2c_set_bus_num(0); // I2C1
+ // PCM
+ // OTG USB
+ // Charger
+ // internal USB
+ // UMTS Module
return (0);
}
+/* audio test taken from BeagleBoard B validation U-Boot (1.3.3) */
+/* http://code.google.com/p/beagleboard/wiki/BeagleSourceCode */
+
+static ushort tone[] = {
+ 0x0ce4, 0x0ce4, 0x1985, 0x1985, 0x25A1, 0x25A1, 0x30FD, 0x30FE,
+ 0x3B56, 0x3B55, 0x447A, 0x447A, 0x4C3B, 0x4C3C, 0x526D, 0x526C,
+ 0x56F1, 0x56F1, 0x59B1, 0x59B1, 0x5A9E, 0x5A9D, 0x59B1, 0x59B2,
+ 0x56F3, 0x56F2, 0x526D, 0x526D, 0x4C3B, 0x4C3B, 0x447C, 0x447C,
+ 0x3B5A, 0x3B59, 0x30FE, 0x30FE, 0x25A5, 0x25A6, 0x1989, 0x198A,
+ 0x0CE5, 0x0CE3, 0x0000, 0x0000, 0xF31C, 0xF31C, 0xE677, 0xE676,
+ 0xDA5B, 0xDA5B, 0xCF03, 0xCF03, 0xC4AA, 0xC4AA, 0xBB83, 0xBB83,
+ 0xB3C5, 0xB3C5, 0xAD94, 0xAD94, 0xA90D, 0xA90E, 0xA64F, 0xA64E,
+ 0xA562, 0xA563, 0xA64F, 0xA64F, 0xA910, 0xA90F, 0xAD93, 0xAD94,
+ 0xB3C4, 0xB3C4, 0xBB87, 0xBB86, 0xC4AB, 0xC4AB, 0xCF03, 0xCF03,
+ 0xDA5B, 0xDA5A, 0xE67B, 0xE67B, 0xF31B, 0xF3AC, 0x0000, 0x0000,
+ 0x0CE4, 0x0CE4, 0x1985, 0x1985, 0x25A1, 0x25A1, 0x30FD, 0x30FE,
+ 0x3B56, 0x3B55, 0x447A, 0x447A, 0x4C3B, 0x4C3C, 0x526D, 0x526C,
+ 0x56F1, 0x56F1, 0x59B1, 0x59B1, 0x5A9E, 0x5A9D, 0x59B1, 0x59B2,
+ 0x56F3, 0x56F2, 0x526D, 0x526D, 0x4C3B, 0x4C3B, 0x447C, 0x447C,
+ 0x3B5A, 0x3B59, 0x30FE, 0x30FE, 0x25A5, 0x25A6, 0x1989, 0x198A,
+ 0x0CE5, 0x0CE3, 0x0000, 0x0000, 0xF31C, 0xF31C, 0xE677, 0xE676,
+ 0xDA5B, 0xDA5B, 0xCF03, 0xCF03, 0xC4AA, 0xC4AA, 0xBB83, 0xBB83,
+ 0xB3C5, 0xB3C5, 0xAD94, 0xAD94, 0xA90D, 0xA90E, 0xA64F, 0xA64E,
+ 0xA562, 0xA563, 0xA64F, 0xA64F, 0xA910, 0xA90F, 0xAD93, 0xAD94,
+ 0xB3C4, 0xB3C4, 0xBB87, 0xBB86, 0xC4AB, 0xC4AB, 0xCF03, 0xCF03,
+ 0xDA5B, 0xDA5A, 0xE67B, 0xE67B, 0xF31B, 0xF3AC, 0x0000, 0x0000,
+ 0x0CE4, 0x0CE4, 0x1985, 0x1985, 0x25A1, 0x25A1, 0x30FD, 0x30FE,
+ 0x3B56, 0x3B55, 0x447A, 0x447A, 0x4C3B, 0x4C3C, 0x526D, 0x526C,
+ 0x56F1, 0x56F1, 0x59B1, 0x59B1, 0x5A9E, 0x5A9D, 0x59B1, 0x59B2,
+ 0x56F3, 0x56F2, 0x526D, 0x526D, 0x4C3B, 0x4C3B, 0x447C, 0x447C,
+ 0x3B5A, 0x3B59, 0x30FE, 0x30FE, 0x25A5, 0x25A6, 0x1989, 0x198A,
+ 0x0CE5, 0x0CE3, 0x0000, 0x0000, 0xF31C, 0xF31C, 0xE677, 0xE676,
+ 0xDA5B, 0xDA5B, 0xCF03, 0xCF03, 0xC4AA, 0xC4AA, 0xBB83, 0xBB83,
+ 0xB3C5, 0xB3C5, 0xAD94, 0xAD94, 0xA90D, 0xA90E, 0xA64F, 0xA64E,
+ 0xA562, 0xA563, 0xA64F, 0xA64F, 0xA910, 0xA90F, 0xAD93, 0xAD94,
+ 0xB3C4, 0xB3C4, 0xBB87, 0xBB86, 0xC4AB, 0xC4AB, 0xCF03, 0xCF03,
+ 0xDA5B, 0xDA5A, 0xE67B, 0xE67B, 0xF31B, 0xF3AC, 0x0000, 0x0000
+};
+
+int audiotest(int channel)
+{
+
+ unsigned char byte;
+ int count = 0;
+
+ printf("Test Audio Tone on Speaker\n");
+ printf("Initializing over I2C1");
+ i2c_set_bus_num(0); // I2C1
+
+ // program Audio controller (see document SWCU050D)
+
+ byte = 0x20;
+ i2c_write(0x4B, 0x7A, 1, &byte, 1); // VAUX3_DEV_GRP
+ byte = 0x03;
+ i2c_write(0x4B, 0x7D, 1, &byte, 1); // VAUX3_DEDICATED
+ byte = 0xE0;
+ i2c_write(0x4B, 0x8E, 1, &byte, 1); // VPLL2_DEV_GRP
+ byte = 0x05;
+ i2c_write(0x4B, 0x91, 1, &byte, 1); // VPLL2_DEDICATED
+
+ byte = 0x03;
+ i2c_write(0x49, 0x01, 1, &byte, 1); // codec_MODE
+ byte = 0xc0;
+ i2c_write(0x49, 0x02, 1, &byte, 1); // OPTION
+ byte = 0x00;
+ i2c_write(0x49, 0x03, 1, &byte, 1); // ?
+ byte = 0x00;
+ i2c_write(0x49, 0x04, 1, &byte, 1); // MICBIAS_CTL
+ byte = 0x00;
+ i2c_write(0x49, 0x05, 1, &byte, 1); // ANAMICL
+ byte = 0x00;
+ i2c_write(0x49, 0x06, 1, &byte, 1); // ANAMICR
+ byte = 0x00;
+ i2c_write(0x49, 0x07, 1, &byte, 1); // AVADC_CTL
+ byte = 0x00;
+ i2c_write(0x49, 0x08, 1, &byte, 1); // ADCMICSEL
+ byte = 0x00;
+ i2c_write(0x49, 0x09, 1, &byte, 1); // DIGMIXING
+ byte = 0x00;
+ i2c_write(0x49, 0x0a, 1, &byte, 1); // ATXL1PGA
+ byte = 0x00;
+ i2c_write(0x49, 0x0b, 1, &byte, 1); // ATXR1PGA
+ byte = 0x00;
+ i2c_write(0x49, 0x0c, 1, &byte, 1); // AVTXL2PGA
+ byte = 0x00;
+ i2c_write(0x49, 0x0d, 1, &byte, 1); // AVTXR2PGA
+ byte = 0x01;
+ i2c_write(0x49, 0x0e, 1, &byte, 1); // AUDIO_IF
+ byte = 0x00;
+ i2c_write(0x49, 0x0f, 1, &byte, 1); // VOICE_IF
+ byte = 0x00;
+ i2c_write(0x49, 0x10, 1, &byte, 1); // ARXR1PGA
+ byte = 0x00;
+ i2c_write(0x49, 0x11, 1, &byte, 1); // ARXL1PGA
+ byte = 0x6c;
+ i2c_write(0x49, 0x12, 1, &byte, 1); // ARXR2PGA
+ byte = 0x6c;
+ i2c_write(0x49, 0x13, 1, &byte, 1); // ARXL2PGA
+ byte = 0x00;
+ i2c_write(0x49, 0x14, 1, &byte, 1); // VRXPGA
+ byte = 0x00;
+ i2c_write(0x49, 0x15, 1, &byte, 1); // VSTPGA
+ byte = 0x00;
+ i2c_write(0x49, 0x16, 1, &byte, 1); // VRX2ARXPGA
+ byte = 0x0c;
+ i2c_write(0x49, 0x17, 1, &byte, 1); // AVDAC_CTL
+ byte = 0x00;
+ i2c_write(0x49, 0x18, 1, &byte, 1); // ARX2VTXPGA
+ byte = 0x00;
+ i2c_write(0x49, 0x19, 1, &byte, 1); // ARXL1_APGA_CTL
+ byte = 0x00;
+ i2c_write(0x49, 0x1a, 1, &byte, 1); // ARXR1_APGA_CTL
+ byte = 0x2b;
+ i2c_write(0x49, 0x1b, 1, &byte, 1); // ARXL2_APGA_CTL
+ byte = 0x2b;
+ i2c_write(0x49, 0x1c, 1, &byte, 1); // ARXR2_APGA_CTL
+ byte = 0x00;
+ i2c_write(0x49, 0x1d, 1, &byte, 1); // ATX2ARXPGA
+ byte = 0x00;
+ i2c_write(0x49, 0x1e, 1, &byte, 1); // BT_IF
+ byte = 0x00;
+ i2c_write(0x49, 0x1f, 1, &byte, 1); // BTPGA
+ byte = 0x00;
+ i2c_write(0x49, 0x20, 1, &byte, 1); // BTSTPGA
+ byte = 0x00;
+ i2c_write(0x49, 0x21, 1, &byte, 1); // EAR_CTL
+ byte = 0x24;
+ i2c_write(0x49, 0x22, 1, &byte, 1); // HS_SEL
+ byte = 0x0a;
+ i2c_write(0x49, 0x23, 1, &byte, 1); // HS_GAIN_SET
+ byte = 0x42;
+ i2c_write(0x49, 0x24, 1, &byte, 1); // HS_POPN_SET
+ byte = 0x00;
+ i2c_write(0x49, 0x25, 1, &byte, 1); // PREDL_CTL
+ byte = 0x00;
+ i2c_write(0x49, 0x26, 1, &byte, 1); // PREDR_CTL
+ byte = 0x00;
+ i2c_write(0x49, 0x27, 1, &byte, 1); // PRECKL_CTL
+ byte = 0x00;
+ i2c_write(0x49, 0x28, 1, &byte, 1); // PRECKR_CTL
+ byte = 0x00;
+ i2c_write(0x49, 0x29, 1, &byte, 1); // HFL_CTL
+ byte = 0x00;
+ i2c_write(0x49, 0x2a, 1, &byte, 1); // HFR_CTL
+ byte = 0x00;
+ i2c_write(0x49, 0x2b, 1, &byte, 1); // ALC_CTL
+ byte = 0x00;
+ i2c_write(0x49, 0x2c, 1, &byte, 1); // ALC_SET1
+ byte = 0x00;
+ i2c_write(0x49, 0x2d, 1, &byte, 1); // ALC_SET2
+ byte = 0x00;
+ i2c_write(0x49, 0x2e, 1, &byte, 1); // BOOST_CTL
+ byte = 0x00;
+ i2c_write(0x49, 0x2f, 1, &byte, 1); // SOFTVOL_CTL
+ byte = 0x00;
+ i2c_write(0x49, 0x30, 1, &byte, 1); // DTMF_FREQSEL
+ byte = 0x00;
+ i2c_write(0x49, 0x31, 1, &byte, 1); // DTMF_TONEXT1H
+ byte = 0x00;
+ i2c_write(0x49, 0x32, 1, &byte, 1); // DTMF_TONEXT1L
+ byte = 0x00;
+ i2c_write(0x49, 0x33, 1, &byte, 1); // DTMF_TONEXT2H
+ byte = 0x00;
+ i2c_write(0x49, 0x34, 1, &byte, 1); // DTMF_TONEXT2L
+ byte = 0x00;
+ i2c_write(0x49, 0x35, 1, &byte, 1); // DTMF_TONOFF
+ byte = 0x00;
+ i2c_write(0x49, 0x36, 1, &byte, 1); // DTMF_WANONOFF
+ byte = 0x00;
+ i2c_write(0x49, 0x37, 1, &byte, 1); // I2S_RX_SCRAMBLE_H
+ byte = 0x00;
+ i2c_write(0x49, 0x38, 1, &byte, 1); // I2S_RX_SCRAMBLE_M
+ byte = 0x00;
+ i2c_write(0x49, 0x39, 1, &byte, 1); // I2S_RX_SCRAMBLE_L
+ byte = 0x15;
+ i2c_write(0x49, 0x3a, 1, &byte, 1); // APLL_CTL
+ byte = 0x00;
+ i2c_write(0x49, 0x3b, 1, &byte, 1); // DTMF_CTL
+ byte = 0x00;
+ i2c_write(0x49, 0x3c, 1, &byte, 1); // DTMF_PGA_CTL2
+ byte = 0x00;
+ i2c_write(0x49, 0x3d, 1, &byte, 1); // DTMF_PGA_CTL1
+ byte = 0x00;
+ i2c_write(0x49, 0x3e, 1, &byte, 1); // MISC_SET_1
+ byte = 0x00;
+ i2c_write(0x49, 0x3f, 1, &byte, 1); // PCMBTMUX
+ byte = 0x00;
+ i2c_write(0x49, 0x40, 1, &byte, 1); // ?
+ byte = 0x00;
+ i2c_write(0x49, 0x41, 1, &byte, 1); // ?
+ byte = 0x00;
+ i2c_write(0x49, 0x42, 1, &byte, 1); // ?
+ byte = 0x00;
+ i2c_write(0x49, 0x43, 1, &byte, 1); // ?
+ byte = 0x00;
+ i2c_write(0x49, 0x44, 1, &byte, 1); // RX_PATH_SEL
+ byte = 0x00;
+ i2c_write(0x49, 0x45, 1, &byte, 1); // VDL_APGA_CTL
+ byte = 0x00;
+ i2c_write(0x49, 0x46, 1, &byte, 1); // VIBRA_CTL
+ byte = 0x00;
+ i2c_write(0x49, 0x47, 1, &byte, 1); // VIBRA_SET
+ byte = 0x00;
+ i2c_write(0x49, 0x48, 1, &byte, 1); // ANAMIC_GAIN
+ byte = 0x00;
+ i2c_write(0x49, 0x49, 1, &byte, 1); // MISC_SET_2
+
+ // check for errors...
+
+ // initialize McBSP2 and fill with data ???
+
+ *((uint *) 0x4902208c) = 0x00000208; // MCBSPLP_SYSCONFIG_REG
+ *((uint *) 0x49022090) = 0x00000000; // MCBSPLP_THRSH2_REG
+ *((uint *) 0x49022094) = 0x00000000; // MCBSPLP_THRSH1_REG
+ *((uint *) 0x490220ac) = 0x00001008; // MCBSPLP_XCCR_REG
+ *((uint *) 0x490220b0) = 0x00000808; // MCBSPLP_RCCR_REG
+ *((uint *) 0x49022018) = 0x00000000; // MCBSPLP_RCR2_REG
+ *((uint *) 0x4902201c) = 0x00000000; // MCBSPLP_RCR1_REG
+ *((uint *) 0x49022020) = 0x00000000; // MCBSPLP_XCR2_REG
+ *((uint *) 0x49022024) = 0x00000000; // MCBSPLP_XCR1_REG
+ *((uint *) 0x49022028) = 0x00000000; // MCBSPLP_SRGR2_REG
+ *((uint *) 0x4902202c) = 0x00000000; // MCBSPLP_SRGR1_REG
+ *((uint *) 0x49022048) = 0x00000083; // MCBSPLP_PCR_REG
+ *((uint *) 0x49022010) = 0x00000200; // MCBSPLP_SPCR2_REG
+ *((uint *) 0x49022014) = 0x00000000; // MCBSPLP_SPCR1_REG
+ *((uint *) 0x4902207c) = 0x00000023; // MCBSPLP_REV_REG (???)
+ *((uint *) 0x49022010) = 0x00000201; // MCBSPLP_SPCR2_REG
+ *((uint *) 0x49022008) = 0x000056f3; // MCBSPLP_DXR_REG
+ printf(" ... complete\n");
+
+ printf("Sending data");
+
+ for (count = 0; count < 50; count++) {
+ int bytes;
+ for (bytes = 0; bytes < sizeof(tone) / 2; bytes++) {
+ *((uint *) 0x49022008) = tone[bytes];
+ udelay(100);
+ }
+ }
+ printf(" ... complete\n");
+
+ return 0;
+}
diff --git a/board/goldelico/gta04/systest.h b/board/goldelico/gta04/systest.h
index 84ac794..b1d85eb 100644
--- a/board/goldelico/gta04/systest.h
+++ b/board/goldelico/gta04/systest.h
@@ -25,5 +25,6 @@
#define _SYSTEST_H
int systest(void);
+int audiotest(void);
#endif