diff options
| author | Steve Sakoman <steve@sakoman.com> | 2010-02-16 10:00:45 -0800 |
|---|---|---|
| committer | Sandeep Paulraj <s-paulraj@ti.com> | 2010-09-08 14:50:27 -0400 |
| commit | 9314961329f07a3d405d6d79fa88ac239857ba00 (patch) | |
| tree | f28f623c1eff139dc62c856a89fced604d715f3c | |
| parent | 5a0a82f42bd6cb67fecaba3e9e08d542090d6a94 (diff) | |
| download | bootable_bootloader_goldelico_gta04-9314961329f07a3d405d6d79fa88ac239857ba00.zip bootable_bootloader_goldelico_gta04-9314961329f07a3d405d6d79fa88ac239857ba00.tar.gz bootable_bootloader_goldelico_gta04-9314961329f07a3d405d6d79fa88ac239857ba00.tar.bz2 | |
ARMV7: OMAP: Enable input driver on Overo's MMC1_CLK and MMC3_CLK pinmux setup
This patch modifies the pinmux setup for MMC1_CLK and MMC3_CLK to enable
the input driver. MMC2_CLK was already properly configured.
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| -rw-r--r-- | board/overo/overo.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/board/overo/overo.h b/board/overo/overo.h index 1873523..fff43da 100644 --- a/board/overo/overo.h +++ b/board/overo/overo.h @@ -200,7 +200,7 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(MCBSP2_DR), (IEN | PTD | DIS | M0)) /*McBSP2_DR*/\ MUX_VAL(CP(MCBSP2_DX), (IDIS | PTD | DIS | M0)) /*McBSP2_DX*/\ /*Expansion card */\ - MUX_VAL(CP(MMC1_CLK), (IDIS | PTU | EN | M0)) /*MMC1_CLK*/\ + MUX_VAL(CP(MMC1_CLK), (IEN | PTU | EN | M0)) /*MMC1_CLK*/\ MUX_VAL(CP(MMC1_CMD), (IEN | PTU | EN | M0)) /*MMC1_CMD*/\ MUX_VAL(CP(MMC1_DAT0), (IEN | PTU | EN | M0)) /*MMC1_DAT0*/\ MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | EN | M0)) /*MMC1_DAT1*/\ @@ -301,7 +301,7 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(SYS_OFF_MODE), (IEN | PTD | DIS | M0)) /*SYS_OFF_MODE*/\ MUX_VAL(CP(SYS_CLKOUT1), (IEN | PTD | DIS | M0)) /*SYS_CLKOUT1*/\ MUX_VAL(CP(SYS_CLKOUT2), (IEN | PTU | EN | M4)) /*GPIO_186*/\ - MUX_VAL(CP(ETK_CLK_ES2), (IDIS | PTU | EN | M2)) /*MMC3_CLK*/\ + MUX_VAL(CP(ETK_CLK_ES2), (IEN | PTU | EN | M2)) /*MMC3_CLK*/\ MUX_VAL(CP(ETK_CTL_ES2), (IEN | PTU | EN | M2)) /*MMC3_CMD*/\ MUX_VAL(CP(ETK_D0_ES2), (IEN | PTU | EN | M4)) /*GPIO_14*/\ MUX_VAL(CP(ETK_D1_ES2), (IEN | PTD | EN | M4)) /*GPIO_15 - X_GATE*/\ |