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author | wdenk <wdenk> | 2003-12-20 22:45:10 +0000 |
---|---|---|
committer | wdenk <wdenk> | 2003-12-20 22:45:10 +0000 |
commit | b2001f273fcb34d0f2ca43a9b01a24e5c50da6cd (patch) | |
tree | dd6dc8e652da48b306248ca77c71312968c52b28 | |
parent | 5c745d2613cddf5d029a163a95584e770496c7e4 (diff) | |
download | bootable_bootloader_goldelico_gta04-b2001f273fcb34d0f2ca43a9b01a24e5c50da6cd.zip bootable_bootloader_goldelico_gta04-b2001f273fcb34d0f2ca43a9b01a24e5c50da6cd.tar.gz bootable_bootloader_goldelico_gta04-b2001f273fcb34d0f2ca43a9b01a24e5c50da6cd.tar.bz2 |
* Fix IceCube CLKIN configuration (it's 33.000000MHz)
* Add new configuration for IceCube board with DDR memory
* Update TRAB memory configurations
-rw-r--r-- | CHANGELOG | 6 | ||||
-rw-r--r-- | Makefile | 18 | ||||
-rw-r--r-- | board/icecube/icecube.c | 54 | ||||
-rw-r--r-- | include/configs/IceCube.h | 19 | ||||
-rw-r--r-- | include/configs/trab.h | 11 |
5 files changed, 100 insertions, 8 deletions
@@ -2,6 +2,12 @@ Changes since U-Boot 1.0.0: ====================================================================== +* Fix IceCube CLKIN configuration (it's 33.000000MHz) + +* Add new configuration for IceCube board with DDR memory + +* Update TRAB memory configurations + * Add JFFS2 support for INCA-IP board * Patch by Bill Hargen, 09 Dec 2003: @@ -204,6 +204,8 @@ cmi_mpc5xx_config: unconfig MPC5200LITE_config \ MPC5200LITE_LOWBOOT_config \ MPC5200LITE_LOWBOOT08_config \ +icecube_5200_DDR_config \ +IceCube_5200_DDR_config \ icecube_5200_config \ IceCube_5200_config \ IceCube_5100_config: unconfig @@ -220,6 +222,10 @@ IceCube_5100_config: unconfig { echo "#define CONFIG_MPC5200" >>include/config.h ; \ echo "... with MPC5200 processor" ; \ } + @[ -z "$(findstring DDR,$@)" ] || \ + { echo "#define CONFIG_MPC5200_DDR" >>include/config.h ; \ + echo "... DDR memory revision" ; \ + } @[ -z "$(findstring 5100,$@)" ] || \ { echo "#define CONFIG_MGT5100" >>include/config.h ; \ echo "... with MGT5100 processor" ; \ @@ -895,23 +901,27 @@ smdk2400_config : unconfig smdk2410_config : unconfig @./mkconfig $(@:_config=) arm arm920t smdk2410 +# TRAB default configuration: 8 MB Flash, 32 MB RAM trab_config \ trab_bigram_config \ trab_bigflash_config \ trab_old_config: unconfig @ >include/config.h @[ -z "$(findstring _bigram,$@)" ] || \ - { echo "#define CONFIG_FLASH_8MB" >>include/config.h ; \ + { echo "#define CONFIG_FLASH_8MB" >>include/config.h ; \ + echo "#define CONFIG_RAM_32MB" >>include/config.h ; \ echo "... with 8 MB Flash, 32 MB RAM" ; \ } @[ -z "$(findstring _bigflash,$@)" ] || \ - { echo "#define CONFIG_RAM_16MB" >>include/config.h ; \ + { echo "#define CONFIG_FLASH_16MB" >>include/config.h ; \ + echo "#define CONFIG_RAM_16MB" >>include/config.h ; \ echo "... with 16 MB Flash, 16 MB RAM" ; \ echo "TEXT_BASE = 0x0CF40000" >board/trab/config.tmp ; \ } @[ -z "$(findstring _old,$@)" ] || \ - { echo "#define CONFIG_OLD_VERSION" >>include/config.h ; \ - echo "... with small memory configuration" ; \ + { echo "#define CONFIG_FLASH_8MB" >>include/config.h ; \ + echo "#define CONFIG_RAM_16MB" >>include/config.h ; \ + echo "... with 8 MB Flash, 16 MB RAM" ; \ echo "TEXT_BASE = 0x0CF40000" >board/trab/config.tmp ; \ } @./mkconfig -a $(call xtract_trab,$@) arm arm920t trab diff --git a/board/icecube/icecube.c b/board/icecube/icecube.c index 1b69d13..e0adec3 100644 --- a/board/icecube/icecube.c +++ b/board/icecube/icecube.c @@ -68,6 +68,24 @@ static void sdram_start (int hi_addr) { long hi_addr_bit = hi_addr ? 0x01000000 : 0; +#ifdef CONFIG_MPC5200_DDR + /* unlock mode register */ + *(vu_long *)MPC5XXX_SDRAM_CTRL = 0xf05f0f00 | hi_addr_bit; + /* precharge all banks */ + *(vu_long *)MPC5XXX_SDRAM_CTRL = 0xf05f0f02 | hi_addr_bit; + /* set mode register: extended mode */ + *(vu_long *)MPC5XXX_SDRAM_MODE = 0x40090000; + /* set mode register: reset DLL */ + *(vu_long *)MPC5XXX_SDRAM_MODE = 0x058d0000; + /* precharge all banks */ + *(vu_long *)MPC5XXX_SDRAM_CTRL = 0xf05f0f02 | hi_addr_bit; + /* auto refresh */ + *(vu_long *)MPC5XXX_SDRAM_CTRL = 0xf05f0f04 | hi_addr_bit; + /* set mode register */ + *(vu_long *)MPC5XXX_SDRAM_MODE = 0x018d0000; + /* normal operation */ + *(vu_long *)MPC5XXX_SDRAM_CTRL = 0x705f0f00 | hi_addr_bit; +#else /* unlock mode register */ *(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd04f0000 | hi_addr_bit; /* precharge all banks */ @@ -86,12 +104,16 @@ static void sdram_start (int hi_addr) *(vu_long *)MPC5XXX_SDRAM_MODE = 0x008d0000; /* normal operation */ *(vu_long *)MPC5XXX_SDRAM_CTRL = 0x504f0000 | hi_addr_bit; +#endif } #endif long int initdram (int board_type) { ulong dramsize = 0; +#ifdef CONFIG_MPC5200_DDR + ulong dramsize2 = 0; +#endif #ifndef CFG_RAMBOOT ulong test1, test2; @@ -100,9 +122,18 @@ long int initdram (int board_type) *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e;/* 2G at 0x0 */ *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x80000000;/* disabled */ +#ifdef CONFIG_MPC5200_DDR + /* setup config registers */ + *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = 0x73722930; + *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = 0x47770000; + + /* set tap delay to 0x10 */ + *(vu_long *)MPC5XXX_CDM_PORCFG = 0x10000000; +#else /* setup config registers */ *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = 0xc2233a00; *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = 0x88b70004; +#endif #elif defined(CONFIG_MGT5100) *(vu_long *)MPC5XXX_SDRAM_START = 0x00000000; @@ -129,7 +160,23 @@ long int initdram (int board_type) #if defined(CONFIG_MPC5200) *(vu_long *)MPC5XXX_SDRAM_CS0CFG = (0x13 + __builtin_ffs(dramsize >> 20) - 1); +#ifdef CONFIG_MPC5200_DDR + *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize + 0x0000001e;/* 2G */ + sdram_start(0); + test1 = dram_size((ulong *)(CFG_SDRAM_BASE + dramsize), 0x80000000); + sdram_start(1); + test2 = dram_size((ulong *)(CFG_SDRAM_BASE + dramsize), 0x80000000); + if (test1 > test2) { + sdram_start(0); + dramsize2 = test1; + } else { + dramsize2 = test2; + } + *(vu_long *)MPC5XXX_SDRAM_CS1CFG = + dramsize + (0x13 + __builtin_ffs(dramsize2 >> 20) - 1); +#else *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize; /* disabled */ +#endif #elif defined(CONFIG_MGT5100) *(vu_long *)MPC5XXX_SDRAM_STOP = ((dramsize - 1) >> 15); #endif @@ -140,8 +187,15 @@ long int initdram (int board_type) dramsize = ((*(vu_long *)MPC5XXX_SDRAM_STOP + 1) << 15); #else dramsize = ((1 << (*(vu_long *)MPC5XXX_SDRAM_CS0CFG - 0x13)) << 20); +#ifdef CONFIG_MPC5200_DDR + dramsize2 = ((1 << (*(vu_long *)MPC5XXX_SDRAM_CS1CFG - 0x13)) << 20); +#endif #endif #endif /* CFG_RAMBOOT */ + +#ifdef CONFIG_MPC5200_DDR + dramsize += dramsize2; +#endif /* return total ram size */ return dramsize; } diff --git a/include/configs/IceCube.h b/include/configs/IceCube.h index f371ba6..2f0a875 100644 --- a/include/configs/IceCube.h +++ b/include/configs/IceCube.h @@ -32,7 +32,7 @@ #define CONFIG_MPC5XXX 1 /* This is an MPC5xxx CPU */ #define CONFIG_ICECUBE 1 /* ... on IceCube board */ -#define CFG_MPC5XXX_CLKIN 33333333 /* ... running at 33MHz */ +#define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */ #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ #define BOOTFLAG_WARM 0x02 /* Software reboot */ @@ -219,7 +219,11 @@ /* * GPIO configuration */ +#ifdef CONFIG_MPC5200_DDR +#define CFG_GPS_PORT_CONFIG 0x90000004 +#else #define CFG_GPS_PORT_CONFIG 0x10000004 +#endif /* * Miscellaneous configurable options @@ -253,12 +257,25 @@ #define CFG_HID0_FINAL 0 #endif +#ifdef CONFIG_MPC5200_DDR + +#define CFG_BOOTCS_START 0xff800000 +#define CFG_BOOTCS_SIZE 0x00800000 +#define CFG_BOOTCS_CFG 0x00047801 +#define CFG_CS1_START 0xff000000 +#define CFG_CS1_SIZE 0x00800000 +#define CFG_CS1_CFG 0x00047800 + +#else /* !CONFIG_MPC5200_DDR */ + #define CFG_BOOTCS_START CFG_FLASH_BASE #define CFG_BOOTCS_SIZE CFG_FLASH_SIZE #define CFG_BOOTCS_CFG 0x00047801 #define CFG_CS0_START CFG_FLASH_BASE #define CFG_CS0_SIZE CFG_FLASH_SIZE +#endif /* CONFIG_MPC5200_DDR */ + #define CFG_CS_BURST 0x00000000 #define CFG_CS_DEADCYCLE 0x33333333 diff --git a/include/configs/trab.h b/include/configs/trab.h index 95ee37e..e9ba90f 100644 --- a/include/configs/trab.h +++ b/include/configs/trab.h @@ -26,10 +26,15 @@ #ifndef __CONFIG_H #define __CONFIG_H -#ifdef CONFIG_OLD_VERSION /* Old configuration: */ -#define CONFIG_RAM_16MB /* 16 MB SDRAM */ +/* + * Default configuration is with 8 MB Flash, 32 MB RAM + */ +#if (!defined(CONFIG_FLASH_8MB)) && (!defined(CONFIG_FLASH_16MB)) +# define CONFIG_FLASH_8MB /* 8 MB Flash */ +#endif +#if (!defined(CONFIG_RAM_16MB)) && (!defined(CONFIG_RAM_32MB)) +# define CONFIG_RAM_32MB /* 32 MB SDRAM */ #endif -#define CONFIG_FLASH_8MB /* 8 MB Flash */ /* * If we are developing, we might want to start armboot from ram |