summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorJuergen Kilb <J.Kilb@gmx.de>2008-06-08 17:59:53 +0200
committerWolfgang Denk <wd@denx.de>2008-07-01 20:54:04 +0200
commitd92ea21bafb674ee2bf27447970b047845e7b0a2 (patch)
treedd568faaa5210b88f7ed9d01c4bbd232e3ddb5e2
parentb571afde0295b007a45055ee49f8822c753a5651 (diff)
downloadbootable_bootloader_goldelico_gta04-d92ea21bafb674ee2bf27447970b047845e7b0a2.zip
bootable_bootloader_goldelico_gta04-d92ea21bafb674ee2bf27447970b047845e7b0a2.tar.gz
bootable_bootloader_goldelico_gta04-d92ea21bafb674ee2bf27447970b047845e7b0a2.tar.bz2
i.MX31: fixed CTRL-C detection
The Register URXD contains status information in bits [15..8]. With status bit 15 set, CTRL-C was reported as 0x8003 instead of 0x03. Therefore CTRL-C was not detected. To solve this, bits [15..8] were masked out now. Signed-off-by: Juergen Kilb <J.Kilb@gmx.de> Acked-by: Felix Radensky <felix@embedded-sol.com>
-rw-r--r--cpu/arm1136/mx31/serial.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/cpu/arm1136/mx31/serial.c b/cpu/arm1136/mx31/serial.c
index 1cad8f9..f498599 100644
--- a/cpu/arm1136/mx31/serial.c
+++ b/cpu/arm1136/mx31/serial.c
@@ -63,6 +63,7 @@
#define URXD_FRMERR (1<<12)
#define URXD_BRK (1<<11)
#define URXD_PRERR (1<<10)
+#define URXD_RX_DATA (0xFF)
#define UCR1_ADEN (1<<15) /* Auto dectect interrupt */
#define UCR1_ADBR (1<<14) /* Auto detect baud rate */
#define UCR1_TRDYEN (1<<13) /* Transmitter ready interrupt enable */
@@ -165,7 +166,7 @@ void serial_setbrg (void)
int serial_getc (void)
{
while (__REG(UART_PHYS + UTS) & UTS_RXEMPTY);
- return __REG(UART_PHYS + URXD);
+ return (__REG(UART_PHYS + URXD) & URXD_RX_DATA); /* mask out status from upper word */
}
void serial_putc (const char c)