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author | wdenk <wdenk> | 2000-12-14 10:04:19 +0000 |
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committer | wdenk <wdenk> | 2000-12-14 10:04:19 +0000 |
commit | 2d39b71fb247a6462515be5ad7b167df740362d4 (patch) | |
tree | 7d5df8b28e77680b66f2365e1240efe614e2286a /board/cogent | |
parent | 10af385938b938bb33ced12cc988c8277fe7e925 (diff) | |
download | bootable_bootloader_goldelico_gta04-2d39b71fb247a6462515be5ad7b167df740362d4.zip bootable_bootloader_goldelico_gta04-2d39b71fb247a6462515be5ad7b167df740362d4.tar.gz bootable_bootloader_goldelico_gta04-2d39b71fb247a6462515be5ad7b167df740362d4.tar.bz2 |
Initial revision
Diffstat (limited to 'board/cogent')
-rw-r--r-- | board/cogent/Makefile | 47 | ||||
-rw-r--r-- | board/cogent/README.cma286 | 69 | ||||
-rw-r--r-- | board/cogent/config.mk | 31 | ||||
-rw-r--r-- | board/cogent/dipsw.h | 3 | ||||
-rw-r--r-- | board/cogent/kbm.c | 3 | ||||
-rw-r--r-- | board/cogent/kbm.h | 79 | ||||
-rw-r--r-- | board/cogent/par.c | 3 | ||||
-rw-r--r-- | board/cogent/par.h | 3 | ||||
-rw-r--r-- | board/cogent/pci.c | 3 | ||||
-rw-r--r-- | board/cogent/pci.h | 3 | ||||
-rw-r--r-- | board/cogent/rtc.c | 3 | ||||
-rw-r--r-- | board/cogent/rtc.h | 3 | ||||
-rw-r--r-- | board/cogent/serial.h | 15 |
13 files changed, 265 insertions, 0 deletions
diff --git a/board/cogent/Makefile b/board/cogent/Makefile new file mode 100644 index 0000000..0cf6411 --- /dev/null +++ b/board/cogent/Makefile @@ -0,0 +1,47 @@ +# +# (C) Copyright 2000 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = lib$(BOARD).a + +OBJS := mb.o flash.o dipsw.o lcd.o serial.o # pci.o rtc.o par.o kbm.o +SOBJS := + +$(LIB): $(OBJS) + $(AR) crv $@ $^ + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) + $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ + +-include .depend + +######################################################################### diff --git a/board/cogent/README.cma286 b/board/cogent/README.cma286 new file mode 100644 index 0000000..aeebc85 --- /dev/null +++ b/board/cogent/README.cma286 @@ -0,0 +1,69 @@ +CPU module revisions +-------------------- + +My cpu module has the model number "CMA286-60-990526-01". My motherboard +has the model number "CMA102-32M-990526-01". These are both fairly old, +and may not reflect current design. In particular, I can see from the +Cogent web site that the CMA286 has been significantly redesigned - it +now has on board RAM (4M), ethernet 10baseT PHY (on SCC2), 2 serial ports +(SMC1 and SMC2), and 48pin DIN for the FEC (if present i.e. MPC860T), and +also the EPROM is 512K. + +My CMA286-60 has none of this, and only 128K EPROM. In addition, the CPU +clock is listed as 66MHz, whereas mine is 33.333MHz. + +Clocks +------ + +Quote from my "CMA286 MPC860/821 User's Manual": + +"When setting up the Periodic Interrupt Timer (PIT), be aware that the +CMA286 places the MPC860/821 in PLL X1 Mode. This means that we feed +a 25MHz clock directly into the MPC860/821. This mode sets the divisor +for the PIT to be 512. In addition, the Time Base Register (TMB) +divisor is set to 16." + +I interpreted this information to mean that EXTCLK is 25MHz and that at +power on reset, MODCK1=1 and MODCK2=0, which selects EXTCLK as the +source for OSCCLK and PITRTCLK, sets RTDIV to 512 and sets MF (the +multiplication factor) to 1 (I assume this is what they mean by X1 +mode above). MF=1 means the cpus internal clock runs at the same +rate as EXTCLK i.e. 25MHz. + +Furthermore, since SCCR[TBS] (the Time Base Source selector bit in the +System Clock and Reset Control register) is set in the cpu initialisation +code, the TMBCLK source is forced to be GCLK2 and the TMBCLK prescale is +forced to be 16. This results in TMBCLK=1562500. + +One problem - since PITRTCLK source is EXTCLK (25Mhz) and RTDIV is 512, +PITRTCLK will be 48828.125 (huh?). Another quote from the MPC860 Users +Manual: + +"When used by the real-time clock (RTC), the PITRTCLK source is first +divided as determined by RTDIV, and then divided in the RTC circuits by +either 8192 or 9600. Therefore, in order for the RTC to count in +seconds, the clock source must satisfy: + + (EXTCLK or OSCM) / [(4 or 512) x (8192 or 9600)] = 1 + +The RTC will operate with other frequencies, but it will not count in +units of seconds." + +Therefore, the internal RTC of the MPC860 is not going to count in +seconds, so we must use the motherboard RTC (if we need a RTC). + +I presume this means that they do not provide a fixed oscillator for +OSCM. The code in get_gclk_freq() assumes PITRTCLK source is OSCM, +RTDIV is 4, and that OSCM/4 is 8192 (i.e. a ~32KHz oscillator). Since +the CMA286-60 doesn't have this (at least mine doesn't) we can't use +the code in get_gclk_freq(). + +Finally, it appears that the internal clock in my CMA286-60 is actually +33.333MHz. Which makes TMBCLK=2083312.5 (another huh?) and +PITRTCLK=65103.515625 (bloody hell!). + +If anyone finds anything wrong with the stuff above, I would appreciate +an email about it. + +Murray Jensen <Murray.Jensen@cmst.csiro.au> +21-Aug-00 diff --git a/board/cogent/config.mk b/board/cogent/config.mk new file mode 100644 index 0000000..ee77939 --- /dev/null +++ b/board/cogent/config.mk @@ -0,0 +1,31 @@ +# +# (C) Copyright 2000 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# +# Cogent Modular Architecture +# + +# Boot EPROM location +TEXT_BASE = 0xfff00000 + +PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR) diff --git a/board/cogent/dipsw.h b/board/cogent/dipsw.h new file mode 100644 index 0000000..4f52fd4 --- /dev/null +++ b/board/cogent/dipsw.h @@ -0,0 +1,3 @@ +extern unsigned char dipsw_raw(void); +extern unsigned char dipsw_cooked(void); +extern void dipsw_init(void); diff --git a/board/cogent/kbm.c b/board/cogent/kbm.c new file mode 100644 index 0000000..8496402 --- /dev/null +++ b/board/cogent/kbm.c @@ -0,0 +1,3 @@ +/* keyboard/mouse not implemented yet */ + +int cma_kbm_not_implemented = 1; diff --git a/board/cogent/kbm.h b/board/cogent/kbm.h new file mode 100644 index 0000000..7eb419c --- /dev/null +++ b/board/cogent/kbm.h @@ -0,0 +1,79 @@ +/* keyboard/mouse not implemented yet */ + +extern int cma_kbm_not_implemented; + +/**************** DEFINES for H8542B Keyboard/Mouse Controller ***************/ + +/* + * note the auxillary port is used to control the mouse + */ + +/* 8542B Commands (Sent to the Command Port) */ +#define HT8542_CMD_SET_BYTE 0x60 /* Set the command byte */ +#define HT8542_CMD_GET_BYTE 0x20 /* Get the command byte */ +#define HT8542_CMD_KBD_OBUFF 0xD2 /* Write to HT8542 Kbd Output Buffer */ +#define HT8542_CMD_AUX_OBUFF 0xD3 /* Write to HT8542 Mse Output Buffer */ +#define HT8542_CMD_AUX_WRITE 0xD4 /* Write to Mouse Port */ +#define HT8542_CMD_AUX_OFF 0xA7 /* Disable Mouse Port */ +#define HT8542_CMD_AUX_ON 0xA8 /* Re-Enable Mouse Port */ +#define HT8542_CMD_AUX_TEST 0xA9 /* Test for the presence of a Mouse */ +#define HT8542_CMD_DIAG 0xAA /* Start Diagnostics */ +#define HT8542_CMD_KBD_TEST 0xAB /* Test for presence of a keyboard */ +#define HT8542_CMD_KBD_OFF 0xAD /* Disable Kbd Port (use KBD_DAT_ON) */ +#define HT8542_CMD_KBD_ON 0xAE /* Enable Kbd Port (use KBD_DAT_OFF) */ + +/* HT8542B cmd byte set by KBD_CMD_SET_BYTE and retrieved by KBD_CMD_GET_BYTE */ +#define HT8542_CMD_BYTE_TRANS 0x40 +#define HT8542_CMD_BYTE_AUX_OFF 0x20 /* 1 = mse port disabled, 0 = enabled */ +#define HT8542_CMD_BYTE_KBD_OFF 0x10 /* 1 = kbd port disabled, 0 = enabled */ +#define HT8542_CMD_BYTE_OVER 0x08 /* 1 = override keyboard lock */ +#define HT8542_CMD_BYTE_RES 0x04 /* reserved */ +#define HT8542_CMD_BYTE_AUX_INT 0x02 /* 1 = enable mouse interrupt */ +#define HT8542_CMD_BYTE_KBD_INT 0x01 /* 1 = enable keyboard interrupt */ + +/* Keyboard Commands (Sent to the Data Port) */ +#define KBD_CMD_LED 0xED /* Set Keyboard LEDS with next byte */ +#define KBD_CMD_ECHO 0xEE /* Echo - we get 0xFA, 0xEE back */ +#define KBD_CMD_MODE 0xF0 /* set scan code mode with next byte */ +#define KBD_CMD_ID 0xF2 /* get keyboard/mouse ID */ +#define KBD_CMD_RPT 0xF3 /* Set Repeat Rate and Delay 2nd Byte */ +#define KBD_CMD_ON 0xF4 /* Enable keyboard */ +#define KBD_CMD_OFF 0xF5 /* Disables Scanning, Resets to Def */ +#define KBD_CMD_DEF 0xF6 /* Reverts kbd to default settings */ +#define KBD_CMD_RST 0xFF /* Reset - should get 0xFA, 0xAA back */ + +/* Set LED second bit defines */ +#define KBD_CMD_LED_SCROLL 0x01 /* Set SCROLL LOCK LED on */ +#define KBD_CMD_LED_NUM 0x02 /* Set NUM LOCK LED on */ +#define KBD_CMD_LED_CAPS 0x04 /* Set CAPS LOCK LED on */ + +/* Set Mode second byte defines */ +#define KBD_CMD_MODE_STAT 0x00 /* get current scan code mode */ +#define KBD_CMD_MODE_SCAN1 0x01 /* set mode to scan code 1 */ +#define KBD_CMD_MODE_SCAN2 0x02 /* set mode to scan code 2 */ +#define KBD_CMD_MODE_SCAN3 0x03 /* set mode to scan code 3 */ + +/* Keyboard/Mouse ID Codes */ +#define KBD_CMD_ID_1ST 0xAB /* 1st byte is 0xAB, 2nd is actual ID */ +#define KBD_CMD_ID_KBD 0x83 /* Keyboard */ +#define KBD_CMD_ID_MOUSE 0x00 /* Mouse */ + +/* Keyboard Data Return Defines */ +#define KBD_STAT_OVER 0x00 /* Buffer Overrun */ +#define KBD_STAT_DIAG_OK 0x55 /* Internal Self Test OK */ +#define KBD_STAT_RST_OK 0xAA /* Reset Complete */ +#define KBD_STAT_ECHO 0xEE /* Echo Command Return */ +#define KBD_STAT_BRK 0xF0 /* Prefix for Break Key Code */ +#define KBD_STAT_ACK 0xFA /* Received after all commands */ +#define KBD_STAT_DIAG_FAIL 0xFD /* Internal Self Test Failed */ +#define KBD_STAT_RESEND 0xFE /* Resend Last Command */ + +/* HT8542B Status Register Bit Defines */ +#define HT8542_STAT_OBF 0x01 /* 1 = output buffer is full */ +#define HT8542_STAT_IBF 0x02 /* 1 = input buffer is full */ +#define HT8542_STAT_SYS 0x04 /* system flag - unused */ +#define HT8542_STAT_CMD 0x08 /* 1 = cmd in input buffer, 0 = data */ +#define HT8542_STAT_INH 0x10 /* 1 = Inhibit - unused */ +#define HT8542_STAT_TX 0x20 /* 1 = Transmit Timeout has occured */ +#define HT8542_STAT_RX 0x40 /* 1 = Receive Timeout has occured */ +#define HT8542_STAT_PERR 0x80 /* 1 = Parity Error from Keyboard */ diff --git a/board/cogent/par.c b/board/cogent/par.c new file mode 100644 index 0000000..a03c0f1 --- /dev/null +++ b/board/cogent/par.c @@ -0,0 +1,3 @@ +/* parallel not implemented yet */ + +int cma_parallel_not_implemented = 1; diff --git a/board/cogent/par.h b/board/cogent/par.h new file mode 100644 index 0000000..664ae4a --- /dev/null +++ b/board/cogent/par.h @@ -0,0 +1,3 @@ +/* parallel not implemented yet */ + +extern int cma_parallel_not_implemented; diff --git a/board/cogent/pci.c b/board/cogent/pci.c new file mode 100644 index 0000000..0a57c0c --- /dev/null +++ b/board/cogent/pci.c @@ -0,0 +1,3 @@ +/* pci not implemented yet */ + +int cma_pci_not_implemented = 1; diff --git a/board/cogent/pci.h b/board/cogent/pci.h new file mode 100644 index 0000000..35aa354 --- /dev/null +++ b/board/cogent/pci.h @@ -0,0 +1,3 @@ +/* pci not implemented yet */ + +extern int cma_pci_not_implemented; diff --git a/board/cogent/rtc.c b/board/cogent/rtc.c new file mode 100644 index 0000000..ace9193 --- /dev/null +++ b/board/cogent/rtc.c @@ -0,0 +1,3 @@ +/* rtc not implemented yet */ + +int cma_rtc_not_implemented = 1; diff --git a/board/cogent/rtc.h b/board/cogent/rtc.h new file mode 100644 index 0000000..4b55bd2 --- /dev/null +++ b/board/cogent/rtc.h @@ -0,0 +1,3 @@ +/* rtc not implemented yet */ + +extern int cma_rtc_not_implemented; diff --git a/board/cogent/serial.h b/board/cogent/serial.h new file mode 100644 index 0000000..89962d8 --- /dev/null +++ b/board/cogent/serial.h @@ -0,0 +1,15 @@ +/* Line Status Register bits */ +#define LSR_DR 0x01 /* Data ready */ +#define LSR_OE 0x02 /* Overrun */ +#define LSR_PE 0x04 /* Parity error */ +#define LSR_FE 0x08 /* Framing error */ +#define LSR_BI 0x10 /* Break */ +#define LSR_THRE 0x20 /* Xmit holding register empty */ +#define LSR_TEMT 0x40 /* Xmitter empty */ +#define LSR_ERR 0x80 /* Error */ + +#define CLKRATE 3686400 /* cogent motherboard serial clk = 3.6864MHz */ +#define DEFDIV 1 /* default to 230400 bps */ + +#define br_to_div(br) (CLKRATE / (16 * (br))) +#define div_to_br(div) (CLKRATE / (16 * (div))) |