* Add support for SK98xx driver

* Add PCI support for SL8245 board

* Support IceCube board configurations with 1 x AMD AM29LV065 (8 MB)
  or 1 x AM29LV652 (two LV065 in one chip = 16 MB);
  Run IPB at 133 Mhz; adjust the MII clock frequency accordingly

* Set BRG_CLK on PM825/826 to 64MHz (VCO_OUT / 4, instead of 16  MHz)
  to allow for more accurate baudrate settings
  (error now 0.7% at 115 kbps, instead of 3.5% before)

* Patch by Andreas Mohr, 4 Sep 2003:
  Fix a lot of spelling errors

2 files changed, 29 insertions, 8 deletions

diff --git a/board/icecube/flash.c b/board/icecube/flash.c
index 9164bd9..07879ff 100644
--- a/board/icecube/flash.c
+++ b/board/icecube/flash.c
@@ -64,24 +64,20 @@ unsigned long flash_init (void)
 	unsigned long size = 0;
 	int i;
 	extern void flash_preinit(void);
+	extern void flash_afterinit(ulong);
+	ulong flashbase = CFG_FLASH_BASE;
 
 	flash_preinit();
 
 	/* Init: no FLASHes known */
 	for (i=0; i < CFG_MAX_FLASH_BANKS; ++i) {
-		ulong flashbase = CFG_FLASH_BASE;
-
 		memset(&flash_info[i], 0, sizeof(flash_info_t));
 
 		flash_info[i].size =
 			flash_get_size((FPW *)flashbase, &flash_info[i]);
 
-		if (flash_info[i].flash_id == FLASH_UNKNOWN) {
-			printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx\n",
-			i, flash_info[i].size);
-		}
-
 		size += flash_info[i].size;
+		flashbase += 0x800000;
 	}
 #if CFG_MONITOR_BASE >= CFG_FLASH_BASE
 	/* monitor protection ON by default */
@@ -100,6 +96,7 @@ unsigned long flash_init (void)
 #endif
 
 
+	flash_afterinit(size);
 	return size ? size : 1;
 }
 
@@ -126,7 +123,8 @@ static flash_info_t *flash_get_info(ulong base)
 
 	for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
 		info = & flash_info[i];
-		if (info->start[0] <= base && base <= info->start[0] + info->size - 1)
+		if (info->size && 
+			info->start[0] <= base && base <= info->start[0] + info->size - 1)
 			break;
 	}
 
@@ -211,6 +209,8 @@ void flash_print_info (flash_info_t *info)
 ulong flash_get_size (FPWV *addr, flash_info_t *info)
 {
 	int i;
+	FPWV* addr2;
+
 	/* Write auto select command: read Manufacturer ID */
 	/* Write auto select command sequence and test FLASH answer */
 	addr[FLASH_CYCLE1] = (FPW)0x00AA00AA;	/* for AMD, Intel ignores this */
@@ -256,6 +256,17 @@ ulong flash_get_size (FPWV *addr, flash_info_t *info)
 		return (0);			/* => no or unknown flash */
 	}
 
+	/* test for real flash at bank 1 */
+	addr2 = (FPW *)((ulong)addr | 0x800000);
+	if (addr2 != addr &&
+		((addr2[0] & 0xff) == (addr[0] & 0xff)) && ((FPW)addr2[1] == (FPW)addr[1])) {
+		/* Seems 2 banks are the same space (8Mb chip is installed, 
+		 * J24 in default position (CS0)). Disable this (first) bank.
+		 */
+		info->flash_id = FLASH_UNKNOWN;
+		info->sector_count = 0;
+		info->size = 0;
+	}
 	/* Put FLASH back in read mode */
 	flash_reset(info);
 
diff --git a/board/icecube/icecube.c b/board/icecube/icecube.c
index f75e675..965ca6b 100644
--- a/board/icecube/icecube.c
+++ b/board/icecube/icecube.c
@@ -171,6 +171,16 @@ void flash_preinit(void)
 	*(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
 }
 
+void flash_afterinit(ulong size)
+{
+	if (size == 0x800000) { /* adjust mapping */
+		*(vu_long *)MPC5XXX_BOOTCS_START = *(vu_long *)MPC5XXX_CS0_START = 
+			START_REG(CFG_BOOTCS_START | size);
+		*(vu_long *)MPC5XXX_BOOTCS_STOP = *(vu_long *)MPC5XXX_CS0_STOP = 
+			STOP_REG(CFG_BOOTCS_START | size, size);
+	}
+}
+
 #ifdef	CONFIG_PCI
 static struct pci_controller hose;