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author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-10-16 15:01:15 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:54:03 +0200 |
commit | 6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch) | |
tree | ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /board/keymile | |
parent | 71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff) | |
download | bootable_bootloader_goldelico_gta04-6d0f6bcf337c5261c08fabe12982178c2c489d76.zip bootable_bootloader_goldelico_gta04-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.gz bootable_bootloader_goldelico_gta04-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.bz2 |
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'board/keymile')
-rw-r--r-- | board/keymile/common/common.c | 44 | ||||
-rw-r--r-- | board/keymile/mgcoge/mgcoge.c | 30 | ||||
-rw-r--r-- | board/keymile/mgsuvd/mgsuvd.c | 16 |
3 files changed, 45 insertions, 45 deletions
diff --git a/board/keymile/common/common.c b/board/keymile/common/common.c index 18982cd..61276d2 100644 --- a/board/keymile/common/common.c +++ b/board/keymile/common/common.c @@ -196,9 +196,9 @@ static int ivm_check_crc (unsigned char *buf, int block) unsigned long crc; unsigned long crceeprom; - crc = ivm_calc_crc (buf, CFG_IVM_EEPROM_PAGE_LEN - 2); - crceeprom = (buf[CFG_IVM_EEPROM_PAGE_LEN - 1] + \ - buf[CFG_IVM_EEPROM_PAGE_LEN - 2] * 256); + crc = ivm_calc_crc (buf, CONFIG_SYS_IVM_EEPROM_PAGE_LEN - 2); + crceeprom = (buf[CONFIG_SYS_IVM_EEPROM_PAGE_LEN - 1] + \ + buf[CONFIG_SYS_IVM_EEPROM_PAGE_LEN - 2] * 256); if (crc != crceeprom) { printf ("Error CRC Block: %d EEprom: calculated: %lx EEprom: %lx\n", block, crc, crceeprom); @@ -209,7 +209,7 @@ static int ivm_check_crc (unsigned char *buf, int block) static int ivm_analyze_block2 (unsigned char *buf, int len) { - unsigned char valbuf[CFG_IVM_EEPROM_PAGE_LEN]; + unsigned char valbuf[CONFIG_SYS_IVM_EEPROM_PAGE_LEN]; unsigned long count; /* IVM_MacAddress */ @@ -238,21 +238,21 @@ static int ivm_analyze_block2 (unsigned char *buf, int len) int ivm_analyze_eeprom (unsigned char *buf, int len) { unsigned short val; - unsigned char valbuf[CFG_IVM_EEPROM_PAGE_LEN]; + unsigned char valbuf[CONFIG_SYS_IVM_EEPROM_PAGE_LEN]; unsigned char *tmp; if (ivm_check_crc (buf, 0) != 0) return -1; - ivm_get_value (buf, CFG_IVM_EEPROM_PAGE_LEN, "IVM_BoardId", 0, 1); - val = ivm_get_value (buf, CFG_IVM_EEPROM_PAGE_LEN, "IVM_HWKey", 6, 1); + ivm_get_value (buf, CONFIG_SYS_IVM_EEPROM_PAGE_LEN, "IVM_BoardId", 0, 1); + val = ivm_get_value (buf, CONFIG_SYS_IVM_EEPROM_PAGE_LEN, "IVM_HWKey", 6, 1); if (val != 0xffff) { sprintf ((char *)valbuf, "%x", ((val /100) % 10)); ivm_set_value ("IVM_HWVariant", (char *)valbuf); sprintf ((char *)valbuf, "%x", (val % 100)); ivm_set_value ("IVM_HWVersion", (char *)valbuf); } - ivm_get_value (buf, CFG_IVM_EEPROM_PAGE_LEN, "IVM_Functions", 12, 0); + ivm_get_value (buf, CONFIG_SYS_IVM_EEPROM_PAGE_LEN, "IVM_Functions", 12, 0); GET_STRING("IVM_Symbol", IVM_POS_SYMBOL_ONLY, 8) GET_STRING("IVM_DeviceName", IVM_POS_SHORT_TEXT, 64) @@ -283,9 +283,9 @@ int ivm_analyze_eeprom (unsigned char *buf, int len) GET_STRING("IVM_CustomerID", IVM_POS_CUSTOMER_ID, 32) GET_STRING("IVM_CustomerProductID", IVM_POS_CUSTOMER_PROD_ID, 32) - if (ivm_check_crc (&buf[CFG_IVM_EEPROM_PAGE_LEN * 2], 2) != 0) + if (ivm_check_crc (&buf[CONFIG_SYS_IVM_EEPROM_PAGE_LEN * 2], 2) != 0) return -2; - ivm_analyze_block2 (&buf[CFG_IVM_EEPROM_PAGE_LEN * 2], CFG_IVM_EEPROM_PAGE_LEN); + ivm_analyze_block2 (&buf[CONFIG_SYS_IVM_EEPROM_PAGE_LEN * 2], CONFIG_SYS_IVM_EEPROM_PAGE_LEN); return 0; } @@ -293,13 +293,13 @@ int ivm_analyze_eeprom (unsigned char *buf, int len) int ivm_read_eeprom (void) { I2C_MUX_DEVICE *dev = NULL; - uchar i2c_buffer[CFG_IVM_EEPROM_MAX_LEN]; + uchar i2c_buffer[CONFIG_SYS_IVM_EEPROM_MAX_LEN]; uchar *buf; - unsigned dev_addr = CFG_IVM_EEPROM_ADR; + unsigned dev_addr = CONFIG_SYS_IVM_EEPROM_ADR; /* First init the Bus, select the Bus */ -#if defined(CFG_I2C_IVM_BUS) - dev = i2c_mux_ident_muxstring ((uchar *)CFG_I2C_IVM_BUS); +#if defined(CONFIG_SYS_I2C_IVM_BUS) + dev = i2c_mux_ident_muxstring ((uchar *)CONFIG_SYS_I2C_IVM_BUS); #else buf = (unsigned char *) getenv ("EEprom_ivm"); if (buf != NULL) @@ -315,24 +315,24 @@ int ivm_read_eeprom (void) if (buf != NULL) dev_addr = simple_strtoul ((char *)buf, NULL, 16); - if (eeprom_read (dev_addr, 0, i2c_buffer, CFG_IVM_EEPROM_MAX_LEN) != 0) { + if (eeprom_read (dev_addr, 0, i2c_buffer, CONFIG_SYS_IVM_EEPROM_MAX_LEN) != 0) { printf ("Error reading EEprom\n"); return -2; } - return ivm_analyze_eeprom (i2c_buffer, CFG_IVM_EEPROM_MAX_LEN); + return ivm_analyze_eeprom (i2c_buffer, CONFIG_SYS_IVM_EEPROM_MAX_LEN); } -#if defined(CFG_I2C_INIT_BOARD) +#if defined(CONFIG_SYS_I2C_INIT_BOARD) #define DELAY_ABORT_SEQ 62 -#define DELAY_HALF_PERIOD (500 / (CFG_I2C_SPEED / 1000)) +#define DELAY_HALF_PERIOD (500 / (CONFIG_SYS_I2C_SPEED / 1000)) #if defined(CONFIG_MGCOGE) #define SDA_MASK 0x00010000 #define SCL_MASK 0x00020000 static void set_pin (int state, unsigned long mask) { - volatile ioport_t *iop = ioport_addr ((immap_t *)CFG_IMMR, 3); + volatile ioport_t *iop = ioport_addr ((immap_t *)CONFIG_SYS_IMMR, 3); if (state) iop->pdat |= (mask); @@ -344,7 +344,7 @@ static void set_pin (int state, unsigned long mask) static int get_pin (unsigned long mask) { - volatile ioport_t *iop = ioport_addr ((immap_t *)CFG_IMMR, 3); + volatile ioport_t *iop = ioport_addr ((immap_t *)CONFIG_SYS_IMMR, 3); iop->pdir &= ~(mask); return (0 != (iop->pdat & (mask))); @@ -373,7 +373,7 @@ static int get_scl (void) #if defined(CONFIG_HARD_I2C) static void setports (int gpio) { - volatile ioport_t *iop = ioport_addr ((immap_t *)CFG_IMMR, 3); + volatile ioport_t *iop = ioport_addr ((immap_t *)CONFIG_SYS_IMMR, 3); if (gpio) { iop->ppar &= ~(SDA_MASK | SCL_MASK); @@ -474,7 +474,7 @@ static int i2c_make_abort (void) void i2c_init_board(void) { #if defined(CONFIG_HARD_I2C) - volatile immap_t *immap = (immap_t *)CFG_IMMR ; + volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR ; volatile i2c8260_t *i2c = (i2c8260_t *)&immap->im_i2c; /* disable I2C controller first, otherwhise it thinks we want to */ diff --git a/board/keymile/mgcoge/mgcoge.c b/board/keymile/mgcoge/mgcoge.c index 31703ab..7d4d9e6 100644 --- a/board/keymile/mgcoge/mgcoge.c +++ b/board/keymile/mgcoge/mgcoge.c @@ -238,7 +238,7 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr, * accessing the SDRAM with a single-byte transaction." * * The appropriate BRx/ORx registers have already been set when we - * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE. + * get here. The SDRAM can be accessed at the address CONFIG_SYS_SDRAM_BASE. */ *sdmr_ptr = sdmr | PSDMR_OP_PREA; @@ -249,7 +249,7 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr, *base = c; *sdmr_ptr = sdmr | PSDMR_OP_MRW; - *(base + CFG_MRS_OFFS) = c; /* setting MR on address lines */ + *(base + CONFIG_SYS_MRS_OFFS) = c; /* setting MR on address lines */ *sdmr_ptr = sdmr | PSDMR_OP_NORM | PSDMR_RFEN; *base = c; @@ -262,20 +262,20 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr, phys_size_t initdram (int board_type) { - volatile immap_t *immap = (immap_t *) CFG_IMMR; + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; volatile memctl8260_t *memctl = &immap->im_memctl; long psize; - memctl->memc_psrt = CFG_PSRT; - memctl->memc_mptpr = CFG_MPTPR; + memctl->memc_psrt = CONFIG_SYS_PSRT; + memctl->memc_mptpr = CONFIG_SYS_MPTPR; -#ifndef CFG_RAMBOOT +#ifndef CONFIG_SYS_RAMBOOT /* 60x SDRAM setup: */ - psize = try_init (memctl, CFG_PSDMR, CFG_OR1, - (uchar *) CFG_SDRAM_BASE); -#endif /* CFG_RAMBOOT */ + psize = try_init (memctl, CONFIG_SYS_PSDMR, CONFIG_SYS_OR1, + (uchar *) CONFIG_SYS_SDRAM_BASE); +#endif /* CONFIG_SYS_RAMBOOT */ icache_enable (); @@ -295,8 +295,8 @@ int checkboard(void) int board_early_init_r (void) { /* setup the UPIOx */ - *(char *)(CFG_PIGGY_BASE + 0x02) = 0xc0; - *(char *)(CFG_PIGGY_BASE + 0x03) = 0x15; + *(char *)(CONFIG_SYS_PIGGY_BASE + 0x02) = 0xc0; + *(char *)(CONFIG_SYS_PIGGY_BASE + 0x03) = 0x15; return 0; } @@ -332,12 +332,12 @@ void ft_blob_update (void *blob, bd_t *bd) "err:%s\n", fdt_strerror (nodeoffset)); } /* update Flash addr, size */ - flash_data[2] = cpu_to_be32 (CFG_FLASH_BASE); - flash_data[3] = cpu_to_be32 (CFG_FLASH_SIZE); + flash_data[2] = cpu_to_be32 (CONFIG_SYS_FLASH_BASE); + flash_data[3] = cpu_to_be32 (CONFIG_SYS_FLASH_SIZE); flash_data[4] = cpu_to_be32 (1); flash_data[5] = cpu_to_be32 (0); - flash_data[6] = cpu_to_be32 (CFG_FLASH_BASE_1); - flash_data[7] = cpu_to_be32 (CFG_FLASH_SIZE_1); + flash_data[6] = cpu_to_be32 (CONFIG_SYS_FLASH_BASE_1); + flash_data[7] = cpu_to_be32 (CONFIG_SYS_FLASH_SIZE_1); nodeoffset = fdt_path_offset (blob, "/localbus"); if (nodeoffset >= 0) { ret = fdt_setprop (blob, nodeoffset, "ranges", flash_data, diff --git a/board/keymile/mgsuvd/mgsuvd.c b/board/keymile/mgsuvd/mgsuvd.c index ecc8d75..912e177 100644 --- a/board/keymile/mgsuvd/mgsuvd.c +++ b/board/keymile/mgsuvd/mgsuvd.c @@ -70,7 +70,7 @@ int checkboard (void) phys_size_t initdram (int board_type) { - volatile immap_t *immap = (immap_t *) CFG_IMMR; + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; long int size; @@ -83,7 +83,7 @@ phys_size_t initdram (int board_type) * with two SDRAM banks or four cycles every 31.2 us with one * bank. It will be adjusted after memory sizing. */ - memctl->memc_mptpr = CFG_MPTPR; + memctl->memc_mptpr = CONFIG_SYS_MPTPR; /* * The following value is used as an address (i.e. opcode) for @@ -98,17 +98,17 @@ phys_size_t initdram (int board_type) * | +----------- Operating Mode = Standard * +-------------- Write Burst Mode = Programmed Burst Length */ - memctl->memc_mar = CFG_MAR; + memctl->memc_mar = CONFIG_SYS_MAR; /* * Map controller banks 1 to the SDRAM banks 1 at * preliminary addresses - these have to be modified after the * SDRAM size has been determined. */ - memctl->memc_or1 = CFG_OR1_PRELIM; - memctl->memc_br1 = CFG_BR1_PRELIM; + memctl->memc_or1 = CONFIG_SYS_OR1_PRELIM; + memctl->memc_br1 = CONFIG_SYS_BR1_PRELIM; - memctl->memc_mbmr = CFG_MBMR & (~(MBMR_PTBE)); /* no refresh yet */ + memctl->memc_mbmr = CONFIG_SYS_MBMR & (~(MBMR_PTBE)); /* no refresh yet */ udelay (200); @@ -142,8 +142,8 @@ phys_size_t initdram (int board_type) int board_early_init_r(void) { /* setup the UPIOx */ - *(char *)(CFG_PIGGY_BASE + 0x02) = 0xc0; - *(char *)(CFG_PIGGY_BASE + 0x03) = 0x35; + *(char *)(CONFIG_SYS_PIGGY_BASE + 0x02) = 0xc0; + *(char *)(CONFIG_SYS_PIGGY_BASE + 0x03) = 0x35; return 0; } |