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author | Kumar Gala <galak@kernel.crashing.org> | 2007-12-07 12:17:34 -0600 |
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committer | Kumar Gala <galak@kernel.crashing.org> | 2007-12-11 22:34:20 -0600 |
commit | 8ff3de61fc5f9b3b21647bce081a3b7f710f0d4d (patch) | |
tree | 78409af74c00710d92724acc7f725b8726833d26 /drivers/pci/fsl_pci_init.c | |
parent | 82ac8c97145a4c3bf8b3dbfad00fa96e920f9b9c (diff) | |
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Handle MPC85xx PCIe reset errata (PCI-Ex 38)
On the MPC85xx boards that have PCIe enable the PCIe errata fix.
(MPC8544DS, MPC8548CDS, MPC8568MDS).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'drivers/pci/fsl_pci_init.c')
-rw-r--r-- | drivers/pci/fsl_pci_init.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c index 1e77884..68e45e1 100644 --- a/drivers/pci/fsl_pci_init.c +++ b/drivers/pci/fsl_pci_init.c @@ -112,6 +112,29 @@ fsl_pci_init(struct pci_controller *hose) pci_hose_read_config_word(hose, dev, PCI_LTSSM, <ssm); enabled = ltssm >= PCI_LTSSM_L0; +#ifdef CONFIG_FSL_PCIE_RESET + if (ltssm == 1) { + int i; + debug("....PCIe link error. " + "LTSSM=0x%02x.", ltssm); + pci->pdb_stat |= 0x08000000; /* assert PCIe reset */ + temp32 = pci->pdb_stat; + udelay(100); + debug(" Asserting PCIe reset @%x = %x\n", + &pci->pdb_stat, pci->pdb_stat); + pci->pdb_stat &= ~0x08000000; /* clear reset */ + asm("sync;isync"); + for (i=0; i<100 && ltssm < PCI_LTSSM_L0; i++) { + pci_hose_read_config_word(hose, dev, PCI_LTSSM, + <ssm); + udelay(1000); + debug("....PCIe link error. " + "LTSSM=0x%02x.\n", ltssm); + } + enabled = ltssm >= PCI_LTSSM_L0; + } +#endif + if (!enabled) { debug("....PCIE link error. Skipping scan." "LTSSM=0x%02x\n", ltssm); |