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authorWolfgang Denk <wd@denx.de>2010-09-28 23:30:47 +0200
committerWolfgang Denk <wd@denx.de>2010-09-28 23:30:47 +0200
commit2e6e1772c0e34871769be4aef79748fe3e47d953 (patch)
tree00e4e19d7bccd2a1cd5753854ff4c2b8a26bebb0 /drivers/usb/musb/musb_core.h
parent1e4e5ef0469050f014aee1204dae8a9ab6053e49 (diff)
parent3df61957938586c512c17e72d83551d190400981 (diff)
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Merge branch 'next' of /home/wd/git/u-boot/next
Conflicts: include/ppc4xx.h Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'drivers/usb/musb/musb_core.h')
-rw-r--r--drivers/usb/musb/musb_core.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/usb/musb/musb_core.h b/drivers/usb/musb/musb_core.h
index 4771876..8f73876 100644
--- a/drivers/usb/musb/musb_core.h
+++ b/drivers/usb/musb/musb_core.h
@@ -369,6 +369,8 @@ extern void read_fifo(u8 ep, u32 length, void *fifo_data);
# define readb(addr) (u8)bfin_read16(addr)
# undef writeb
# define writeb(b, addr) bfin_write16(addr, b)
+# undef MUSB_TXCSR_MODE /* not supported */
+# define MUSB_TXCSR_MODE 0
/*
* The USB PHY on current Blackfin processors is a UTMI+ level 2 PHY.
* However, it has no ULPI support - so there are no registers at all.