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author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2009-04-16 21:30:44 +0200 |
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committer | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2009-04-16 21:30:44 +0200 |
commit | dc39ae9513c32dfeb9e018dc0d22c6484514fefb (patch) | |
tree | 136c61b2c9731ddf51ef3e222bbf1e44781c5175 /include/asm-arm | |
parent | f75a729b5c1434d5a5bbf453b1b699bf1c3ffbce (diff) | |
download | bootable_bootloader_goldelico_gta04-dc39ae9513c32dfeb9e018dc0d22c6484514fefb.zip bootable_bootloader_goldelico_gta04-dc39ae9513c32dfeb9e018dc0d22c6484514fefb.tar.gz bootable_bootloader_goldelico_gta04-dc39ae9513c32dfeb9e018dc0d22c6484514fefb.tar.bz2 |
at91sam9/at91cap: improve clock framework
calculate dynamically the clock rate and pllb setting for usb
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'include/asm-arm')
-rw-r--r-- | include/asm-arm/arch-at91/at91_pmc.h | 30 | ||||
-rw-r--r-- | include/asm-arm/arch-at91/clk.h | 19 | ||||
-rw-r--r-- | include/asm-arm/arch-at91/hardware.h | 3 | ||||
-rw-r--r-- | include/asm-arm/u-boot-arm.h | 3 |
4 files changed, 44 insertions, 11 deletions
diff --git a/include/asm-arm/arch-at91/at91_pmc.h b/include/asm-arm/arch-at91/at91_pmc.h index b57875d..07580da 100644 --- a/include/asm-arm/arch-at91/at91_pmc.h +++ b/include/asm-arm/arch-at91/at91_pmc.h @@ -1,5 +1,5 @@ /* - * [origin: Linux kernel include/asm-arm/arch-at91/at91_pmc.h] + * [origin: Linux kernel arch/arm/mach-at91/include/mach/at91_pmc.h] * * Copyright (C) 2005 Ivan Kokshaysky * Copyright (C) SAN People @@ -23,6 +23,7 @@ #define AT91_PMC_PCK (1 << 0) /* Processor Clock */ #define AT91RM9200_PMC_UDP (1 << 1) /* USB Devcice Port Clock [AT91RM9200 only] */ #define AT91RM9200_PMC_MCKUDP (1 << 2) /* USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */ +#define AT91CAP9_PMC_DDR (1 << 2) /* DDR Clock [AT91CAP9 revC only] */ #define AT91RM9200_PMC_UHP (1 << 4) /* USB Host Port Clock [AT91RM9200 only] */ #define AT91SAM926x_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91SAM926x only] */ #define AT91CAP9_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91CAP9 only] */ @@ -39,10 +40,14 @@ #define AT91_PMC_PCSR (AT91_PMC + 0x18) /* Peripheral Clock Status Register */ #define AT91_CKGR_UCKR (AT91_PMC + 0x1C) /* UTMI Clock Register [SAM9RL, CAP9] */ +#define AT91_PMC_UPLLEN (1 << 16) /* UTMI PLL Enable */ +#define AT91_PMC_UPLLCOUNT (0xf << 20) /* UTMI PLL Start-up Time */ +#define AT91_PMC_BIASEN (1 << 24) /* UTMI BIAS Enable */ +#define AT91_PMC_BIASCOUNT (0xf << 28) /* UTMI PLL Start-up Time */ #define AT91_CKGR_MOR (AT91_PMC + 0x20) /* Main Oscillator Register [not on SAM9RL] */ #define AT91_PMC_MOSCEN (1 << 0) /* Main Oscillator Enable */ -#define AT91_PMC_OSCBYPASS (1 << 1) /* Oscillator Bypass [AT91SAM926x only] */ +#define AT91_PMC_OSCBYPASS (1 << 1) /* Oscillator Bypass [SAM9x, CAP9] */ #define AT91_PMC_OSCOUNT (0xff << 8) /* Main Oscillator Start-up Time */ #define AT91_CKGR_MCFR (AT91_PMC + 0x24) /* Main Clock Frequency Register */ @@ -76,10 +81,17 @@ #define AT91_PMC_PRES_32 (5 << 2) #define AT91_PMC_PRES_64 (6 << 2) #define AT91_PMC_MDIV (3 << 8) /* Master Clock Division */ -#define AT91_PMC_MDIV_1 (0 << 8) -#define AT91_PMC_MDIV_2 (1 << 8) -#define AT91_PMC_MDIV_3 (2 << 8) -#define AT91_PMC_MDIV_4 (3 << 8) +#define AT91RM9200_PMC_MDIV_1 (0 << 8) /* [AT91RM9200 only] */ +#define AT91RM9200_PMC_MDIV_2 (1 << 8) +#define AT91RM9200_PMC_MDIV_3 (2 << 8) +#define AT91RM9200_PMC_MDIV_4 (3 << 8) +#define AT91SAM9_PMC_MDIV_1 (0 << 8) /* [SAM9,CAP9 only] */ +#define AT91SAM9_PMC_MDIV_2 (1 << 8) +#define AT91SAM9_PMC_MDIV_4 (2 << 8) +#define AT91SAM9_PMC_MDIV_6 (3 << 8) +#define AT91_PMC_PDIV (1 << 12) /* Processor Clock Division [some SAM9 only] */ +#define AT91_PMC_PDIV_1 (0 << 12) +#define AT91_PMC_PDIV_2 (1 << 12) #define AT91_PMC_PCKR(n) (AT91_PMC + 0x40 + ((n) * 4)) /* Programmable Clock 0-3 Registers */ @@ -90,6 +102,8 @@ #define AT91_PMC_LOCKA (1 << 1) /* PLLA Lock */ #define AT91_PMC_LOCKB (1 << 2) /* PLLB Lock */ #define AT91_PMC_MCKRDY (1 << 3) /* Master Clock */ +#define AT91_PMC_LOCKU (1 << 6) /* UPLL Lock [AT91CAP9 only] */ +#define AT91_PMC_OSCSEL (1 << 7) /* Slow Clock Oscillator [AT91CAP9 revC only] */ #define AT91_PMC_PCK0RDY (1 << 8) /* Programmable Clock 0 */ #define AT91_PMC_PCK1RDY (1 << 9) /* Programmable Clock 1 */ #define AT91_PMC_PCK2RDY (1 << 10) /* Programmable Clock 2 */ @@ -97,8 +111,8 @@ #define AT91_PMC_IMR (AT91_PMC + 0x6c) /* Interrupt Mask Register */ #define AT91_PMC_PROT (AT91_PMC + 0xe4) /* Protect Register [AT91CAP9 revC only] */ -#define AT91_PMC_PROTKEY 0x504d4301 /* Activation Code */ +#define AT91_PMC_PROTKEY 0x504d4301 /* Activation Code */ -#define AT91_PMC_VER (AT91_PMC + 0xfc) /* PMC Module Version [AT91CAP9 only] */ +#define AT91_PMC_VER (AT91_PMC + 0xfc) /* PMC Module Version [AT91CAP9 only] */ #endif diff --git a/include/asm-arm/arch-at91/clk.h b/include/asm-arm/arch-at91/clk.h index 1b502c8..6aaf82e 100644 --- a/include/asm-arm/arch-at91/clk.h +++ b/include/asm-arm/arch-at91/clk.h @@ -2,6 +2,7 @@ * (C) Copyright 2007 * Stelian Pop <stelian.pop@leadtechdesign.com> * Lead Tech Design <www.leadtechdesign.com> + * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> * * See file CREDITS for list of people who contributed to this * project. @@ -26,20 +27,32 @@ #include <asm/arch/hardware.h> +unsigned long get_cpu_clk_rate(void); +unsigned long get_main_clk_rate(void); +unsigned long get_mck_clk_rate(void); +unsigned long get_plla_clk_rate(void); +unsigned long get_pllb_clk_rate(void); +unsigned int get_pllb_init(void); + static inline unsigned long get_macb_pclk_rate(unsigned int dev_id) { - return AT91_MASTER_CLOCK; + return get_mck_clk_rate(); } static inline unsigned long get_usart_clk_rate(unsigned int dev_id) { - return AT91_MASTER_CLOCK; + return get_mck_clk_rate(); } static inline unsigned long get_lcdc_clk_rate(unsigned int dev_id) { - return AT91_MASTER_CLOCK; + return get_mck_clk_rate(); } +static inline unsigned long get_twi_clk_rate(unsigned int dev_id) +{ + return get_mck_clk_rate(); +} +int at91_clock_init(unsigned long main_clock); #endif /* __ASM_ARM_ARCH_CLK_H__ */ diff --git a/include/asm-arm/arch-at91/hardware.h b/include/asm-arm/arch-at91/hardware.h index 4f0e1a7..6b46a36 100644 --- a/include/asm-arm/arch-at91/hardware.h +++ b/include/asm-arm/arch-at91/hardware.h @@ -48,4 +48,7 @@ #error "Unsupported AT91 processor" #endif +/* Clocks */ +#define AT91_SLOW_CLOCK 32768 /* slow clock */ + #endif diff --git a/include/asm-arm/u-boot-arm.h b/include/asm-arm/u-boot-arm.h index 4ee5a32..e7d58fe 100644 --- a/include/asm-arm/u-boot-arm.h +++ b/include/asm-arm/u-boot-arm.h @@ -40,6 +40,9 @@ extern ulong FIQ_STACK_START; /* top of FIQ stack */ int cpu_init(void); int cleanup_before_linux(void); +/* cpu/.../arch/cpu.c */ +int arch_cpu_init(void); + /* board/.../... */ int board_init(void); int dram_init (void); |