diff options
| author | Peter Tyser <ptyser@xes-inc.com> | 2009-05-22 10:26:32 -0500 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2009-06-12 17:20:52 -0500 |
| commit | 6442b71b522face775c1c31bd43121db3b4bf7d6 (patch) | |
| tree | 35254f651fa589e74f8114bfeb6a9d728bb6fb93 /include/asm-ppc/immap_85xx.h | |
| parent | 2f21ce4d546d31289ac49a680f78bcc9a792c6ec (diff) | |
| download | bootable_bootloader_goldelico_gta04-6442b71b522face775c1c31bd43121db3b4bf7d6.zip bootable_bootloader_goldelico_gta04-6442b71b522face775c1c31bd43121db3b4bf7d6.tar.gz bootable_bootloader_goldelico_gta04-6442b71b522face775c1c31bd43121db3b4bf7d6.tar.bz2 | |
85xx: Add PORBMSR and PORDEVSR shift defines
Add defines similar to those already used for the the 86xx architecture.
This will ease sharing of PCI code between the 85xx and 86xx
architectures.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include/asm-ppc/immap_85xx.h')
| -rw-r--r-- | include/asm-ppc/immap_85xx.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h index e4f5ee2..db2bdf0 100644 --- a/include/asm-ppc/immap_85xx.h +++ b/include/asm-ppc/immap_85xx.h @@ -1530,6 +1530,7 @@ typedef struct ccsr_gur { #define MPC85xx_PORPLLSR_QE_RATIO_SHIFT 25 uint porbmsr; /* 0xe0004 - POR boot mode status register */ #define MPC85xx_PORBMSR_HA 0x00070000 +#define MPC85xx_PORBMSR_HA_SHIFT 16 uint porimpscr; /* 0xe0008 - POR I/O impedance status and control register */ uint pordevsr; /* 0xe000c - POR I/O device status regsiter */ #define MPC85xx_PORDEVSR_SGMII1_DIS 0x20000000 @@ -1539,6 +1540,7 @@ typedef struct ccsr_gur { #define MPC85xx_PORDEVSR_SRDS2_IO_SEL 0x38000000 #define MPC85xx_PORDEVSR_PCI1 0x00800000 #define MPC85xx_PORDEVSR_IO_SEL 0x00780000 +#define MPC85xx_PORDEVSR_IO_SEL_SHIFT 19 #define MPC85xx_PORDEVSR_PCI2_ARB 0x00040000 #define MPC85xx_PORDEVSR_PCI1_ARB 0x00020000 #define MPC85xx_PORDEVSR_PCI1_PCI32 0x00010000 |