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author | Kumar Gala <galak@kernel.crashing.org> | 2007-11-28 00:36:33 -0600 |
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committer | Kumar Gala <galak@kernel.crashing.org> | 2007-12-11 22:34:19 -0600 |
commit | aafeefbdb8b029f5ca2a195598d0a501a606eea9 (patch) | |
tree | 728753848457380bcbf771fff2639adaf3dfb9fc /include/asm-ppc/iopin_85xx.h | |
parent | f59b55a5b8fcadaa99781ba48e7a38e956afa527 (diff) | |
download | bootable_bootloader_goldelico_gta04-aafeefbdb8b029f5ca2a195598d0a501a606eea9.zip bootable_bootloader_goldelico_gta04-aafeefbdb8b029f5ca2a195598d0a501a606eea9.tar.gz bootable_bootloader_goldelico_gta04-aafeefbdb8b029f5ca2a195598d0a501a606eea9.tar.bz2 |
Stop using immap_t for cpm offset on 85xx
In the future the offsets to various blocks may not be in same location.
Move to using CFG_MPC85xx_CPM_ADDR as the base of the CPM registers
instead of getting it via &immap->im_cpm.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include/asm-ppc/iopin_85xx.h')
-rw-r--r-- | include/asm-ppc/iopin_85xx.h | 40 |
1 files changed, 20 insertions, 20 deletions
diff --git a/include/asm-ppc/iopin_85xx.h b/include/asm-ppc/iopin_85xx.h index f854df6..daddb55 100644 --- a/include/asm-ppc/iopin_85xx.h +++ b/include/asm-ppc/iopin_85xx.h @@ -23,121 +23,121 @@ typedef struct { extern __inline__ void iopin_set_high (iopin_t * iopin) { - volatile uint *datp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.pdata; + volatile uint *datp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.pdata; datp[iopin->port * 8] |= (1 << (31 - iopin->pin)); } extern __inline__ void iopin_set_low (iopin_t * iopin) { - volatile uint *datp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.pdata; + volatile uint *datp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.pdata; datp[iopin->port * 8] &= ~(1 << (31 - iopin->pin)); } extern __inline__ uint iopin_is_high (iopin_t * iopin) { - volatile uint *datp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.pdata; + volatile uint *datp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.pdata; return (datp[iopin->port * 8] >> (31 - iopin->pin)) & 1; } extern __inline__ uint iopin_is_low (iopin_t * iopin) { - volatile uint *datp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.pdata; + volatile uint *datp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.pdata; return ((datp[iopin->port * 8] >> (31 - iopin->pin)) & 1) ^ 1; } extern __inline__ void iopin_set_out (iopin_t * iopin) { - volatile uint *dirp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.pdira; + volatile uint *dirp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.pdira; dirp[iopin->port * 8] |= (1 << (31 - iopin->pin)); } extern __inline__ void iopin_set_in (iopin_t * iopin) { - volatile uint *dirp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.pdira; + volatile uint *dirp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.pdira; dirp[iopin->port * 8] &= ~(1 << (31 - iopin->pin)); } extern __inline__ uint iopin_is_out (iopin_t * iopin) { - volatile uint *dirp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.pdira; + volatile uint *dirp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.pdira; return (dirp[iopin->port * 8] >> (31 - iopin->pin)) & 1; } extern __inline__ uint iopin_is_in (iopin_t * iopin) { - volatile uint *dirp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.pdira; + volatile uint *dirp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.pdira; return ((dirp[iopin->port * 8] >> (31 - iopin->pin)) & 1) ^ 1; } extern __inline__ void iopin_set_odr (iopin_t * iopin) { - volatile uint *odrp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.podra; + volatile uint *odrp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.podra; odrp[iopin->port * 8] |= (1 << (31 - iopin->pin)); } extern __inline__ void iopin_set_act (iopin_t * iopin) { - volatile uint *odrp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.podra; + volatile uint *odrp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.podra; odrp[iopin->port * 8] &= ~(1 << (31 - iopin->pin)); } extern __inline__ uint iopin_is_odr (iopin_t * iopin) { - volatile uint *odrp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.podra; + volatile uint *odrp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.podra; return (odrp[iopin->port * 8] >> (31 - iopin->pin)) & 1; } extern __inline__ uint iopin_is_act (iopin_t * iopin) { - volatile uint *odrp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.podra; + volatile uint *odrp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.podra; return ((odrp[iopin->port * 8] >> (31 - iopin->pin)) & 1) ^ 1; } extern __inline__ void iopin_set_ded (iopin_t * iopin) { - volatile uint *parp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.ppara; + volatile uint *parp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.ppara; parp[iopin->port * 8] |= (1 << (31 - iopin->pin)); } extern __inline__ void iopin_set_gen (iopin_t * iopin) { - volatile uint *parp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.ppara; + volatile uint *parp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.ppara; parp[iopin->port * 8] &= ~(1 << (31 - iopin->pin)); } extern __inline__ uint iopin_is_ded (iopin_t * iopin) { - volatile uint *parp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.ppara; + volatile uint *parp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.ppara; return (parp[iopin->port * 8] >> (31 - iopin->pin)) & 1; } extern __inline__ uint iopin_is_gen (iopin_t * iopin) { - volatile uint *parp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.ppara; + volatile uint *parp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.ppara; return ((parp[iopin->port * 8] >> (31 - iopin->pin)) & 1) ^ 1; } extern __inline__ void iopin_set_opt2 (iopin_t * iopin) { - volatile uint *sorp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.psora; + volatile uint *sorp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.psora; sorp[iopin->port * 8] |= (1 << (31 - iopin->pin)); } extern __inline__ void iopin_set_opt1 (iopin_t * iopin) { - volatile uint *sorp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.psora; + volatile uint *sorp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.psora; sorp[iopin->port * 8] &= ~(1 << (31 - iopin->pin)); } extern __inline__ uint iopin_is_opt2 (iopin_t * iopin) { - volatile uint *sorp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.psora; + volatile uint *sorp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.psora; return (sorp[iopin->port * 8] >> (31 - iopin->pin)) & 1; } extern __inline__ uint iopin_is_opt1 (iopin_t * iopin) { - volatile uint *sorp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.psora; + volatile uint *sorp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.psora; return ((sorp[iopin->port * 8] >> (31 - iopin->pin)) & 1) ^ 1; } |