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authorAndy Fleming <afleming@freescale.com>2007-08-03 02:23:23 -0500
committerAndrew Fleming-AFLEMING <afleming@freescale.com>2007-08-03 02:23:23 -0500
commit6bf6f114dcdd97ec3f80c2761ed40e31229d6b78 (patch)
tree4bc9e1362c3090bb6d2df71109228ca61b8d00ce /include/configs/IAD210.h
parent5a56af3b522ba47fb33a3fee84d23bf1e5429654 (diff)
parent5dc210dec5bace98a50b6ba905347890091a9bb0 (diff)
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Merge branch 'testing' into working
Conflicts: CHANGELOG fs/fat/fat.c include/configs/MPC8560ADS.h include/configs/pcs440ep.h net/eth.c
Diffstat (limited to 'include/configs/IAD210.h')
-rw-r--r--include/configs/IAD210.h29
1 files changed, 20 insertions, 9 deletions
diff --git a/include/configs/IAD210.h b/include/configs/IAD210.h
index 35d84ae..bd0894c 100644
--- a/include/configs/IAD210.h
+++ b/include/configs/IAD210.h
@@ -84,7 +84,15 @@
/* #define CONFIG_STATUS_LED 1*/ /* Status LED enabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
# undef CONFIG_SCC1_ENET /* disable SCC1 ethernet */
# define CONFIG_FEC_ENET 1 /* use FEC ethernet */
@@ -123,20 +131,23 @@
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DHCP | \
- CFG_CMD_DATE )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DATE
+
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -217,7 +228,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif