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author | Kumar Gala <galak@kernel.crashing.org> | 2010-12-17 10:42:01 -0600 |
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committer | Kumar Gala <galak@kernel.crashing.org> | 2011-01-14 01:32:20 -0600 |
commit | 06eb4d8c68d2ea72da398c88c077fc2fb7cca6d9 (patch) | |
tree | 69e77bb28cc82b5b743bf86ce3fc024ce177dfbc /include/configs/P1_P2_RDB.h | |
parent | 94f2bc486043365f253892342a3ab75371b1444a (diff) | |
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powerpc/85xx: Rework P1_P2_RDB pci_init_board to use common FSL PCIe code
Remove duplicated code in P1_P2_RDB boards and utilize the common
fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI
controllers based on which PCIe controllers are enabled.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include/configs/P1_P2_RDB.h')
-rw-r--r-- | include/configs/P1_P2_RDB.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h index d479a09..6862e6d 100644 --- a/include/configs/P1_P2_RDB.h +++ b/include/configs/P1_P2_RDB.h @@ -358,6 +358,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); */ /* controller 2, Slot 2, tgtid 2, Base address 9000 */ +#define CONFIG_SYS_PCIE2_NAME "Slot 1" #define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000 #define CONFIG_SYS_PCIE2_MEM_BUS 0xa0000000 #define CONFIG_SYS_PCIE2_MEM_PHYS 0xa0000000 @@ -368,6 +369,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */ /* controller 1, Slot 1, tgtid 1, Base address a000 */ +#define CONFIG_SYS_PCIE1_NAME "Slot 2" #define CONFIG_SYS_PCIE1_MEM_VIRT 0xc0000000 #define CONFIG_SYS_PCIE1_MEM_BUS 0xc0000000 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc0000000 |