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author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-10-16 15:01:15 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:54:03 +0200 |
commit | 6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch) | |
tree | ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /include/configs/cerf250.h | |
parent | 71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff) | |
download | bootable_bootloader_goldelico_gta04-6d0f6bcf337c5261c08fabe12982178c2c489d76.zip bootable_bootloader_goldelico_gta04-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.gz bootable_bootloader_goldelico_gta04-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.bz2 |
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'include/configs/cerf250.h')
-rw-r--r-- | include/configs/cerf250.h | 118 |
1 files changed, 59 insertions, 59 deletions
diff --git a/include/configs/cerf250.h b/include/configs/cerf250.h index 9618425..71e5b58 100644 --- a/include/configs/cerf250.h +++ b/include/configs/cerf250.h @@ -44,8 +44,8 @@ /* * Size of malloc() pool */ -#define CFG_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) -#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ /* * Hardware drivers @@ -94,33 +94,33 @@ /* * Miscellaneous configurable options */ -#define CFG_HUSH_PARSER 1 -#define CFG_PROMPT_HUSH_PS2 "> " +#define CONFIG_SYS_HUSH_PARSER 1 +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -#define CFG_LONGHELP /* undef to save memory */ -#ifdef CFG_HUSH_PARSER -#define CFG_PROMPT "uboot$ " /* Monitor Command Prompt */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#ifdef CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT "uboot$ " /* Monitor Command Prompt */ #else -#define CFG_PROMPT "=> " /* Monitor Command Prompt */ +#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ #endif -#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ -#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CFG_MAXARGS 16 /* max number of command args */ -#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ -#define CFG_DEVICE_NULLDEV 1 +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ +#define CONFIG_SYS_DEVICE_NULLDEV 1 -#define CFG_MEMTEST_START 0xa0400000 /* memtest works on */ -#define CFG_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ +#define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ -#undef CFG_CLKS_IN_HZ +#undef CONFIG_SYS_CLKS_IN_HZ -#define CFG_LOAD_ADDR 0xa2000000 /* default load address */ +#define CONFIG_SYS_LOAD_ADDR 0xa2000000 /* default load address */ -#define CFG_HZ 3686400 /* incrementer freq: 3.6864 MHz */ -#define CFG_CPUSPEED 0x141 /* set core clock to 400/200/100 MHz */ +#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ +#define CONFIG_SYS_CPUSPEED 0x141 /* set core clock to 400/200/100 MHz */ -#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } /* @@ -153,54 +153,54 @@ #define PHYS_FLASH_BANK_SIZE 0x02000000 /* 32 MB Banks */ #define PHYS_FLASH_SECT_SIZE 0x00040000 /* 256 KB sectors (x2) */ -#define CFG_DRAM_BASE 0xa0000000 -#define CFG_DRAM_SIZE 0x04000000 +#define CONFIG_SYS_DRAM_BASE 0xa0000000 +#define CONFIG_SYS_DRAM_SIZE 0x04000000 -#define CFG_FLASH_BASE PHYS_FLASH_1 +#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 /* * GPIO settings */ -#define CFG_GPSR0_VAL 0x00408030 -#define CFG_GPSR1_VAL 0x00BFA882 -#define CFG_GPSR2_VAL 0x0001C000 -#define CFG_GPCR0_VAL 0xC0031100 -#define CFG_GPCR1_VAL 0xFC400300 -#define CFG_GPCR2_VAL 0x00003FFF -#define CFG_GPDR0_VAL 0xC0439330 -#define CFG_GPDR1_VAL 0xFCFFAB82 -#define CFG_GPDR2_VAL 0x0001FFFF -#define CFG_GAFR0_L_VAL 0x80000000 -#define CFG_GAFR0_U_VAL 0xA5000010 -#define CFG_GAFR1_L_VAL 0x60008018 -#define CFG_GAFR1_U_VAL 0xAAA5AAAA -#define CFG_GAFR2_L_VAL 0xAAA0000A -#define CFG_GAFR2_U_VAL 0x00000002 - -#define CFG_PSSR_VAL 0x20 +#define CONFIG_SYS_GPSR0_VAL 0x00408030 +#define CONFIG_SYS_GPSR1_VAL 0x00BFA882 +#define CONFIG_SYS_GPSR2_VAL 0x0001C000 +#define CONFIG_SYS_GPCR0_VAL 0xC0031100 +#define CONFIG_SYS_GPCR1_VAL 0xFC400300 +#define CONFIG_SYS_GPCR2_VAL 0x00003FFF +#define CONFIG_SYS_GPDR0_VAL 0xC0439330 +#define CONFIG_SYS_GPDR1_VAL 0xFCFFAB82 +#define CONFIG_SYS_GPDR2_VAL 0x0001FFFF +#define CONFIG_SYS_GAFR0_L_VAL 0x80000000 +#define CONFIG_SYS_GAFR0_U_VAL 0xA5000010 +#define CONFIG_SYS_GAFR1_L_VAL 0x60008018 +#define CONFIG_SYS_GAFR1_U_VAL 0xAAA5AAAA +#define CONFIG_SYS_GAFR2_L_VAL 0xAAA0000A +#define CONFIG_SYS_GAFR2_U_VAL 0x00000002 + +#define CONFIG_SYS_PSSR_VAL 0x20 /* * Memory settings */ -#define CFG_MSC0_VAL 0x12447FF0 -#define CFG_MSC1_VAL 0x12BC5554 -#define CFG_MSC2_VAL 0x7FF97FF1 -#define CFG_MDCNFG_VAL 0x00001AC9 -#define CFG_MDREFR_VAL 0x03CDC017 -#define CFG_MDMRS_VAL 0x00000000 +#define CONFIG_SYS_MSC0_VAL 0x12447FF0 +#define CONFIG_SYS_MSC1_VAL 0x12BC5554 +#define CONFIG_SYS_MSC2_VAL 0x7FF97FF1 +#define CONFIG_SYS_MDCNFG_VAL 0x00001AC9 +#define CONFIG_SYS_MDREFR_VAL 0x03CDC017 +#define CONFIG_SYS_MDMRS_VAL 0x00000000 /* * PCMCIA and CF Interfaces */ -#define CFG_MECR_VAL 0x00000000 -#define CFG_MCMEM0_VAL 0x00010504 -#define CFG_MCMEM1_VAL 0x00010504 -#define CFG_MCATT0_VAL 0x00010504 -#define CFG_MCATT1_VAL 0x00010504 -#define CFG_MCIO0_VAL 0x00004715 -#define CFG_MCIO1_VAL 0x00004715 +#define CONFIG_SYS_MECR_VAL 0x00000000 +#define CONFIG_SYS_MCMEM0_VAL 0x00010504 +#define CONFIG_SYS_MCMEM1_VAL 0x00010504 +#define CONFIG_SYS_MCATT0_VAL 0x00010504 +#define CONFIG_SYS_MCATT1_VAL 0x00010504 +#define CONFIG_SYS_MCIO0_VAL 0x00004715 +#define CONFIG_SYS_MCIO1_VAL 0x00004715 #define _LED 0x08000010 /*check this */ #define LED_BLANK 0x08000040 @@ -209,16 +209,16 @@ /* * FLASH and environment organization */ -#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ /* timeout values are in ticks */ -#define CFG_FLASH_ERASE_TOUT (25*CFG_HZ) /* Timeout for Flash Erase */ -#define CFG_FLASH_WRITE_TOUT (25*CFG_HZ) /* Timeout for Flash Write */ +#define CONFIG_SYS_FLASH_ERASE_TOUT (25*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ +#define CONFIG_SYS_FLASH_WRITE_TOUT (25*CONFIG_SYS_HZ) /* Timeout for Flash Write */ -#define CFG_MONITOR_LEN 0x40000 /* 256 KiB */ +#define CONFIG_SYS_MONITOR_LEN 0x40000 /* 256 KiB */ #define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + CFG_MONITOR_LEN) +#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + CONFIG_SYS_MONITOR_LEN) #define CONFIG_ENV_SIZE 0x40000 /* Total Size of Environment Sector */ |