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author | H. Nikolaus Schaller <hns@goldelico.com> | 2012-03-26 20:55:28 +0200 |
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committer | H. Nikolaus Schaller <hns@goldelico.com> | 2012-03-26 20:55:28 +0200 |
commit | 92988a21ad4c4c9504295ccb580c9f806134471b (patch) | |
tree | 5effc9f14170112450de05c67dafbe8d5034d595 /include/mpc86xx.h | |
parent | ca2b506783b676c95762c54ea24dcfdaae1947c9 (diff) | |
download | bootable_bootloader_goldelico_gta04-92988a21ad4c4c9504295ccb580c9f806134471b.zip bootable_bootloader_goldelico_gta04-92988a21ad4c4c9504295ccb580c9f806134471b.tar.gz bootable_bootloader_goldelico_gta04-92988a21ad4c4c9504295ccb580c9f806134471b.tar.bz2 |
added boot script files to repository
Diffstat (limited to 'include/mpc86xx.h')
-rw-r--r-- | include/mpc86xx.h | 89 |
1 files changed, 0 insertions, 89 deletions
diff --git a/include/mpc86xx.h b/include/mpc86xx.h deleted file mode 100644 index eb85d60..0000000 --- a/include/mpc86xx.h +++ /dev/null @@ -1,89 +0,0 @@ -/* - * Copyright 2006 Freescale Semiconductor. - * Jeffrey Brown - * Srikanth Srinivasan (srikanth.srinivasan@freescale.com) - */ - -#ifndef __MPC86xx_H__ -#define __MPC86xx_H__ - -#include <asm/fsl_lbc.h> - -#define EXC_OFF_SYS_RESET 0x0100 /* System reset offset */ -#define _START_OFFSET EXC_OFF_SYS_RESET - -/* - * platform register addresses - */ - -#define GUTS_SVR (CONFIG_SYS_CCSRBAR + 0xE00A4) -#define MCM_ABCR (CONFIG_SYS_CCSRBAR + 0x01000) -#define MCM_DBCR (CONFIG_SYS_CCSRBAR + 0x01008) - -/* - * l2cr values. Look in config_<BOARD>.h for the actual setup - */ -#define l2cr 1017 - -#define L2CR_L2E 0x80000000 /* bit 0 - enable */ -#define L2CR_L2PE 0x40000000 /* bit 1 - data parity */ -#define L2CR_L2I 0x00200000 /* bit 10 - global invalidate bit */ -#define L2CR_L2CTL 0x00100000 /* bit 11 - l2 ram control */ -#define L2CR_L2DO 0x00010000 /* bit 15 - data-only mode */ -#define L2CR_REP 0x00001000 /* bit 19 - l2 replacement alg */ -#define L2CR_HWF 0x00000800 /* bit 20 - hardware flush */ -#define L2CR_L2IP 0x00000001 /* global invalidate in progress */ - -#define HID0_XBSEN 0x00000100 -#define HID0_HIGH_BAT_EN 0x00800000 -#define HID0_XAEN 0x00020000 - -#ifndef __ASSEMBLY__ - -typedef struct { - unsigned long freqProcessor; - unsigned long freqSystemBus; - unsigned long freqLocalBus; -} MPC86xx_SYS_INFO; - -#define l1icache_enable icache_enable - -void l2cache_enable(void); -void l1dcache_enable(void); - -static __inline__ unsigned long get_hid0 (void) -{ - unsigned long hid0; - asm volatile("mfspr %0, 1008" : "=r" (hid0) :); - return hid0; -} - -static __inline__ unsigned long get_hid1 (void) -{ - unsigned long hid1; - asm volatile("mfspr %0, 1009" : "=r" (hid1) :); - return hid1; -} - -static __inline__ void set_hid0 (unsigned long hid0) -{ - asm volatile("mtspr 1008, %0" : : "r" (hid0)); -} - -static __inline__ void set_hid1 (unsigned long hid1) -{ - asm volatile("mtspr 1009, %0" : : "r" (hid1)); -} - - -static __inline__ unsigned long get_l2cr (void) -{ - unsigned long l2cr_val; - asm volatile("mfspr %0, 1017" : "=r" (l2cr_val) :); - return l2cr_val; -} - -void setup_ddr_bat(phys_addr_t dram_size); - -#endif /* _ASMLANGUAGE */ -#endif /* __MPC86xx_H__ */ |