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| author | David Brownell <dbrownell@users.sourceforge.net> | 2009-04-12 15:38:06 -0700 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2009-04-16 23:04:28 +0200 |
| commit | 7ee38c044ca5041d3378d6507580ea4ec344af96 (patch) | |
| tree | 5b95248c8ad414b29c930a56fe5a073282835b22 /include | |
| parent | dfc99e143fca44a492918ac6cf3f76ee9c2473a9 (diff) | |
| download | bootable_bootloader_goldelico_gta04-7ee38c044ca5041d3378d6507580ea4ec344af96.zip bootable_bootloader_goldelico_gta04-7ee38c044ca5041d3378d6507580ea4ec344af96.tar.gz bootable_bootloader_goldelico_gta04-7ee38c044ca5041d3378d6507580ea4ec344af96.tar.bz2 | |
fix DaVinci NS16550_REG_SIZE regression
Update the DaVinci DM6446 boards to use the new convention
for CONFIG_SYS_NS16550_REG_SIZE ... the size hasn't changed
from the original 4 bytes, but these chips are little-endian.
(Resolves a regression added recently by the include/ns16550.h
patch to "Unify structure declaration for registers". The code
previously worked just fine because the registers were accessed
as host-endian words, not as bytes.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/davinci_dvevm.h | 2 | ||||
| -rw-r--r-- | include/configs/davinci_schmoogie.h | 2 | ||||
| -rw-r--r-- | include/configs/davinci_sffsdr.h | 2 | ||||
| -rw-r--r-- | include/configs/davinci_sonata.h | 2 |
4 files changed, 4 insertions, 4 deletions
diff --git a/include/configs/davinci_dvevm.h b/include/configs/davinci_dvevm.h index b43beaa..fae430b 100644 --- a/include/configs/davinci_dvevm.h +++ b/include/configs/davinci_dvevm.h @@ -85,7 +85,7 @@ /*====================*/ #define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 4 /* NS16550 register size */ +#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size, byteorder */ #define CONFIG_SYS_NS16550_COM1 0x01c20000 /* Base address of UART0 */ #define CONFIG_SYS_NS16550_CLK 27000000 /* Input clock to NS16550 */ #define CONFIG_CONS_INDEX 1 /* use UART0 for console */ diff --git a/include/configs/davinci_schmoogie.h b/include/configs/davinci_schmoogie.h index 2c97a00..923e477 100644 --- a/include/configs/davinci_schmoogie.h +++ b/include/configs/davinci_schmoogie.h @@ -52,7 +52,7 @@ /*====================*/ #define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 4 /* NS16550 register size */ +#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size, byteorder */ #define CONFIG_SYS_NS16550_COM1 0x01c20000 /* Base address of UART0 */ #define CONFIG_SYS_NS16550_CLK 27000000 /* Input clock to NS16550 */ #define CONFIG_CONS_INDEX 1 /* use UART0 for console */ diff --git a/include/configs/davinci_sffsdr.h b/include/configs/davinci_sffsdr.h index 9354c2f..73a59db 100644 --- a/include/configs/davinci_sffsdr.h +++ b/include/configs/davinci_sffsdr.h @@ -54,7 +54,7 @@ /* Serial Driver info */ #define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 4 /* NS16550 register size */ +#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size, byteorder */ #define CONFIG_SYS_NS16550_COM1 0x01c20000 /* Base address of UART0 */ #define CONFIG_SYS_NS16550_CLK 27000000 /* Input clock to NS16550 */ #define CONFIG_CONS_INDEX 1 /* use UART0 for console */ diff --git a/include/configs/davinci_sonata.h b/include/configs/davinci_sonata.h index 0865d0d..70d2c7d 100644 --- a/include/configs/davinci_sonata.h +++ b/include/configs/davinci_sonata.h @@ -85,7 +85,7 @@ /*====================*/ #define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 4 /* NS16550 register size */ +#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size, byteorder */ #define CONFIG_SYS_NS16550_COM1 0x01c20000 /* Base address of UART0 */ #define CONFIG_SYS_NS16550_CLK 27000000 /* Input clock to NS16550 */ #define CONFIG_CONS_INDEX 1 /* use UART0 for console */ |