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authorH. Nikolaus Schaller <hns@goldelico.com>2012-03-26 20:55:28 +0200
committerH. Nikolaus Schaller <hns@goldelico.com>2012-03-26 20:55:28 +0200
commit92988a21ad4c4c9504295ccb580c9f806134471b (patch)
tree5effc9f14170112450de05c67dafbe8d5034d595 /u-boot/board/cradle
parentca2b506783b676c95762c54ea24dcfdaae1947c9 (diff)
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added boot script files to repository
Diffstat (limited to 'u-boot/board/cradle')
-rw-r--r--u-boot/board/cradle/Makefile49
-rw-r--r--u-boot/board/cradle/cradle.c236
-rw-r--r--u-boot/board/cradle/flash.c359
3 files changed, 644 insertions, 0 deletions
diff --git a/u-boot/board/cradle/Makefile b/u-boot/board/cradle/Makefile
new file mode 100644
index 0000000..18040c7
--- /dev/null
+++ b/u-boot/board/cradle/Makefile
@@ -0,0 +1,49 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).o
+
+COBJS := cradle.o flash.o
+
+SRCS := $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+
+$(LIB): $(obj).depend $(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+clean:
+ rm -f $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/u-boot/board/cradle/cradle.c b/u-boot/board/cradle/cradle.c
new file mode 100644
index 0000000..2bbf2d5
--- /dev/null
+++ b/u-boot/board/cradle/cradle.c
@@ -0,0 +1,236 @@
+/*
+ * (C) Copyright 2002
+ * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <asm/arch/pxa-regs.h>
+#include <common.h>
+#include <netdev.h>
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* ------------------------------------------------------------------------- */
+
+
+/* local prototypes */
+void set_led (int led, int color);
+void error_code_halt (int code);
+int init_sio (int led, unsigned long base);
+inline void cradle_outb (unsigned short val, unsigned long base,
+ unsigned long reg);
+inline unsigned char cradle_inb (unsigned long base, unsigned long reg);
+inline void sleep (int i);
+
+inline void
+/**********************************************************/
+sleep (int i)
+/**********************************************************/
+{
+ while (i--) {
+ udelay (1000000);
+ }
+}
+
+void
+/**********************************************************/
+error_code_halt (int code)
+/**********************************************************/
+{
+ while (1) {
+ led_code (code, RED);
+ sleep (1);
+ led_code (0, OFF);
+ sleep (1);
+ }
+}
+
+void
+/**********************************************************/
+led_code (int code, int color)
+/**********************************************************/
+{
+ int i;
+
+ code &= 0xf; /* only 4 leds */
+
+ for (i = 0; i < 4; i++) {
+ if (code & (1 << i)) {
+ set_led (i, color);
+ } else {
+ set_led (i, OFF);
+ }
+ }
+}
+
+void
+/**********************************************************/
+set_led (int led, int color)
+/**********************************************************/
+{
+ int shift = led * 2;
+ unsigned long mask = 0x3 << shift;
+
+ writel(mask, GPCR2); /* clear bits */
+ writel((color << shift), GPSR2); /* set bits */
+ udelay (5000);
+}
+
+inline void
+/**********************************************************/
+cradle_outb (unsigned short val, unsigned long base, unsigned long reg)
+/**********************************************************/
+{
+ *(volatile unsigned short *) (base + (reg * 2)) = val;
+}
+
+inline unsigned char
+/**********************************************************/
+cradle_inb (unsigned long base, unsigned long reg)
+/**********************************************************/
+{
+ unsigned short val;
+
+ val = *(volatile unsigned short *) (base + (reg * 2));
+ return (val & 0xff);
+}
+
+int
+/**********************************************************/
+init_sio (int led, unsigned long base)
+/**********************************************************/
+{
+ unsigned char val;
+
+ set_led (led, YELLOW);
+ val = cradle_inb (base, CRADLE_SIO_INDEX);
+ val = cradle_inb (base, CRADLE_SIO_INDEX);
+ if (val != 0) {
+ set_led (led, RED);
+ return -1;
+ }
+
+ /* map SCC2 to COM1 */
+ cradle_outb (0x01, base, CRADLE_SIO_INDEX);
+ cradle_outb (0x00, base, CRADLE_SIO_DATA);
+
+ /* enable SCC2 extended regs */
+ cradle_outb (0x40, base, CRADLE_SIO_INDEX);
+ cradle_outb (0xa0, base, CRADLE_SIO_DATA);
+
+ /* enable SCC2 clock multiplier */
+ cradle_outb (0x51, base, CRADLE_SIO_INDEX);
+ cradle_outb (0x04, base, CRADLE_SIO_DATA);
+
+ /* enable SCC2 */
+ cradle_outb (0x00, base, CRADLE_SIO_INDEX);
+ cradle_outb (0x04, base, CRADLE_SIO_DATA);
+
+ /* map SCC2 DMA to channel 0 */
+ cradle_outb (0x4f, base, CRADLE_SIO_INDEX);
+ cradle_outb (0x09, base, CRADLE_SIO_DATA);
+
+ /* read ID from SIO to check operation */
+ cradle_outb (0xe4, base, 0x3f8 + 0x3);
+ val = cradle_inb (base, 0x3f8 + 0x0);
+ if ((val & 0xf0) != 0x20) {
+ set_led (led, RED);
+ /* disable SCC2 */
+ cradle_outb (0, base, CRADLE_SIO_INDEX);
+ cradle_outb (0, base, CRADLE_SIO_DATA);
+ return -1;
+ }
+ /* set back to bank 0 */
+ cradle_outb (0, base, 0x3f8 + 0x3);
+ set_led (led, GREEN);
+ return 0;
+}
+
+/*
+ * Miscelaneous platform dependent initialisations
+ */
+
+int
+/**********************************************************/
+board_late_init (void)
+/**********************************************************/
+{
+ return (0);
+}
+
+int
+/**********************************************************/
+board_init (void)
+/**********************************************************/
+{
+ /* We have RAM, disable cache */
+ dcache_disable();
+ icache_disable();
+
+ led_code (0xf, YELLOW);
+
+ /* arch number of HHP Cradle */
+ gd->bd->bi_arch_number = MACH_TYPE_HHP_CRADLE;
+
+ /* adress of boot parameters */
+ gd->bd->bi_boot_params = 0xa0000100;
+
+ /* Init SIOs to enable SCC2 */
+ udelay (100000); /* delay makes it look neat */
+ init_sio (0, CRADLE_SIO1_PHYS);
+ udelay (100000);
+ init_sio (1, CRADLE_SIO2_PHYS);
+ udelay (100000);
+ init_sio (2, CRADLE_SIO3_PHYS);
+ udelay (100000);
+ set_led (3, GREEN);
+
+ return 1;
+}
+
+extern void pxa_dram_init(void);
+int dram_init(void)
+{
+ pxa_dram_init();
+ gd->ram_size = PHYS_SDRAM_1_SIZE;
+ return 0;
+}
+
+void dram_init_banksize(void)
+{
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+}
+
+#ifdef CONFIG_CMD_NET
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC91111
+ rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
+#endif
+ return rc;
+}
+#endif
diff --git a/u-boot/board/cradle/flash.c b/u-boot/board/cradle/flash.c
new file mode 100644
index 0000000..b5635fb
--- /dev/null
+++ b/u-boot/board/cradle/flash.c
@@ -0,0 +1,359 @@
+/*
+ * (C) Copyright 2002
+ * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+#define FLASH_BANK_SIZE 0x400000
+#define MAIN_SECT_SIZE 0x20000
+
+flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
+
+
+/*-----------------------------------------------------------------------
+ */
+
+ulong flash_init (void)
+{
+ int i, j;
+ ulong size = 0;
+
+ for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
+ ulong flashbase = 0;
+
+ flash_info[i].flash_id =
+ (INTEL_MANUFACT & FLASH_VENDMASK) |
+ (INTEL_ID_28F128J3 & FLASH_TYPEMASK);
+ flash_info[i].size = FLASH_BANK_SIZE;
+ flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
+ memset (flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
+ switch (i) {
+ case 0:
+ flashbase = PHYS_FLASH_1;
+ break;
+ case 1:
+ flashbase = PHYS_FLASH_2;
+ break;
+ default:
+ panic ("configured too many flash banks!\n");
+ break;
+ }
+ for (j = 0; j < flash_info[i].sector_count; j++) {
+ flash_info[i].start[j] =
+ flashbase + j * MAIN_SECT_SIZE;
+ }
+ size += flash_info[i].size;
+ }
+
+ /* Protect monitor and environment sectors
+ */
+ flash_protect (FLAG_PROTECT_SET,
+ CONFIG_SYS_FLASH_BASE,
+ CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1,
+ &flash_info[0]);
+
+ flash_protect (FLAG_PROTECT_SET,
+ CONFIG_ENV_ADDR,
+ CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]);
+
+ return size;
+}
+
+/*-----------------------------------------------------------------------
+ */
+void flash_print_info (flash_info_t * info)
+{
+ int i, j;
+
+ for (j = 0; j < CONFIG_SYS_MAX_FLASH_BANKS; j++) {
+ switch (info->flash_id & FLASH_VENDMASK) {
+ case (INTEL_MANUFACT & FLASH_VENDMASK):
+ printf ("Intel: ");
+ break;
+ default:
+ printf ("Unknown Vendor ");
+ break;
+ }
+
+ switch (info->flash_id & FLASH_TYPEMASK) {
+ case (INTEL_ID_28F320J3A & FLASH_TYPEMASK):
+ printf ("28F320J3A (32Mbit)\n");
+ break;
+ case (INTEL_ID_28F128J3 & FLASH_TYPEMASK):
+ printf ("28F128J3 (128Mbit)\n");
+ break;
+ default:
+ printf ("Unknown Chip Type\n");
+ goto Done;
+ break;
+ }
+
+ printf (" Size: %ld MB in %d Sectors\n",
+ info->size >> 20, info->sector_count);
+
+ printf (" Sector Start Addresses:");
+ for (i = 0; i < info->sector_count; i++) {
+ if ((i % 5) == 0) {
+ printf ("\n ");
+ }
+ printf (" %08lX%s", info->start[i],
+ info->protect[i] ? " (RO)" : " ");
+ }
+ printf ("\n");
+ info++;
+ }
+
+Done: ;
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+int flash_erase (flash_info_t * info, int s_first, int s_last)
+{
+ int flag, prot, sect;
+ int rc = ERR_OK;
+
+ if (info->flash_id == FLASH_UNKNOWN)
+ return ERR_UNKNOWN_FLASH_TYPE;
+
+ if ((s_first < 0) || (s_first > s_last)) {
+ return ERR_INVAL;
+ }
+
+ if ((info->flash_id & FLASH_VENDMASK) !=
+ (INTEL_MANUFACT & FLASH_VENDMASK)) {
+ return ERR_UNKNOWN_FLASH_VENDOR;
+ }
+
+ prot = 0;
+ for (sect = s_first; sect <= s_last; ++sect) {
+ if (info->protect[sect]) {
+ prot++;
+ }
+ }
+ if (prot)
+ return ERR_PROTECTED;
+
+ /*
+ * Disable interrupts which might cause a timeout
+ * here. Remember that our exception vectors are
+ * at address 0 in the flash, and we don't want a
+ * (ticker) exception to happen while the flash
+ * chip is in programming mode.
+ */
+ flag = disable_interrupts ();
+
+ /* Start erase on unprotected sectors */
+ for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
+
+ printf ("Erasing sector %2d ... ", sect);
+
+ /* arm simple, non interrupt dependent timer */
+ reset_timer_masked ();
+
+ if (info->protect[sect] == 0) { /* not protected */
+ vu_short *addr = (vu_short *) (info->start[sect]);
+
+ *addr = 0x20; /* erase setup */
+ *addr = 0xD0; /* erase confirm */
+
+ while ((*addr & 0x80) != 0x80) {
+ if (get_timer_masked () >
+ CONFIG_SYS_FLASH_ERASE_TOUT) {
+ *addr = 0xB0; /* suspend erase */
+ *addr = 0xFF; /* reset to read mode */
+ rc = ERR_TIMOUT;
+ goto outahere;
+ }
+ }
+
+ /* clear status register command */
+ *addr = 0x50;
+ /* reset to read mode */
+ *addr = 0xFF;
+ }
+ printf ("ok.\n");
+ }
+ if (ctrlc ())
+ printf ("User Interrupt!\n");
+
+outahere:
+
+ /* allow flash to settle - wait 10 ms */
+ udelay_masked (10000);
+
+ if (flag)
+ enable_interrupts ();
+
+ return rc;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash
+ */
+
+static int write_word (flash_info_t * info, ulong dest, ushort data)
+{
+ vu_short *addr = (vu_short *) dest, val;
+ int rc = ERR_OK;
+ int flag;
+
+ /* Check if Flash is (sufficiently) erased
+ */
+ if ((*addr & data) != data)
+ return ERR_NOT_ERASED;
+
+ /*
+ * Disable interrupts which might cause a timeout
+ * here. Remember that our exception vectors are
+ * at address 0 in the flash, and we don't want a
+ * (ticker) exception to happen while the flash
+ * chip is in programming mode.
+ */
+ flag = disable_interrupts ();
+
+ /* clear status register command */
+ *addr = 0x50;
+
+ /* program set-up command */
+ *addr = 0x40;
+
+ /* latch address/data */
+ *addr = data;
+
+ /* arm simple, non interrupt dependent timer */
+ reset_timer_masked ();
+
+ /* wait while polling the status register */
+ while (((val = *addr) & 0x80) != 0x80) {
+ if (get_timer_masked () > CONFIG_SYS_FLASH_WRITE_TOUT) {
+ rc = ERR_TIMOUT;
+ /* suspend program command */
+ *addr = 0xB0;
+ goto outahere;
+ }
+ }
+
+ if (val & 0x1A) { /* check for error */
+ printf ("\nFlash write error %02x at address %08lx\n",
+ (int) val, (unsigned long) dest);
+ if (val & (1 << 3)) {
+ printf ("Voltage range error.\n");
+ rc = ERR_PROG_ERROR;
+ goto outahere;
+ }
+ if (val & (1 << 1)) {
+ printf ("Device protect error.\n");
+ rc = ERR_PROTECTED;
+ goto outahere;
+ }
+ if (val & (1 << 4)) {
+ printf ("Programming error.\n");
+ rc = ERR_PROG_ERROR;
+ goto outahere;
+ }
+ rc = ERR_PROG_ERROR;
+ goto outahere;
+ }
+
+outahere:
+ /* read array command */
+ *addr = 0xFF;
+
+ if (flag)
+ enable_interrupts ();
+
+ return rc;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash.
+ */
+
+int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
+{
+ ulong cp, wp;
+ ushort data;
+ int l;
+ int i, rc;
+
+ wp = (addr & ~1); /* get lower word aligned address */
+
+ /*
+ * handle unaligned start bytes
+ */
+ if ((l = addr - wp) != 0) {
+ data = 0;
+ for (i = 0, cp = wp; i < l; ++i, ++cp) {
+ data = (data >> 8) | (*(uchar *) cp << 8);
+ }
+ for (; i < 2 && cnt > 0; ++i) {
+ data = (data >> 8) | (*src++ << 8);
+ --cnt;
+ ++cp;
+ }
+ for (; cnt == 0 && i < 2; ++i, ++cp) {
+ data = (data >> 8) | (*(uchar *) cp << 8);
+ }
+
+ if ((rc = write_word (info, wp, data)) != 0) {
+ return (rc);
+ }
+ wp += 2;
+ }
+
+ /*
+ * handle word aligned part
+ */
+ while (cnt >= 2) {
+ data = *((vu_short *) src);
+ if ((rc = write_word (info, wp, data)) != 0) {
+ return (rc);
+ }
+ src += 2;
+ wp += 2;
+ cnt -= 2;
+ }
+
+ if (cnt == 0) {
+ return ERR_OK;
+ }
+
+ /*
+ * handle unaligned tail bytes
+ */
+ data = 0;
+ for (i = 0, cp = wp; i < 2 && cnt > 0; ++i, ++cp) {
+ data = (data >> 8) | (*src++ << 8);
+ --cnt;
+ }
+ for (; i < 2; ++i, ++cp) {
+ data = (data >> 8) | (*(uchar *) cp << 8);
+ }
+
+ return write_word (info, wp, data);
+}