added boot script files to repository

4 files changed, 1082 insertions, 0 deletions

diff --git a/u-boot/board/cu824/Makefile b/u-boot/board/cu824/Makefile
new file mode 100644
index 0000000..12e4aa6
--- /dev/null
+++ b/u-boot/board/cu824/Makefile
@@ -0,0 +1,44 @@
+#
+# (C) Copyright 2001-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).o
+
+COBJS	= $(BOARD).o flash.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS)
+	$(call cmd_link_o_target, $(OBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/u-boot/board/cu824/README b/u-boot/board/cu824/README
new file mode 100644
index 0000000..cc0d207
--- /dev/null
+++ b/u-boot/board/cu824/README
@@ -0,0 +1,453 @@
+ppcboot for a CU824 board
+---------------------------
+
+CU824 has two banks of flash 8MB each. In board's notation, bank 0 is
+the one at the address of 0xFF800000 and bank 1 is the one at the
+address of 0xFF000000. On power-up the processor jumps to the address
+of 0xFFF00100, the last megabyte of the bank 0 of flash. Thus,
+U-Boot is configured to reside in flash starting at the address of
+0xFFF00000. The environment space is not embedded in the U-Boot code
+and is located in flash separately from U-Boot, at the address of
+0xFF008000.
+
+
+U-Boot test results
+--------------------
+
+x.x Operation on all available serial consoles
+
+x.x.x CONFIG_CONS_INDEX 1
+
+
+ppcboot 0.9.2 (May 13 2001 - 17:56:46)
+
+Initializing...
+  CPU:   MPC8240 Revsion 1.1 at 247 MHz: 16 kB I-Cache 16 kB D-Cache
+  Board: CU824 Revision 1 Local Bus at 99 MHz
+  DRAM:  64 MB
+  FLASH: 16 MB
+  In:    serial
+  Out:   serial
+  Err:   serial
+
+Hit any key to stop autoboot:  0
+=>
+=>he
+go      - start application at address 'addr'
+run     - run commands in an environment variable
+bootm   - boot application image from memory
+bootp   - boot image via network using BootP/TFTP protocol
+tftpboot- boot image via network using TFTP protocol
+	       and env variables ipaddr and serverip
+rarpboot- boot image via network using RARP/TFTP protocol
+bootd   - boot default, i.e., run 'bootcmd'
+loads   - load S-Record file over serial line
+loadb   - load binary file over serial line (kermit mode)
+md      - memory display
+mm      - memory modify (auto-incrementing)
+nm      - memory modify (constant address)
+mw      - memory write (fill)
+cp      - memory copy
+cmp     - memory compare
+crc32   - checksum calculation
+base    - print or set address offset
+printenv- print environment variables
+setenv  - set environment variables
+saveenv - save environment variables to persistent storage
+protect - enable or disable FLASH write protection
+erase   - erase FLASH memory
+flinfo  - print FLASH memory information
+bdinfo  - print Board Info structure
+iminfo  - print header information for application image
+coninfo - print console devices and informations
+loop    - infinite loop on address range
+mtest   - simple RAM test
+icache  - enable or disable instruction cache
+dcache  - enable or disable data cache
+reset   - Perform RESET of the CPU
+echo    - echo args to console
+version - print monitor version
+help    - print online help
+?       - alias for 'help'
+=>
+
+
+x.x.x CONFIG_CONS_INDEX 2
+
+**** NOT TESTED ****
+
+x.x Flash Driver Operation
+
+x.x.x Erase Operation
+
+
+ppcboot 0.9.2 (May 13 2001 - 17:56:46)
+
+Initializing...
+  CPU:   MPC8240 Revsion 1.1 at 247 MHz: 16 kB I-Cache 16 kB D-Cache
+  Board: CU824 Revision 1 Local Bus at 99 MHz
+  DRAM:  64 MB
+  FLASH: 16 MB
+  In:    serial
+  Out:   serial
+  Err:   serial
+
+Hit any key to stop autoboot:  0
+=>
+=>
+=>
+=>md ff000000
+ff000000: 27051956 70706362 6f6f7420 302e382e    '..Vppcboot 0.8.
+ff000010: 3320284d 61792031 31203230 3031202d    3 (May 11 2001 -
+ff000020: 2031343a 35373a30 33290000 00000000     14:57:03)......
+ff000030: 00000000 00000000 00000000 00000000    ................
+ff000040: 00000000 00000000 00000000 00000000    ................
+ff000050: 00000000 00000000 00000000 00000000    ................
+ff000060: 00000000 00000000 00000000 00000000    ................
+ff000070: 00000000 00000000 00000000 00000000    ................
+ff000080: 00000000 00000000 00000000 00000000    ................
+ff000090: 00000000 00000000 00000000 00000000    ................
+ff0000a0: 00000000 00000000 00000000 00000000    ................
+ff0000b0: 00000000 00000000 00000000 00000000    ................
+ff0000c0: 00000000 00000000 00000000 00000000    ................
+ff0000d0: 00000000 00000000 00000000 00000000    ................
+ff0000e0: 00000000 00000000 00000000 00000000    ................
+ff0000f0: 00000000 00000000 00000000 00000000    ................
+=>erase ff000000 ff007fff
+Erase Flash from 0xff000000 to 0xff007fff
+ done
+Erased 1 sectors
+=>md ff000000
+ff000000: ffffffff ffffffff ffffffff ffffffff    ................
+ff000010: ffffffff ffffffff ffffffff ffffffff    ................
+ff000020: ffffffff ffffffff ffffffff ffffffff    ................
+ff000030: ffffffff ffffffff ffffffff ffffffff    ................
+ff000040: ffffffff ffffffff ffffffff ffffffff    ................
+ff000050: ffffffff ffffffff ffffffff ffffffff    ................
+ff000060: ffffffff ffffffff ffffffff ffffffff    ................
+ff000070: ffffffff ffffffff ffffffff ffffffff    ................
+ff000080: ffffffff ffffffff ffffffff ffffffff    ................
+ff000090: ffffffff ffffffff ffffffff ffffffff    ................
+ff0000a0: ffffffff ffffffff ffffffff ffffffff    ................
+ff0000b0: ffffffff ffffffff ffffffff ffffffff    ................
+ff0000c0: ffffffff ffffffff ffffffff ffffffff    ................
+ff0000d0: ffffffff ffffffff ffffffff ffffffff    ................
+ff0000e0: ffffffff ffffffff ffffffff ffffffff    ................
+ff0000f0: ffffffff ffffffff ffffffff ffffffff    ................
+=>
+
+x.x.x Information
+
+
+ppcboot 0.9.2 (May 13 2001 - 17:56:46)
+
+Initializing...
+  CPU:   MPC8240 Revsion 1.1 at 247 MHz: 16 kB I-Cache 16 kB D-Cache
+  Board: CU824 Revision 1 Local Bus at 99 MHz
+  DRAM:  64 MB
+  FLASH: 16 MB
+  In:    serial
+  Out:   serial
+  Err:   serial
+
+Hit any key to stop autoboot:  0
+=>
+=>
+=>
+=>
+=>flinfo
+
+Bank # 1: Intel: 28F160F3B (16Mbit)
+  Size: 8 MB in 39 Sectors
+  Sector Start Addresses:
+    FF000000      FF008000 (RO) FF010000      FF018000      FF020000
+    FF028000      FF030000      FF038000      FF040000      FF080000
+    FF0C0000      FF100000      FF140000      FF180000      FF1C0000
+    FF200000      FF240000      FF280000      FF2C0000      FF300000
+    FF340000      FF380000      FF3C0000      FF400000      FF440000
+    FF480000      FF4C0000      FF500000      FF540000      FF580000
+    FF5C0000      FF600000      FF640000      FF680000      FF6C0000
+    FF700000      FF740000      FF780000      FF7C0000
+
+Bank # 2: Intel: 28F160F3B (16Mbit)
+  Size: 8 MB in 39 Sectors
+  Sector Start Addresses:
+    FF800000      FF808000      FF810000      FF818000      FF820000
+    FF828000      FF830000      FF838000      FF840000      FF880000
+    FF8C0000      FF900000      FF940000      FF980000      FF9C0000
+    FFA00000      FFA40000      FFA80000      FFAC0000      FFB00000
+    FFB40000      FFB80000      FFBC0000      FFC00000      FFC40000
+    FFC80000      FFCC0000      FFD00000      FFD40000      FFD80000
+    FFDC0000      FFE00000      FFE40000      FFE80000      FFEC0000
+    FFF00000 (RO) FFF40000      FFF80000      FFFC0000
+=>
+
+x.x.x Flash Programming
+
+
+ppcboot 0.9.2 (May 13 2001 - 17:56:46)
+
+Initializing...
+  CPU:   MPC8240 Revsion 1.1 at 247 MHz: 16 kB I-Cache 16 kB D-Cache
+  Board: CU824 Revision 1 Local Bus at 99 MHz
+  DRAM:  64 MB
+  FLASH: 16 MB
+  In:    serial
+  Out:   serial
+  Err:   serial
+
+Hit any key to stop autoboot:  0
+=>
+=>
+=>
+=>
+=>cp 0 ff000000 20
+Copy to Flash... done
+=>md 0
+00000000: 0ec08ce0 03f9800c 00000001 040c0000    ................
+00000010: 00000001 03fd1aa0 03fd1ae4 03fd1a00    ................
+00000020: 03fd1a58 03fceb04 03fd34cc 03fd34d0    ...X......4...4.
+00000030: 03fcd5bc 03fcdabc 00000000 00000000    ................
+00000040: 00000000 00000000 00000000 00000000    ................
+00000050: 00000000 00000000 00000000 00000000    ................
+00000060: 00000000 00000000 00000000 00000000    ................
+00000070: 00000000 00000000 00000000 00000000    ................
+00000080: 00000000 00000000 00000000 00000000    ................
+00000090: 00000000 00000000 00000000 00000000    ................
+000000a0: 00000000 00000000 00000000 00000000    ................
+000000b0: 00000000 00000000 00000000 00000000    ................
+000000c0: 00000000 00000000 00000000 00000000    ................
+000000d0: 00000000 00000000 00000000 00000000    ................
+000000e0: 00000000 00000000 00000000 00000000    ................
+000000f0: 00000000 00000000 00000000 00000000    ................
+=>md ff000000
+ff000000: 0ec08ce0 03f9800c 00000001 040c0000    ................
+ff000010: 00000001 03fd1aa0 03fd1ae4 03fd1a00    ................
+ff000020: 03fd1a58 03fceb04 03fd34cc 03fd34d0    ...X......4...4.
+ff000030: 03fcd5bc 03fcdabc 00000000 00000000    ................
+ff000040: 00000000 00000000 00000000 00000000    ................
+ff000050: 00000000 00000000 00000000 00000000    ................
+ff000060: 00000000 00000000 00000000 00000000    ................
+ff000070: 00000000 00000000 00000000 00000000    ................
+ff000080: ffffffff ffffffff ffffffff ffffffff    ................
+ff000090: ffffffff ffffffff ffffffff ffffffff    ................
+ff0000a0: ffffffff ffffffff ffffffff ffffffff    ................
+ff0000b0: ffffffff ffffffff ffffffff ffffffff    ................
+ff0000c0: ffffffff ffffffff ffffffff ffffffff    ................
+ff0000d0: ffffffff ffffffff ffffffff ffffffff    ................
+ff0000e0: ffffffff ffffffff ffffffff ffffffff    ................
+ff0000f0: ffffffff ffffffff ffffffff ffffffff    ................
+=>
+
+x.x.x Storage of environment variables in flash
+
+
+ppcboot 0.9.2 (May 13 2001 - 17:56:46)
+
+Initializing...
+  CPU:   MPC8240 Revsion 1.1 at 247 MHz: 16 kB I-Cache 16 kB D-Cache
+  Board: CU824 Revision 1 Local Bus at 99 MHz
+  DRAM:  64 MB
+  FLASH: 16 MB
+  In:    serial
+  Out:   serial
+  Err:   serial
+
+Hit any key to stop autoboot:  0
+=>
+=>printenv
+bootargs=
+bootcmd=bootm FE020000
+bootdelay=5
+baudrate=9600
+ipaddr=192.168.4.2
+serverip=192.168.4.1
+ethaddr=00:40:42:01:00:a0
+stdin=serial
+stdout=serial
+stderr=serial
+
+Environment size: 167/32764 bytes
+=>setenv myvar 1234
+=>save_env
+Un-Protected 1 sectors
+Erasing Flash...
+ done
+Erased 1 sectors
+Saving Environment to Flash...
+Protected 1 sectors
+=>reset
+
+
+ppcboot 0.9.2 (May 13 2001 - 17:56:46)
+
+Initializing...
+  CPU:   MPC8240 Revsion 1.1 at 247 MHz: 16 kB I-Cache 16 kB D-Cache
+  Board: CU824 Revision 1 Local Bus at 99 MHz
+  DRAM:  64 MB
+  FLASH: 16 MB
+  In:    serial
+  Out:   serial
+  Err:   serial
+
+Hit any key to stop autoboot:  0
+=>
+=>printenv
+bootargs=
+bootcmd=bootm FE020000
+bootdelay=5
+baudrate=9600
+ipaddr=192.168.4.2
+serverip=192.168.4.1
+ethaddr=00:40:42:01:00:a0
+myvar=1234
+stdin=serial
+stdout=serial
+stderr=serial
+
+Environment size: 178/32764 bytes
+=>
+
+x.x Image Download and run over serial port
+
+
+ppcboot 0.9.2 (May 13 2001 - 17:56:46)
+
+Initializing...
+  CPU:   MPC8240 Revsion 1.1 at 247 MHz: 16 kB I-Cache 16 kB D-Cache
+  Board: CU824 Revision 1 Local Bus at 99 MHz
+  DRAM:  64 MB
+  FLASH: 16 MB
+  In:    serial
+  Out:   serial
+  Err:   serial
+
+Hit any key to stop autoboot:  0
+=>
+=>
+=>mw 40000 0 10000
+=>md 40000
+00040000: 00000000 00000000 00000000 00000000    ................
+00040010: 00000000 00000000 00000000 00000000    ................
+00040020: 00000000 00000000 00000000 00000000    ................
+00040030: 00000000 00000000 00000000 00000000    ................
+00040040: 00000000 00000000 00000000 00000000    ................
+00040050: 00000000 00000000 00000000 00000000    ................
+00040060: 00000000 00000000 00000000 00000000    ................
+00040070: 00000000 00000000 00000000 00000000    ................
+00040080: 00000000 00000000 00000000 00000000    ................
+00040090: 00000000 00000000 00000000 00000000    ................
+000400a0: 00000000 00000000 00000000 00000000    ................
+000400b0: 00000000 00000000 00000000 00000000    ................
+000400c0: 00000000 00000000 00000000 00000000    ................
+000400d0: 00000000 00000000 00000000 00000000    ................
+000400e0: 00000000 00000000 00000000 00000000    ................
+000400f0: 00000000 00000000 00000000 00000000    ................
+=>loads
+## Ready for S-Record download ...
+
+(Back at xpert.denx.de)
+[vlad@xpert vlad]$ cat hello_world.srec >/dev/ttyS0
+[vlad@xpert vlad]$ kermit -l /dev/ttyS0 -b 9600 -c
+Connecting to /dev/ttyS0, speed 9600.
+The escape character is Ctrl-\ (ASCII 28, FS)
+Type the escape character followed by C to get back,
+or followed by ? to see other options.
+md 40000
+00040000: 00018148 9421ffe0 7c0802a6 bf61000c    ...H.!..|....a..
+00040010: 90010024 48000005 7fc802a6 801effe8    ...$H...........
+00040020: 7fc0f214 7c7f1b78 813f0038 7c9c2378    ....|..x.?.8|.#x
+00040030: 807e8000 7cbd2b78 80090010 3b600000    .~..|.+x....;`..
+00040040: 7c0803a6 4e800021 813f0038 7f84e378    |...N..!.?.8...x
+00040050: 807e8004 80090010 7c0803a6 4e800021    .~......|...N..!
+00040060: 7c1be000 4181003c 80bd0000 813f0038    |...A..<.....?.8
+00040070: 3bbd0004 2c050000 40820008 80be8008    ;...,...@.......
+00040080: 80090010 7f64db78 807e800c 3b7b0001    .....d.x.~..;{..
+00040090: 7c0803a6 4e800021 7c1be000 4081ffcc    |...N..!|...@...
+000400a0: 813f0038 807e8010 80090010 7c0803a6    .?.8.~......|...
+000400b0: 4e800021 813f0038 80090004 7c0803a6    N..!.?.8....|...
+000400c0: 4e800021 2c030000 4182ffec 813f0038    N..!,...A....?.8
+000400d0: 80090000 7c0803a6 4e800021 813f0038    ....|...N..!.?.8
+000400e0: 807e8014 80090010 7c0803a6 4e800021    .~......|...N..!
+000400f0: 38600000 80010024 7c0803a6 bb61000c    8`.....$|....a..
+=>go 40004
+## Starting application at 0x00040004 ...
+Hello World
+argc = 1
+argv[0] = "40004"
+argv[1] = "<NULL>"
+Hit any key to exit ...
+
+## Application terminated, rc = 0x0
+=>
+
+x.x Image download and run over ethernet interface
+
+
+ppcboot 0.9.2 (May 13 2001 - 17:56:46)
+
+Initializing...
+  CPU:   MPC8240 Revsion 1.1 at 247 MHz: 16 kB I-Cache 16 kB D-Cache
+  Board: CU824 Revision 1 Local Bus at 99 MHz
+  DRAM:  64 MB
+  FLASH: 16 MB
+  In:    serial
+  Out:   serial
+  Err:   serial
+
+Hit any key to stop autoboot:  0
+=>
+=>
+=>mw 40000 0 10000
+=>md 40000
+00040000: 00000000 00000000 00000000 00000000    ................
+00040010: 00000000 00000000 00000000 00000000    ................
+00040020: 00000000 00000000 00000000 00000000    ................
+00040030: 00000000 00000000 00000000 00000000    ................
+00040040: 00000000 00000000 00000000 00000000    ................
+00040050: 00000000 00000000 00000000 00000000    ................
+00040060: 00000000 00000000 00000000 00000000    ................
+00040070: 00000000 00000000 00000000 00000000    ................
+00040080: 00000000 00000000 00000000 00000000    ................
+00040090: 00000000 00000000 00000000 00000000    ................
+000400a0: 00000000 00000000 00000000 00000000    ................
+000400b0: 00000000 00000000 00000000 00000000    ................
+000400c0: 00000000 00000000 00000000 00000000    ................
+000400d0: 00000000 00000000 00000000 00000000    ................
+000400e0: 00000000 00000000 00000000 00000000    ................
+000400f0: 00000000 00000000 00000000 00000000    ................
+=>tftpboot 40000 hello_world.bin
+ARP broadcast 1
+TFTP from server 192.168.4.1; our IP address is 192.168.4.2
+Filename 'hello_world.bin'.
+Load address: 0x40000
+Loading: #############
+done
+Bytes transferred = 65912 (10178 hex)
+=>md 40000
+00040000: 00018148 9421ffe0 7c0802a6 bf61000c    ...H.!..|....a..
+00040010: 90010024 48000005 7fc802a6 801effe8    ...$H...........
+00040020: 7fc0f214 7c7f1b78 813f0038 7c9c2378    ....|..x.?.8|.#x
+00040030: 807e8000 7cbd2b78 80090010 3b600000    .~..|.+x....;`..
+00040040: 7c0803a6 4e800021 813f0038 7f84e378    |...N..!.?.8...x
+00040050: 807e8004 80090010 7c0803a6 4e800021    .~......|...N..!
+00040060: 7c1be000 4181003c 80bd0000 813f0038    |...A..<.....?.8
+00040070: 3bbd0004 2c050000 40820008 80be8008    ;...,...@.......
+00040080: 80090010 7f64db78 807e800c 3b7b0001    .....d.x.~..;{..
+00040090: 7c0803a6 4e800021 7c1be000 4081ffcc    |...N..!|...@...
+000400a0: 813f0038 807e8010 80090010 7c0803a6    .?.8.~......|...
+000400b0: 4e800021 813f0038 80090004 7c0803a6    N..!.?.8....|...
+000400c0: 4e800021 2c030000 4182ffec 813f0038    N..!,...A....?.8
+000400d0: 80090000 7c0803a6 4e800021 813f0038    ....|...N..!.?.8
+000400e0: 807e8014 80090010 7c0803a6 4e800021    .~......|...N..!
+000400f0: 38600000 80010024 7c0803a6 bb61000c    8`.....$|....a..
+=>go 40004
+## Starting application at 0x00040004 ...
+Hello World
+argc = 1
+argv[0] = "40004"
+argv[1] = "<NULL>"
+Hit any key to exit ...
+
+## Application terminated, rc = 0x0
+=>
diff --git a/u-boot/board/cu824/cu824.c b/u-boot/board/cu824/cu824.c
new file mode 100644
index 0000000..720c56f
--- /dev/null
+++ b/u-boot/board/cu824/cu824.c
@@ -0,0 +1,99 @@
+/*
+ * (C) Copyright 2001
+ * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
+ *
+ * (C) Copyright 2001-2006
+ * Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
+
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <mpc824x.h>
+#include <asm/processor.h>
+#include <pci.h>
+#include <netdev.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define BOARD_REV_REG 0xFE80002B
+
+int checkboard (void)
+{
+	char  revision = *(volatile char *)(BOARD_REV_REG);
+	char  buf[32];
+
+	puts ("Board: CU824 ");
+	printf("Revision %d ", revision);
+	printf("Local Bus at %s MHz\n", strmhz(buf, gd->bus_clk));
+
+	return 0;
+}
+
+phys_size_t initdram(int board_type)
+{
+	long size;
+	long new_bank0_end;
+	long mear1;
+	long emear1;
+
+	size = get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MAX_RAM_SIZE);
+
+	new_bank0_end = size - 1;
+	mear1 = mpc824x_mpc107_getreg(MEAR1);
+	emear1 = mpc824x_mpc107_getreg(EMEAR1);
+	mear1 = (mear1  & 0xFFFFFF00) |
+		((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
+	emear1 = (emear1 & 0xFFFFFF00) |
+		((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
+	mpc824x_mpc107_setreg(MEAR1,  mear1);
+	mpc824x_mpc107_setreg(EMEAR1, emear1);
+
+	return (size);
+}
+
+/*
+ * Initialize PCI Devices, report devices found.
+ */
+#ifndef CONFIG_PCI_PNP
+static struct pci_config_table pci_sandpoint_config_table[] = {
+	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID,
+	  pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
+				       PCI_ENET0_MEMADDR,
+				       PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
+
+	{ }
+};
+#endif
+
+struct pci_controller hose = {
+#ifndef CONFIG_PCI_PNP
+	config_table: pci_sandpoint_config_table,
+#endif
+};
+
+void pci_init_board(void)
+{
+	pci_mpc824x_init(&hose);
+}
+
+int board_eth_init(bd_t *bis)
+{
+	return pci_eth_init(bis);
+}
diff --git a/u-boot/board/cu824/flash.c b/u-boot/board/cu824/flash.c
new file mode 100644
index 0000000..bd0f8d3
--- /dev/null
+++ b/u-boot/board/cu824/flash.c
@@ -0,0 +1,486 @@
+/*
+ * (C) Copyright 2001
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <mpc824x.h>
+#include <asm/processor.h>
+
+#if defined(CONFIG_ENV_IS_IN_FLASH)
+# ifndef  CONFIG_ENV_ADDR
+#  define CONFIG_ENV_ADDR	(CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
+# endif
+# ifndef  CONFIG_ENV_SIZE
+#  define CONFIG_ENV_SIZE	CONFIG_ENV_SECT_SIZE
+# endif
+# ifndef  CONFIG_ENV_SECT_SIZE
+#  define CONFIG_ENV_SECT_SIZE  CONFIG_ENV_SIZE
+# endif
+#endif
+
+#define FLASH_BANK_SIZE 0x800000
+#define MAIN_SECT_SIZE  0x40000
+#define PARAM_SECT_SIZE 0x8000
+
+#define BOARD_CTRL_REG 0xFE800013
+
+flash_info_t    flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
+
+static int write_data (flash_info_t *info, ulong dest, ulong *data);
+static void write_via_fpu(vu_long *addr, ulong *data);
+static __inline__ unsigned long get_msr(void);
+static __inline__ void set_msr(unsigned long msr);
+
+/*---------------------------------------------------------------------*/
+#undef	DEBUG_FLASH
+
+/*---------------------------------------------------------------------*/
+#ifdef DEBUG_FLASH
+#define DEBUGF(fmt,args...) printf(fmt ,##args)
+#else
+#define DEBUGF(fmt,args...)
+#endif
+/*---------------------------------------------------------------------*/
+
+/*-----------------------------------------------------------------------
+ */
+
+unsigned long flash_init(void)
+{
+    int i, j;
+    ulong size = 0;
+    volatile unsigned char *bcr = (volatile unsigned char *)(BOARD_CTRL_REG);
+
+    DEBUGF("Write protect was: 0x%02X\n", *bcr);
+    *bcr &= 0x1;	/* FWPT must be 0  */
+    *bcr |= 0x6;	/* FWP0 = FWP1 = 1 */
+    DEBUGF("Write protect is:  0x%02X\n", *bcr);
+
+    for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
+	vu_long *addr = (vu_long *)(CONFIG_SYS_FLASH_BASE + i * FLASH_BANK_SIZE);
+
+	addr[0] = 0x00900090;
+
+	DEBUGF ("Flash bank # %d:\n"
+		"\tManuf. ID @ 0x%08lX: 0x%08lX\n"
+		"\tDevice ID @ 0x%08lX: 0x%08lX\n",
+		i,
+		(ulong)(&addr[0]), addr[0],
+		(ulong)(&addr[2]), addr[2]);
+
+	if ((addr[0] == addr[1]) && (addr[0] == INTEL_MANUFACT) &&
+	    (addr[2] == addr[3]) && (addr[2] == INTEL_ID_28F160F3B))
+	{
+	    flash_info[i].flash_id = (FLASH_MAN_INTEL & FLASH_VENDMASK) |
+				     (INTEL_ID_28F160F3B & FLASH_TYPEMASK);
+	} else {
+	    flash_info[i].flash_id = FLASH_UNKNOWN;
+	    addr[0] = 0xFFFFFFFF;
+	    goto Done;
+	}
+
+	DEBUGF ("flash_id = 0x%08lX\n", flash_info[i].flash_id);
+
+	addr[0] = 0xFFFFFFFF;
+
+	flash_info[i].size = FLASH_BANK_SIZE;
+	flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
+	memset(flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
+	for (j = 0; j < flash_info[i].sector_count; j++) {
+		if (j <= 7) {
+			flash_info[i].start[j] = CONFIG_SYS_FLASH_BASE +
+						 i * FLASH_BANK_SIZE +
+						 j * PARAM_SECT_SIZE;
+		} else {
+			flash_info[i].start[j] = CONFIG_SYS_FLASH_BASE +
+						 i * FLASH_BANK_SIZE +
+						 (j - 7)*MAIN_SECT_SIZE;
+		}
+	}
+	size += flash_info[i].size;
+    }
+
+    /* Protect monitor and environment sectors
+     */
+#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
+#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE + FLASH_BANK_SIZE
+    flash_protect(FLAG_PROTECT_SET,
+	      CONFIG_SYS_MONITOR_BASE,
+	      CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
+	      &flash_info[1]);
+#else
+    flash_protect(FLAG_PROTECT_SET,
+	      CONFIG_SYS_MONITOR_BASE,
+	      CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
+	      &flash_info[0]);
+#endif
+#endif
+
+#if defined(CONFIG_ENV_IS_IN_FLASH) && defined(CONFIG_ENV_ADDR)
+#if CONFIG_ENV_ADDR >= CONFIG_SYS_FLASH_BASE + FLASH_BANK_SIZE
+    flash_protect(FLAG_PROTECT_SET,
+	      CONFIG_ENV_ADDR,
+	      CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1,
+	      &flash_info[1]);
+#else
+    flash_protect(FLAG_PROTECT_SET,
+	      CONFIG_ENV_ADDR,
+	      CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1,
+	      &flash_info[0]);
+#endif
+#endif
+
+Done:
+    return size;
+}
+
+/*-----------------------------------------------------------------------
+ */
+void flash_print_info (flash_info_t * info)
+{
+	int i;
+
+	switch ((i = info->flash_id & FLASH_VENDMASK)) {
+	case (FLASH_MAN_INTEL & FLASH_VENDMASK):
+		printf ("Intel: ");
+		break;
+	default:
+		printf ("Unknown Vendor 0x%04x ", i);
+		break;
+	}
+
+	switch ((i = info->flash_id & FLASH_TYPEMASK)) {
+	case (INTEL_ID_28F160F3B & FLASH_TYPEMASK):
+		printf ("28F160F3B (16Mbit)\n");
+		break;
+	default:
+		printf ("Unknown Chip Type 0x%04x\n", i);
+		goto Done;
+		break;
+	}
+
+	printf ("  Size: %ld MB in %d Sectors\n",
+			info->size >> 20, info->sector_count);
+
+	printf ("  Sector Start Addresses:");
+	for (i = 0; i < info->sector_count; i++) {
+		if ((i % 5) == 0) {
+			printf ("\n   ");
+		}
+		printf (" %08lX%s", info->start[i],
+				info->protect[i] ? " (RO)" : "     ");
+	}
+	printf ("\n");
+
+Done:
+	return;
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+int	flash_erase (flash_info_t *info, int s_first, int s_last)
+{
+	int flag, prot, sect;
+	ulong start, now, last;
+
+	DEBUGF ("Erase flash bank %d sect %d ... %d\n",
+		info - &flash_info[0], s_first, s_last);
+
+	if ((s_first < 0) || (s_first > s_last)) {
+		if (info->flash_id == FLASH_UNKNOWN) {
+			printf ("- missing\n");
+		} else {
+			printf ("- no sectors to erase\n");
+		}
+		return 1;
+	}
+
+	if ((info->flash_id & FLASH_VENDMASK) !=
+	    (FLASH_MAN_INTEL & FLASH_VENDMASK)) {
+		printf ("Can erase only Intel flash types - aborted\n");
+		return 1;
+	}
+
+	prot = 0;
+	for (sect=s_first; sect<=s_last; ++sect) {
+		if (info->protect[sect]) {
+			prot++;
+		}
+	}
+
+	if (prot) {
+		printf ("- Warning: %d protected sectors will not be erased!\n",
+			prot);
+	} else {
+		printf ("\n");
+	}
+
+	start = get_timer (0);
+	last  = start;
+	/* Start erase on unprotected sectors */
+	for (sect = s_first; sect<=s_last; sect++) {
+		if (info->protect[sect] == 0) {	/* not protected */
+			vu_long *addr = (vu_long *)(info->start[sect]);
+
+			DEBUGF ("Erase sect %d @ 0x%08lX\n",
+				sect, (ulong)addr);
+
+			/* Disable interrupts which might cause a timeout
+			 * here.
+			 */
+			flag = disable_interrupts();
+
+			addr[0] = 0x00500050;	/* clear status register */
+			addr[0] = 0x00200020;	/* erase setup */
+			addr[0] = 0x00D000D0;	/* erase confirm */
+
+			addr[1] = 0x00500050;	/* clear status register */
+			addr[1] = 0x00200020;	/* erase setup */
+			addr[1] = 0x00D000D0;	/* erase confirm */
+
+			/* re-enable interrupts if necessary */
+			if (flag)
+				enable_interrupts();
+
+			/* wait at least 80us - let's wait 1 ms */
+			udelay (1000);
+
+			while (((addr[0] & 0x00800080) != 0x00800080) ||
+			       ((addr[1] & 0x00800080) != 0x00800080) ) {
+				if ((now=get_timer(start)) >
+					   CONFIG_SYS_FLASH_ERASE_TOUT) {
+					printf ("Timeout\n");
+					addr[0] = 0x00B000B0; /* suspend erase */
+					addr[0] = 0x00FF00FF; /* to read mode  */
+					return 1;
+				}
+
+				/* show that we're waiting */
+				if ((now - last) > 1000) {  /* every second  */
+					putc ('.');
+					last = now;
+				}
+			}
+
+			addr[0] = 0x00FF00FF;
+		}
+	}
+	printf (" done\n");
+	return 0;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ * 4 - Flash not identified
+ */
+
+#define	FLASH_WIDTH	8	/* flash bus width in bytes */
+
+int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
+{
+	ulong wp, cp, msr;
+	int l, rc, i;
+	ulong data[2];
+	ulong *datah = &data[0];
+	ulong *datal = &data[1];
+
+	DEBUGF ("Flash write_buff: @ 0x%08lx, src 0x%08lx len %ld\n",
+		addr, (ulong)src, cnt);
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		return 4;
+	}
+
+	msr = get_msr();
+	set_msr(msr | MSR_FP);
+
+	wp = (addr & ~(FLASH_WIDTH-1));	/* get lower aligned address */
+
+	/*
+	 * handle unaligned start bytes
+	 */
+	if ((l = addr - wp) != 0) {
+		*datah = *datal = 0;
+
+		for (i = 0, cp = wp; i < l; i++, cp++) {
+			if (i >= 4) {
+				*datah = (*datah << 8) |
+						((*datal & 0xFF000000) >> 24);
+			}
+
+			*datal = (*datal << 8) | (*(uchar *)cp);
+		}
+		for (; i < FLASH_WIDTH && cnt > 0; ++i) {
+			char tmp;
+
+			tmp = *src;
+
+			src++;
+
+			if (i >= 4) {
+				*datah = (*datah << 8) |
+						((*datal & 0xFF000000) >> 24);
+			}
+
+			*datal = (*datal << 8) | tmp;
+
+			--cnt; ++cp;
+		}
+
+		for (; cnt == 0 && i < FLASH_WIDTH; ++i, ++cp) {
+			if (i >= 4) {
+				*datah = (*datah << 8) |
+						((*datal & 0xFF000000) >> 24);
+			}
+
+			*datal = (*datah << 8) | (*(uchar *)cp);
+		}
+
+		if ((rc = write_data(info, wp, data)) != 0) {
+			set_msr(msr);
+			return (rc);
+		}
+
+		wp += FLASH_WIDTH;
+	}
+
+	/*
+	 * handle FLASH_WIDTH aligned part
+	 */
+	while (cnt >= FLASH_WIDTH) {
+		*datah = *(ulong *)src;
+		*datal = *(ulong *)(src + 4);
+		if ((rc = write_data(info, wp, data)) != 0) {
+			set_msr(msr);
+			return (rc);
+		}
+		wp  += FLASH_WIDTH;
+		cnt -= FLASH_WIDTH;
+		src += FLASH_WIDTH;
+	}
+
+	if (cnt == 0) {
+		set_msr(msr);
+		return (0);
+	}
+
+	/*
+	 * handle unaligned tail bytes
+	 */
+	*datah = *datal = 0;
+	for (i = 0, cp = wp; i < FLASH_WIDTH && cnt > 0; ++i, ++cp) {
+		char tmp;
+
+		tmp = *src;
+
+		src++;
+
+		if (i >= 4) {
+			*datah = (*datah << 8) | ((*datal & 0xFF000000) >> 24);
+		}
+
+		*datal = (*datal << 8) | tmp;
+
+		--cnt;
+	}
+
+	for (; i < FLASH_WIDTH; ++i, ++cp) {
+		if (i >= 4) {
+			*datah = (*datah << 8) | ((*datal & 0xFF000000) >> 24);
+		}
+
+		*datal = (*datal << 8) | (*(uchar *)cp);
+	}
+
+	rc = write_data(info, wp, data);
+	set_msr(msr);
+
+	return (rc);
+}
+
+/*-----------------------------------------------------------------------
+ * Write a word to Flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+static int write_data (flash_info_t *info, ulong dest, ulong *data)
+{
+	vu_long *addr = (vu_long *)dest;
+	ulong start;
+	int flag;
+
+	/* Check if Flash is (sufficiently) erased */
+	if (((addr[0] & data[0]) != data[0]) ||
+	    ((addr[1] & data[1]) != data[1]) ) {
+		return (2);
+	}
+	/* Disable interrupts which might cause a timeout here */
+	flag = disable_interrupts();
+
+	addr[0] = 0x00400040;		/* write setup */
+	write_via_fpu(addr, data);
+
+	/* re-enable interrupts if necessary */
+	if (flag)
+		enable_interrupts();
+
+	start = get_timer (0);
+
+	while (((addr[0] & 0x00800080) != 0x00800080) ||
+	       ((addr[1] & 0x00800080) != 0x00800080) ) {
+		if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
+			addr[0] = 0x00FF00FF;	/* restore read mode */
+			return (1);
+		}
+	}
+
+	addr[0] = 0x00FF00FF;	/* restore read mode */
+
+	return (0);
+}
+
+/*-----------------------------------------------------------------------
+ */
+static void write_via_fpu(vu_long *addr, ulong *data)
+{
+	__asm__ __volatile__ ("lfd  1, 0(%0)" : : "r" (data));
+	__asm__ __volatile__ ("stfd 1, 0(%0)" : : "r" (addr));
+}
+/*-----------------------------------------------------------------------
+ */
+static __inline__ unsigned long get_msr(void)
+{
+    unsigned long msr;
+
+    __asm__ __volatile__ ("mfmsr %0" : "=r" (msr) :);
+    return msr;
+}
+
+static __inline__ void set_msr(unsigned long msr)
+{
+    __asm__ __volatile__ ("mtmsr %0" : : "r" (msr));
+}