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author | H. Nikolaus Schaller <hns@goldelico.com> | 2012-03-26 20:55:28 +0200 |
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committer | H. Nikolaus Schaller <hns@goldelico.com> | 2012-03-26 20:55:28 +0200 |
commit | 92988a21ad4c4c9504295ccb580c9f806134471b (patch) | |
tree | 5effc9f14170112450de05c67dafbe8d5034d595 /u-boot/board/etx094 | |
parent | ca2b506783b676c95762c54ea24dcfdaae1947c9 (diff) | |
download | bootable_bootloader_goldelico_gta04-92988a21ad4c4c9504295ccb580c9f806134471b.zip bootable_bootloader_goldelico_gta04-92988a21ad4c4c9504295ccb580c9f806134471b.tar.gz bootable_bootloader_goldelico_gta04-92988a21ad4c4c9504295ccb580c9f806134471b.tar.bz2 |
added boot script files to repository
Diffstat (limited to 'u-boot/board/etx094')
-rw-r--r-- | u-boot/board/etx094/Makefile | 44 | ||||
-rw-r--r-- | u-boot/board/etx094/etx094.c | 386 | ||||
-rw-r--r-- | u-boot/board/etx094/flash.c | 744 | ||||
-rw-r--r-- | u-boot/board/etx094/u-boot.lds | 104 | ||||
-rw-r--r-- | u-boot/board/etx094/u-boot.lds.debug | 142 |
5 files changed, 1420 insertions, 0 deletions
diff --git a/u-boot/board/etx094/Makefile b/u-boot/board/etx094/Makefile new file mode 100644 index 0000000..6dc495c --- /dev/null +++ b/u-boot/board/etx094/Makefile @@ -0,0 +1,44 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS = $(BOARD).o flash.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/u-boot/board/etx094/etx094.c b/u-boot/board/etx094/etx094.c new file mode 100644 index 0000000..d6f638a --- /dev/null +++ b/u-boot/board/etx094/etx094.c @@ -0,0 +1,386 @@ +/* + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <mpc8xx.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* ------------------------------------------------------------------------- */ + +static long int dram_size (long int, long int *, long int); +static void read_hw_vers (void); + +/* ------------------------------------------------------------------------- */ + +#define _NOT_USED_ 0xFFFFFFFF + +const uint sdram_table[] = { + + /* single read (offset 0x00 in upm ram) */ + + 0xEECEFC24, 0x100DFC24, 0xE02FBC04, 0x01AA7C04, + 0x1FB5FC00, 0xFFFFFC05, _NOT_USED_, _NOT_USED_, + + /* burst read (offset 0x08 in upm ram) */ + + 0xEECEFC24, 0x100DFC24, 0xE0FFBC04, 0x10FF7C04, + 0xF0FFFC00, 0xF0FFFC00, 0xF0FFFC00, 0xFFFFFC00, + 0xFFFFFC05, _NOT_USED_, _NOT_USED_, _NOT_USED_, + _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, + + /* single write (offset 0x18 in upm ram) */ + + 0xEECEFC24, 0x100DFC24, 0xE02BBC04, 0x01A27C00, + 0xEFAAFC04, 0x1FB5FC05, _NOT_USED_, _NOT_USED_, + + /* burst write (offset 0x20 in upm ram) */ + + 0xEECEFC24, 0x103DFC24, 0xE0FBBC00, 0x10F77C00, + 0xF0FFFC00, 0xF0FFFC00, 0xF0FFFC04, 0xFFFFFC05, + + /* init part1 (offset 0x28 in upm ram) */ + + 0xEFFAFC3C, 0x1FF4FC34, 0xEFFCBC34, 0x1FFC3C34, + 0xFFFC3C35, _NOT_USED_, _NOT_USED_, _NOT_USED_, + + /* refresh (offset 0x30 in upm ram) */ + + 0xEFFEBC0C, 0x1FFD7C04, 0xFFFFFC04, 0xFFFFFC05, + + /* init part2 (offset 0x34 in upm ram) */ + + 0xFFFEBC04, 0xEFFC3CB4, 0x1FFC3C34, 0xFFFC3C34, + 0xFFFC3C34, 0xEFE83CB4, 0x1FB57C35, _NOT_USED_, + + /* exception (offset 0x3C in upm ram) */ + + 0xFFFFFC05, _NOT_USED_, _NOT_USED_, _NOT_USED_, + +}; + +/* ------------------------------------------------------------------------- */ + + +/* + * Check Board Identity: + * + * Test ETX ID string (ETX_xxx...) + * + * Return 1 always. + */ + +int checkboard (void) +{ + char *s = getenv ("serial#"); + char *e; + + puts ("Board: "); + +#ifdef SB_ETX094 + gd->board_type = 0; /* 0 = 2SDRAM-Device */ +#else + gd->board_type = 1; /* 1 = 1SDRAM-Device */ +#endif + + if (!s || strncmp (s, "ETX_", 4)) { + puts ("### No HW ID - assuming ETX_094\n"); + read_hw_vers (); + return (0); + } + + for (e = s; *e; ++e) { + if (*e == ' ') + break; + } + + for (; s < e; ++s) { + putc (*s); + } + putc ('\n'); + + read_hw_vers (); + return (0); +} + +/* ------------------------------------------------------------------------- */ + +phys_size_t initdram (int board_type) +{ + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; + volatile memctl8xx_t *memctl = &immap->im_memctl; + long int size_b0, size_b1, size8, size9; + + upmconfig (UPMA, (uint *) sdram_table, + sizeof (sdram_table) / sizeof (uint)); + + /* + * Preliminary prescaler for refresh (depends on number of + * banks): This value is selected for four cycles every 62.4 us + * with two SDRAM banks or four cycles every 31.2 us with one + * bank. It will be adjusted after memory sizing. + */ + memctl->memc_mptpr = CONFIG_SYS_MPTPR_1BK_4K; /* MPTPR_PTP_DIV32 0x0200 */ + + /* A3(SDRAM)=0 => Bursttype = Sequential + * A2-A0(SDRAM)=010 => Burst length = 4 + * A4-A6(SDRAM)=010 => CasLat=2 + */ + memctl->memc_mar = 0x00000088; + + /* + * Map controller banks 2 and 3 to the SDRAM banks 2 and 3 at + * preliminary addresses - these have to be modified after the + * SDRAM size has been determined. + */ + memctl->memc_or2 = CONFIG_SYS_OR2_PRELIM; + memctl->memc_br2 = CONFIG_SYS_BR2_PRELIM; + + if (board_type == 0) { /* "L" type boards have only one bank SDRAM */ + memctl->memc_or3 = CONFIG_SYS_OR3_PRELIM; + memctl->memc_br3 = CONFIG_SYS_BR3_PRELIM; + } + + memctl->memc_mamr = CONFIG_SYS_MAMR_8COL & (~(MAMR_PTAE)); /* no refresh yet */ + + udelay (200); + + /* perform SDRAM initializsation sequence */ + + memctl->memc_mcr = 0x80004128; /* SDRAM bank 0 (CS2) - Init Part 1 */ + memctl->memc_mcr = 0x80004734; /* SDRAM bank 0 (CS2) - Init Part 2 */ + udelay (1); + + if (board_type == 0) { /* "L" type boards have only one bank SDRAM */ + memctl->memc_mcr = 0x80006128; /* SDRAM bank 1 (CS3) - Init Part 1 */ + memctl->memc_mcr = 0x80006734; /* SDRAM bank 1 (CS3) - Init Part 2 */ + udelay (1); + } + + memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */ + + udelay (1000); + + /* + * Check Bank 0 Memory Size for re-configuration + * + * try 8 column mode + */ + size8 = dram_size (CONFIG_SYS_MAMR_8COL, (long *) SDRAM_BASE2_PRELIM, + SDRAM_MAX_SIZE); + + udelay (1000); + + /* + * try 9 column mode + */ + size9 = dram_size (CONFIG_SYS_MAMR_9COL, (long *) SDRAM_BASE2_PRELIM, + SDRAM_MAX_SIZE); + + if (size8 < size9) { /* leave configuration at 9 columns */ + size_b0 = size9; +/* debug ("SDRAM Bank 0 in 9 column mode: %ld MB\n", size >> 20); */ + } else { /* back to 8 columns */ + size_b0 = size8; + memctl->memc_mamr = CONFIG_SYS_MAMR_8COL; + udelay (500); +/* debug ("SDRAM Bank 0 in 8 column mode: %ld MB\n", size >> 20); */ + } + + if (board_type == 0) { /* "L" type boards have only one bank SDRAM */ + /* + * Check Bank 1 Memory Size + * use current column settings + * [9 column SDRAM may also be used in 8 column mode, + * but then only half the real size will be used.] + */ + size_b1 = + dram_size (memctl->memc_mamr, (long *) SDRAM_BASE3_PRELIM, + SDRAM_MAX_SIZE); +/* debug ("SDRAM Bank 1: %ld MB\n", size8 >> 20); */ + } else { + size_b1 = 0; + } + + udelay (1000); + + /* + * Adjust refresh rate depending on SDRAM type, both banks + * For types > 128 MBit leave it at the current (fast) rate + */ + if ((size_b0 < 0x02000000) && (size_b1 < 0x02000000)) { + /* reduce to 15.6 us (62.4 us / quad) */ + memctl->memc_mptpr = CONFIG_SYS_MPTPR_2BK_4K; /*DIV16 */ + udelay (1000); + } + + /* + * Final mapping: map bigger bank first + */ + if (size_b1 > size_b0) { /* SDRAM Bank 1 is bigger - map first */ + + memctl->memc_or3 = ((-size_b1) & 0xFFFF0000) | CONFIG_SYS_OR_TIMING_SDRAM; + memctl->memc_br3 = + (CONFIG_SYS_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V; + + if (size_b0 > 0) { + /* + * Position Bank 0 immediately above Bank 1 + */ + memctl->memc_or2 = + ((-size_b0) & 0xFFFF0000) | CONFIG_SYS_OR_TIMING_SDRAM; + memctl->memc_br2 = + ((CONFIG_SYS_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V) + + size_b1; + } else { + unsigned long reg; + + /* + * No bank 0 + * + * invalidate bank + */ + memctl->memc_br2 = 0; + + /* adjust refresh rate depending on SDRAM type, one bank */ + reg = memctl->memc_mptpr; + reg >>= 1; /* reduce to CONFIG_SYS_MPTPR_1BK_8K / _4K */ + memctl->memc_mptpr = reg; + } + + } else { /* SDRAM Bank 0 is bigger - map first */ + + memctl->memc_or2 = ((-size_b0) & 0xFFFF0000) | CONFIG_SYS_OR_TIMING_SDRAM; + memctl->memc_br2 = + (CONFIG_SYS_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V; + + if (size_b1 > 0) { + /* + * Position Bank 1 immediately above Bank 0 + */ + memctl->memc_or3 = + ((-size_b1) & 0xFFFF0000) | CONFIG_SYS_OR_TIMING_SDRAM; + memctl->memc_br3 = + ((CONFIG_SYS_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V) + + size_b0; + } else { + unsigned long reg; + + /* + * No bank 1 + * + * invalidate bank + */ + memctl->memc_br3 = 0; + + /* adjust refresh rate depending on SDRAM type, one bank */ + reg = memctl->memc_mptpr; + reg >>= 1; /* reduce to CONFIG_SYS_MPTPR_1BK_8K / _4K */ + memctl->memc_mptpr = reg; + } + } + + udelay (10000); + + return (size_b0 + size_b1); +} + +/* ------------------------------------------------------------------------- */ + +/* + * Check memory range for valid RAM. A simple memory test determines + * the actually available RAM size between addresses `base' and + * `base + maxsize'. Some (not all) hardware errors are detected: + * - short between address lines + * - short between data lines + */ + +static long int dram_size (long int mamr_value, long int *base, + long int maxsize) +{ + volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; + volatile memctl8xx_t *memctl = &immap->im_memctl; + + memctl->memc_mamr = mamr_value; + + return (get_ram_size(base, maxsize)); +} + +/* ------------------------------------------------------------------------- */ + +/* HW-ID Table (Bits: 2^9;2^7;2^5) */ +#define HW_ID_0 0x0000 +#define HW_ID_1 0x0020 +#define HW_ID_2 0x0080 +#define HW_ID_3 0x00a0 +#define HW_ID_4 0x0200 +#define HW_ID_5 0x0220 +#define HW_ID_6 0x0280 +#define HW_ID_7 0x02a0 + +void read_hw_vers () +{ + unsigned short rd_msk = 0x02A0; + + /* HW-ID pin-definition */ + volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; + + immr->im_ioport.iop_pddir &= ~(rd_msk); + immr->im_ioport.iop_pdpar &= ~(rd_msk); + + /* debug printf("State of PD: %x\n",immr->im_ioport.iop_pddat); */ + + /* Check the HW-ID */ + printf ("HW-Version: "); + switch (immr->im_ioport.iop_pddat & rd_msk) { + case HW_ID_0: + printf ("V0.1 - V0.3 / W97238-Q3162-A1-1-2\n"); + break; + case HW_ID_1: + printf ("V0.9 / W50037-Q1-D6-1\n"); + break; + case HW_ID_2: + printf ("NOT USED - assuming ID#2\n"); + break; + case HW_ID_3: + printf ("NOT USED - assuming ID#3\n"); + break; + case HW_ID_4: + printf ("NOT USED - assuming ID#4\n"); + break; + case HW_ID_5: + printf ("NOT USED - assuming ID#5\n"); + break; + case HW_ID_6: + printf ("NOT USED - assuming ID#6\n"); + break; + case HW_ID_7: + printf ("NOT USED - assuming ID#7\n"); + break; + default: + printf ("###Error###\n"); + break; + } +} + +/* ------------------------------------------------------------------------- */ diff --git a/u-boot/board/etx094/flash.c b/u-boot/board/etx094/flash.c new file mode 100644 index 0000000..fa51c90 --- /dev/null +++ b/u-boot/board/etx094/flash.c @@ -0,0 +1,744 @@ +/* + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <mpc8xx.h> + +flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ + +/*----------------------------------------------------------------------- + * Functions + */ +static ulong flash_get_size (vu_long *addr, flash_info_t *info); +static int write_word (flash_info_t *info, ulong dest, ulong data); +static void flash_get_offsets (ulong base, flash_info_t *info); + +/*----------------------------------------------------------------------- + */ + +unsigned long flash_init (void) +{ + volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; + volatile memctl8xx_t *memctl = &immap->im_memctl; + unsigned long size_b0, size_b1; + int i; + + /* Init: no FLASHes known */ + for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) { + flash_info[i].flash_id = FLASH_UNKNOWN; + } + + /* Static FLASH Bank configuration here - FIXME XXX */ + + size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]); + + if (flash_info[0].flash_id == FLASH_UNKNOWN) { + printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n", + size_b0, size_b0<<20); + } + + size_b1 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]); + + if (size_b1 > size_b0) { + printf ("## ERROR: " + "Bank 1 (0x%08lx = %ld MB) > Bank 0 (0x%08lx = %ld MB)\n", + size_b1, size_b1<<20, + size_b0, size_b0<<20 + ); + flash_info[0].flash_id = FLASH_UNKNOWN; + flash_info[1].flash_id = FLASH_UNKNOWN; + flash_info[0].sector_count = -1; + flash_info[1].sector_count = -1; + flash_info[0].size = 0; + flash_info[1].size = 0; + return (0); + } + + /* Remap FLASH according to real size */ + memctl->memc_or0 = CONFIG_SYS_OR_TIMING_FLASH | (-size_b0 & 0xFFFF8000); +#ifdef CONFIG_FLASH_16BIT + memctl->memc_br0 = (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V | BR_PS_16; /* 16 Bit data port */ +#else + memctl->memc_br0 = (CONFIG_SYS_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_V; +#endif + + /* Re-do sizing to get full correct info */ + size_b0 = flash_get_size((vu_long *)CONFIG_SYS_FLASH_BASE, &flash_info[0]); + + flash_get_offsets (CONFIG_SYS_FLASH_BASE, &flash_info[0]); + +#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE + /* monitor protection ON by default */ + flash_protect(FLAG_PROTECT_SET, + CONFIG_SYS_MONITOR_BASE, + CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1, + &flash_info[0]); +#endif + + if (size_b1) { + memctl->memc_or1 = CONFIG_SYS_OR_TIMING_FLASH | (-size_b1 & 0xFFFF8000); +#ifdef CONFIG_FLASH_16BIT + memctl->memc_br1 = ((CONFIG_SYS_FLASH_BASE + size_b0) & BR_BA_MSK) | + BR_MS_GPCM | BR_V | BR_PS_16; +#else + memctl->memc_br1 = ((CONFIG_SYS_FLASH_BASE + size_b0) & BR_BA_MSK) | + BR_MS_GPCM | BR_V; +#endif + + /* Re-do sizing to get full correct info */ + size_b1 = flash_get_size((vu_long *)(CONFIG_SYS_FLASH_BASE + size_b0), + &flash_info[1]); + + flash_get_offsets (CONFIG_SYS_FLASH_BASE + size_b0, &flash_info[1]); + +#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE + /* monitor protection ON by default */ + flash_protect(FLAG_PROTECT_SET, + CONFIG_SYS_MONITOR_BASE, + CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1, + &flash_info[1]); +#endif + } else { + memctl->memc_br1 = 0; /* invalidate bank */ + + flash_info[1].flash_id = FLASH_UNKNOWN; + flash_info[1].sector_count = -1; + } + + flash_info[0].size = size_b0; + flash_info[1].size = size_b1; + + return (size_b0 + size_b1); +} + +/*----------------------------------------------------------------------- + */ +static void flash_get_offsets (ulong base, flash_info_t *info) +{ + int i; + + if (info->flash_id == FLASH_UNKNOWN) { + return; + } + + if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) { + for (i = 0; i < info->sector_count; i++) { + info->start[i] = base + (i * 0x00002000); + } + return; + } + + /* set up sector start address table */ + if (info->flash_id & FLASH_BTYPE) { + /* set sector offsets for bottom boot block type */ +#ifdef CONFIG_FLASH_16BIT + info->start[0] = base + 0x00000000; + info->start[1] = base + 0x00004000; + info->start[2] = base + 0x00006000; + info->start[3] = base + 0x00008000; + for (i = 4; i < info->sector_count; i++) { + info->start[i] = base + (i * 0x00010000) - 0x00030000; +#else + info->start[0] = base + 0x00000000; + info->start[1] = base + 0x00008000; + info->start[2] = base + 0x0000C000; + info->start[3] = base + 0x00010000; + for (i = 4; i < info->sector_count; i++) { + info->start[i] = base + (i * 0x00020000) - 0x00060000; +#endif + } + } else { + /* set sector offsets for top boot block type */ + i = info->sector_count - 1; + info->start[i--] = base + info->size - 0x00008000; + info->start[i--] = base + info->size - 0x0000C000; + info->start[i--] = base + info->size - 0x00010000; + for (; i >= 0; i--) { + info->start[i] = base + i * 0x00020000; + } + } + +} + +/*----------------------------------------------------------------------- + */ +void flash_print_info (flash_info_t *info) +{ + int i; + + if (info->flash_id == FLASH_UNKNOWN) { + printf ("missing or unknown FLASH type\n"); + return; + } + + switch (info->flash_id & FLASH_VENDMASK) { + case FLASH_MAN_AMD: printf ("AMD "); break; + case FLASH_MAN_FUJ: printf ("FUJITSU "); break; + case FLASH_MAN_SST: printf ("SST "); break; + case FLASH_MAN_STM: printf ("STM "); break; + default: printf ("Unknown Vendor "); break; + } + + switch (info->flash_id & FLASH_TYPEMASK) { + case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n"); + break; + case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n"); + break; + case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n"); + break; + case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n"); + break; + case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n"); + break; + case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n"); + break; + case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n"); + break; + case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n"); + break; + case FLASH_SST200A: printf ("39xF200A (2M = 128K x 16)\n"); + break; + case FLASH_SST400A: printf ("39xF400A (4M = 256K x 16)\n"); + break; + case FLASH_SST800A: printf ("39xF800A (8M = 512K x 16)\n"); + break; + case FLASH_STM800AB: printf ("M29W800AB (8M = 512K x 16)\n"); + break; + default: printf ("Unknown Chip Type\n"); + break; + } + + printf (" Size: %ld MB in %d Sectors\n", + info->size >> 20, info->sector_count); + + printf (" Sector Start Addresses:"); + for (i=0; i<info->sector_count; ++i) { + if ((i % 5) == 0) + printf ("\n "); + printf (" %08lX%s", + info->start[i], + info->protect[i] ? " (RO)" : " " + ); + } + printf ("\n"); + return; +} + +/*----------------------------------------------------------------------- + */ + + +/*----------------------------------------------------------------------- + */ + +/* + * The following code cannot be run from FLASH! + */ + +static ulong flash_get_size (vu_long *addr, flash_info_t *info) +{ + short i; + ulong value; + ulong base = (ulong)addr; + + /* Write auto select command: read Manufacturer ID */ +#ifdef CONFIG_FLASH_16BIT + vu_short *s_addr = (vu_short*)addr; + s_addr[0x5555] = 0x00AA; + s_addr[0x2AAA] = 0x0055; + s_addr[0x5555] = 0x0090; + value = s_addr[0]; + value = value|(value<<16); +#else + addr[0x5555] = 0x00AA00AA; + addr[0x2AAA] = 0x00550055; + addr[0x5555] = 0x00900090; + value = addr[0]; +#endif + + switch (value) { + case AMD_MANUFACT: + info->flash_id = FLASH_MAN_AMD; + break; + case FUJ_MANUFACT: + info->flash_id = FLASH_MAN_FUJ; + break; + case SST_MANUFACT: + info->flash_id = FLASH_MAN_SST; + break; + case STM_MANUFACT: + info->flash_id = FLASH_MAN_STM; + break; + default: + info->flash_id = FLASH_UNKNOWN; + info->sector_count = 0; + info->size = 0; + return (0); /* no or unknown flash */ + } +#ifdef CONFIG_FLASH_16BIT + value = s_addr[1]; + value = value|(value<<16); +#else + value = addr[1]; /* device ID */ +#endif + + switch (value) { + case AMD_ID_LV400T: + info->flash_id += FLASH_AM400T; + info->sector_count = 11; + info->size = 0x00100000; + break; /* => 1 MB */ + + case AMD_ID_LV400B: + info->flash_id += FLASH_AM400B; + info->sector_count = 11; + info->size = 0x00100000; + break; /* => 1 MB */ + + case AMD_ID_LV800T: + info->flash_id += FLASH_AM800T; + info->sector_count = 19; + info->size = 0x00200000; + break; /* => 2 MB */ + + case AMD_ID_LV800B: + info->flash_id += FLASH_AM800B; +#ifdef CONFIG_FLASH_16BIT + info->sector_count = 19; + info->size = 0x00100000; /* => 1 MB */ +#else + info->sector_count = 19; + info->size = 0x00200000; /* => 2 MB */ +#endif + break; + + case AMD_ID_LV160T: + info->flash_id += FLASH_AM160T; + info->sector_count = 35; + info->size = 0x00400000; + break; /* => 4 MB */ + + case AMD_ID_LV160B: + info->flash_id += FLASH_AM160B; +#ifdef CONFIG_FLASH_16BIT + info->sector_count = 35; + info->size = 0x00200000; /* => 2 MB */ +#else + info->sector_count = 35; + info->size = 0x00400000; /* => 4 MB */ +#endif + + break; +#if 0 /* enable when device IDs are available */ + case AMD_ID_LV320T: + info->flash_id += FLASH_AM320T; + info->sector_count = 67; + info->size = 0x00800000; + break; /* => 8 MB */ + + case AMD_ID_LV320B: + info->flash_id += FLASH_AM320B; + info->sector_count = 67; + info->size = 0x00800000; + break; /* => 8 MB */ +#endif + case SST_ID_xF200A: + info->flash_id += FLASH_SST200A; + info->sector_count = 64; /* 39xF200A ID ( 2M = 128K x 16 ) */ + info->size = 0x00080000; + break; + case SST_ID_xF400A: + info->flash_id += FLASH_SST400A; + info->sector_count = 128; /* 39xF400A ID ( 4M = 256K x 16 ) */ + info->size = 0x00100000; + break; + case SST_ID_xF800A: + info->flash_id += FLASH_SST800A; + info->sector_count = 256; /* 39xF800A ID ( 8M = 512K x 16 ) */ + info->size = 0x00200000; + break; /* => 2 MB */ + case STM_ID_x800AB: + info->flash_id += FLASH_STM800AB; + info->sector_count = 19; + info->size = 0x00200000; + break; /* => 2 MB */ + default: + info->flash_id = FLASH_UNKNOWN; + return (0); /* => no or unknown flash */ + + } + + if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) { + printf ("** ERROR: sector count %d > max (%d) **\n", + info->sector_count, CONFIG_SYS_MAX_FLASH_SECT); + info->sector_count = CONFIG_SYS_MAX_FLASH_SECT; + } + + if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) { + for (i = 0; i < info->sector_count; i++) { + info->start[i] = base + (i * 0x00002000); + } + } else { /* AMD and Fujitsu types */ + /* set up sector start address table */ + if (info->flash_id & FLASH_BTYPE) { + /* set sector offsets for bottom boot block type */ +#ifdef CONFIG_FLASH_16BIT + + info->start[0] = base + 0x00000000; + info->start[1] = base + 0x00004000; + info->start[2] = base + 0x00006000; + info->start[3] = base + 0x00008000; + for (i = 4; i < info->sector_count; i++) { + info->start[i] = base + (i * 0x00010000) - 0x00030000; +#else + info->start[0] = base + 0x00000000; + info->start[1] = base + 0x00008000; + info->start[2] = base + 0x0000C000; + info->start[3] = base + 0x00010000; + for (i = 4; i < info->sector_count; i++) { + info->start[i] = base + (i * 0x00020000) - 0x00060000; +#endif + } + } else { + /* set sector offsets for top boot block type */ + i = info->sector_count - 1; + info->start[i--] = base + info->size - 0x00008000; + info->start[i--] = base + info->size - 0x0000C000; + info->start[i--] = base + info->size - 0x00010000; + for (; i >= 0; i--) { + info->start[i] = base + i * 0x00020000; + } + } + + /* check for protected sectors */ + for (i = 0; i < info->sector_count; i++) { + /* read sector protection at sector address: + * (A7 .. A0) = 0x02 + * D0 = 1 if protected + */ +#ifdef CONFIG_FLASH_16BIT + s_addr = (volatile unsigned short *)(info->start[i]); + info->protect[i] = s_addr[2] & 1; +#else + addr = (volatile unsigned long *)(info->start[i]); + info->protect[i] = addr[2] & 1; +#endif + } + } + + /* + * Prevent writes to uninitialized FLASH. + */ + if (info->flash_id != FLASH_UNKNOWN) { +#ifdef CONFIG_FLASH_16BIT + s_addr = (volatile unsigned short *)(info->start[0]); + *s_addr = 0x00F0; /* reset bank */ +#else + addr = (volatile unsigned long *)info->start[0]; + *addr = 0x00F000F0; /* reset bank */ +#endif + + } + return (info->size); +} + + +/*----------------------------------------------------------------------- + */ + +int flash_erase (flash_info_t *info, int s_first, int s_last) +{ + vu_long *addr = (vu_long*)(info->start[0]); + int flag, prot, sect; + ulong start, now, last; +#ifdef CONFIG_FLASH_16BIT + vu_short *s_addr = (vu_short*)addr; +#endif + + if ((s_first < 0) || (s_first > s_last)) { + if (info->flash_id == FLASH_UNKNOWN) { + printf ("- missing\n"); + } else { + printf ("- no sectors to erase\n"); + } + return 1; + } +/*#ifndef CONFIG_FLASH_16BIT + ulong type; + type = (info->flash_id & FLASH_VENDMASK); + if ((type != FLASH_MAN_SST) && (type != FLASH_MAN_STM)) { + printf ("Can't erase unknown flash type %08lx - aborted\n", + info->flash_id); + return; + } +#endif*/ + prot = 0; + for (sect=s_first; sect<=s_last; ++sect) { + if (info->protect[sect]) { + prot++; + } + } + + if (prot) { + printf ("- Warning: %d protected sectors will not be erased!\n", + prot); + } else { + printf ("\n"); + } + + start = get_timer (0); + last = start; + /* Start erase on unprotected sectors */ + for (sect = s_first; sect<=s_last; sect++) { + if (info->protect[sect] == 0) { /* not protected */ +#ifdef CONFIG_FLASH_16BIT + vu_short *s_sect_addr = (vu_short*)(info->start[sect]); +#else + vu_long *sect_addr = (vu_long*)(info->start[sect]); +#endif + /* Disable interrupts which might cause a timeout here */ + flag = disable_interrupts(); + +#ifdef CONFIG_FLASH_16BIT + + /*printf("\ns_sect_addr=%x",s_sect_addr);*/ + s_addr[0x5555] = 0x00AA; + s_addr[0x2AAA] = 0x0055; + s_addr[0x5555] = 0x0080; + s_addr[0x5555] = 0x00AA; + s_addr[0x2AAA] = 0x0055; + s_sect_addr[0] = 0x0030; +#else + addr[0x5555] = 0x00AA00AA; + addr[0x2AAA] = 0x00550055; + addr[0x5555] = 0x00800080; + addr[0x5555] = 0x00AA00AA; + addr[0x2AAA] = 0x00550055; + sect_addr[0] = 0x00300030; +#endif + /* re-enable interrupts if necessary */ + if (flag) + enable_interrupts(); + + /* wait at least 80us - let's wait 1 ms */ + udelay (1000); + +#ifdef CONFIG_FLASH_16BIT + while ((s_sect_addr[0] & 0x0080) != 0x0080) { +#else + while ((sect_addr[0] & 0x00800080) != 0x00800080) { +#endif + if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) { + printf ("Timeout\n"); + return 1; + } + /* show that we're waiting */ + if ((now - last) > 1000) { /* every second */ + putc ('.'); + last = now; + } + } + } + } + + /* reset to read mode */ + addr = (volatile unsigned long *)info->start[0]; +#ifdef CONFIG_FLASH_16BIT + s_addr[0] = 0x00F0; /* reset bank */ +#else + addr[0] = 0x00F000F0; /* reset bank */ +#endif + + printf (" done\n"); + return 0; +} + +/*----------------------------------------------------------------------- + * Copy memory to flash, returns: + * 0 - OK + * 1 - write timeout + * 2 - Flash not erased + * 4 - Flash not identified + */ + +int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) +{ + ulong cp, wp, data; + int i, l, rc; + + if (info->flash_id == FLASH_UNKNOWN) { + return 4; + } + + wp = (addr & ~3); /* get lower word aligned address */ + + /* + * handle unaligned start bytes + */ + if ((l = addr - wp) != 0) { + data = 0; + for (i=0, cp=wp; i<l; ++i, ++cp) { + data = (data << 8) | (*(uchar *)cp); + } + for (; i<4 && cnt>0; ++i) { + data = (data << 8) | *src++; + --cnt; + ++cp; + } + for (; cnt==0 && i<4; ++i, ++cp) { + data = (data << 8) | (*(uchar *)cp); + } + + if ((rc = write_word(info, wp, data)) != 0) { + return (rc); + } + wp += 4; + } + + /* + * handle word aligned part + */ + while (cnt >= 4) { + data = 0; + for (i=0; i<4; ++i) { + data = (data << 8) | *src++; + } + if ((rc = write_word(info, wp, data)) != 0) { + return (rc); + } + wp += 4; + cnt -= 4; + } + + if (cnt == 0) { + return (0); + } + + /* + * handle unaligned tail bytes + */ + data = 0; + for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) { + data = (data << 8) | *src++; + --cnt; + } + for (; i<4; ++i, ++cp) { + data = (data << 8) | (*(uchar *)cp); + } + + return (write_word(info, wp, data)); +} + +/*----------------------------------------------------------------------- + * Write a word to Flash, returns: + * 0 - OK + * 1 - write timeout + * 2 - Flash not erased + */ +static int write_word (flash_info_t *info, ulong dest, ulong data) +{ + vu_long *addr = (vu_long*)(info->start[0]); + +#ifdef CONFIG_FLASH_16BIT + vu_short high_data; + vu_short low_data; + vu_short *s_addr = (vu_short*)addr; +#endif + ulong start; + int flag; + + /* Check if Flash is (sufficiently) erased */ + if ((*((vu_long *)dest) & data) != data) { + return (2); + } + +#ifdef CONFIG_FLASH_16BIT + /* Write the 16 higher-bits */ + /* Disable interrupts which might cause a timeout here */ + flag = disable_interrupts(); + + high_data = ((data>>16) & 0x0000ffff); + + s_addr[0x5555] = 0x00AA; + s_addr[0x2AAA] = 0x0055; + s_addr[0x5555] = 0x00A0; + + *((vu_short *)dest) = high_data; + + + /* re-enable interrupts if necessary */ + if (flag) + enable_interrupts(); + + /* data polling for D7 */ + start = get_timer (0); + while ((*((vu_short *)dest) & 0x0080) != (high_data & 0x0080)) { + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { + return (1); + } + } + + + /* Write the 16 lower-bits */ +#endif + + /* Disable interrupts which might cause a timeout here */ + flag = disable_interrupts(); +#ifdef CONFIG_FLASH_16BIT + dest += 0x2; + low_data = (data & 0x0000ffff); + + s_addr[0x5555] = 0x00AA; + s_addr[0x2AAA] = 0x0055; + s_addr[0x5555] = 0x00A0; + *((vu_short *)dest) = low_data; + +#else + addr[0x5555] = 0x00AA00AA; + addr[0x2AAA] = 0x00550055; + addr[0x5555] = 0x00A000A0; + *((vu_long *)dest) = data; +#endif + + /* re-enable interrupts if necessary */ + if (flag) + enable_interrupts(); + + /* data polling for D7 */ + start = get_timer (0); + +#ifdef CONFIG_FLASH_16BIT + while ((*((vu_short *)dest) & 0x0080) != (low_data & 0x0080)) { +#else + while ((*((vu_long *)dest) & 0x00800080) != (data & 0x00800080)) { +#endif + + if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { + return (1); + } + } + return (0); +} + +/*----------------------------------------------------------------------- + */ diff --git a/u-boot/board/etx094/u-boot.lds b/u-boot/board/etx094/u-boot.lds new file mode 100644 index 0000000..614880b --- /dev/null +++ b/u-boot/board/etx094/u-boot.lds @@ -0,0 +1,104 @@ +/* + * (C) Copyright 2000-2010 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_ARCH(powerpc) + +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .text : + { + /* WARNING - the following is hand-optimized to fit within */ + /* the sector layout of our flash chips! XXX FIXME XXX */ + + arch/powerpc/cpu/mpc8xx/start.o (.text*) + arch/powerpc/cpu/mpc8xx/traps.o (.text*) + net/libnet.o (.text*) + arch/powerpc/cpu/mpc8xx/libmpc8xx.o (.text*) + *(.text.*printf*) + + . = env_offset; + common/env_embedded.o (.text*) + + *(.text*) + } + _etext = .; + PROVIDE (etext = .); + .rodata : + { + *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) + } + + /* Read-write section, merged into data segment: */ + . = (. + 0x00FF) & 0xFFFFFF00; + _erotext = .; + PROVIDE (erotext = .); + .reloc : + { + KEEP(*(.got)) + _GOT2_TABLE_ = .; + KEEP(*(.got2)) + _FIXUP_TABLE_ = .; + KEEP(*(.fixup)) + } + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; + __fixup_entries = (. - _FIXUP_TABLE_)>>2; + + .data : + { + *(.data*) + *(.sdata*) + } + _edata = .; + PROVIDE (edata = .); + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + + . = .; + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + . = ALIGN(256); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(256); + __init_end = .; + + __bss_start = .; + .bss (NOLOAD) : + { + *(.bss*) + *(.sbss*) + *(COMMON) + . = ALIGN(4); + } + _end = . ; + PROVIDE (end = .); +} diff --git a/u-boot/board/etx094/u-boot.lds.debug b/u-boot/board/etx094/u-boot.lds.debug new file mode 100644 index 0000000..be05d8f --- /dev/null +++ b/u-boot/board/etx094/u-boot.lds.debug @@ -0,0 +1,142 @@ +/* + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_ARCH(powerpc) +/* Do we need any of these for elf? + __DYNAMIC = 0; */ +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + .text : + { + /* WARNING - the following is hand-optimized to fit within */ + /* the sector layout of our flash chips! XXX FIXME XXX */ + + arch/powerpc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/traps.o (.text) + arch/powerpc/cpu/mpc8xx/interrupts.o (.text) + arch/powerpc/cpu/mpc8xx/cpu.o (.text) + arch/powerpc/cpu/mpc8xx/cpu_init.o (.text) + arch/powerpc/cpu/mpc8xx/speed.o (.text) + arch/powerpc/cpu/mpc8xx/serial.o (.text) + arch/powerpc/lib/extable.o (.text) + arch/powerpc/lib/ppcstring.o (.text) + lib/string.o (.text) + lib/crc32.o (.text) + common/dlmalloc.o (.text) + . = env_offset; + common/env_embedded.o(.text) + + *(.text) + *(.got1) + } + _etext = .; + PROVIDE (etext = .); + .rodata : + { + *(.rodata) + *(.rodata1) + *(.rodata.str1.4) + *(.eh_frame) + } + .fini : { *(.fini) } =0 + .ctors : { *(.ctors) } + .dtors : { *(.dtors) } + + /* Read-write section, merged into data segment: */ + . = (. + 0x00FF) & 0xFFFFFF00; + _erotext = .; + PROVIDE (erotext = .); + .reloc : + { + *(.got) + _GOT2_TABLE_ = .; + *(.got2) + _FIXUP_TABLE_ = .; + *(.fixup) + } + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; + __fixup_entries = (. - _FIXUP_TABLE_)>>2; + + .data : + { + *(.data) + *(.data1) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + . = ALIGN(256); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(256); + __init_end = .; + + __bss_start = .; + .bss : + { + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + } + _end = . ; + PROVIDE (end = .); +} |