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authorH. Nikolaus Schaller <hns@goldelico.com>2012-10-03 21:17:47 +0200
committerH. Nikolaus Schaller <hns@goldelico.com>2012-10-03 21:17:47 +0200
commit3fee3af1bc6a56c8e4df59fc7b5644c0ea957837 (patch)
tree7ffdc08d6474ecb6597bfae7ca02d66c3ae0f1b1 /u-boot/board
parentabbbee6c9163ea177d4c3681c182293d66203329 (diff)
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fixed pinmux and display initialization
Diffstat (limited to 'u-boot/board')
-rw-r--r--u-boot/board/goldelico/beagleb2/beagleb2.h48
-rw-r--r--u-boot/board/goldelico/beagleb4/beagleb4.h48
-rw-r--r--u-boot/board/goldelico/gta04/backlight.c31
-rw-r--r--u-boot/board/goldelico/gta04/commands.c6
-rw-r--r--u-boot/board/goldelico/gta04/gta04.c2
-rw-r--r--u-boot/board/goldelico/gta04/gta04.h29
-rw-r--r--u-boot/board/goldelico/gta04/jbt6k74.c6
-rw-r--r--u-boot/board/goldelico/gta04/panel.h3
-rw-r--r--u-boot/board/goldelico/gta04b2/COM37H3M05DTC.c4
-rw-r--r--u-boot/board/goldelico/gta04b2/gta04b2.c8
-rw-r--r--u-boot/board/goldelico/gta04b2/gta04b2.h30
-rw-r--r--u-boot/board/goldelico/gta04b2/trf7960.c6
-rw-r--r--u-boot/board/goldelico/gta04b3/LQ070Y3DB3B.c13
-rw-r--r--u-boot/board/goldelico/gta04b3/gta04b3.c8
-rw-r--r--u-boot/board/goldelico/gta04b3/gta04b3.h32
-rw-r--r--u-boot/board/goldelico/gta04b4/LQ050W1LC1B.c12
-rw-r--r--u-boot/board/goldelico/gta04b4/gta04b4.c8
-rw-r--r--u-boot/board/goldelico/gta04b4/gta04b4.h30
18 files changed, 210 insertions, 114 deletions
diff --git a/u-boot/board/goldelico/beagleb2/beagleb2.h b/u-boot/board/goldelico/beagleb2/beagleb2.h
index 049d999..6c65341 100644
--- a/u-boot/board/goldelico/beagleb2/beagleb2.h
+++ b/u-boot/board/goldelico/beagleb2/beagleb2.h
@@ -3,28 +3,28 @@
// GPIO -> BB-Pin -> Expander function
#define MUX_BEAGLE_EXPANDER() \
-MUX_VAL(CP(MMC2_CLK), (IEN | PTD | EN | M1)) /*GPIO_130 -> MCSPI3-CLK -> TRF*/\
-MUX_VAL(CP(MMC2_CLK), (IDIS | PTD | EN | M4)) /*GPIO_130 -> MCSPI3-CLK -> TRF*/\
-MUX_VAL(CP(MMC2_CMD), (IDIS | PTD | EN | M1)) /*GPIO_131 -> MCSPI3-SIMO -> TRF*/\
-MUX_VAL(CP(MMC2_CMD), (IDIS | PTD | EN | M4)) /*GPIO_131 -> MCSPI3-SIMO -> TRF*/\
-MUX_VAL(CP(MMC2_DAT0), (IEN | PTU | EN | M1)) /*GPIO_132 -> MCSPI3-SOMI -> TRF*/\
-MUX_VAL(CP(MMC2_DAT0), (IEN | PTU | EN | M4)) /*GPIO_132 -> MCSPI3-SOMI -> TRF*/\
-MUX_VAL(CP(MMC2_DAT1), (IEN | PTU | EN | M4)) /*GPIO_133 -> UART3-RX (software)*/\
-MUX_VAL(CP(MMC2_DAT2), (IDIS | PTU | EN | M4)) /*GPIO_134 -> UART3-TX (software)*/\
-MUX_VAL(CP(MMC2_DAT3), (IDIS | PTU | EN | M1)) /*GPIO_135 -> MCSPI3-CS0*/\
-MUX_VAL(CP(MMC2_DAT4), (IEN | PTD | EN | M4)) /*GPIO_136 - AUX */\
-MUX_VAL(CP(MMC2_DAT5), (IEN | PTU | EN | M4)) /*GPIO_137 - POWER */\
-MUX_VAL(CP(MMC2_DAT6), (IDIS | PTU | EN | M4)) /*GPIO_138 - UART3-RTS (software) */\
-MUX_VAL(CP(MMC2_DAT7), (IEN | PTU | EN | M4)) /*GPIO_139 - UART3-CTS (software) */\
-MUX_VAL(CP(UART2_RX), (IEN | PTU | EN | M4)) /*GPIO_143 - UART2-RX */\
-MUX_VAL(CP(UART2_CTS), (IDIS | PTU | EN | M4)) /*GPIO_144 - UART2-CTS */\
-MUX_VAL(CP(UART2_RTS), (IDIS | PTU | EN | M4)) /*GPIO_145 - UART2-RTS */\
-MUX_VAL(CP(UART2_TX), (IEN | PTU | EN | M4)) /*GPIO_146 - UART2-TX */\
-MUX_VAL(CP(MCBSP1_CLKR), (IEN | PTD | EN | M4)) /*GPIO_156 - KEYIRQ -> TRF IRQ */\
-MUX_VAL(CP(MCBSP1_FSR), (IEN | PTU | EN | M4)) /*GPIO_157 - PENIRQ */\
-MUX_VAL(CP(MCBSP1_DX), (IDIS | PTD | EN | M4)) /*GPIO_158 - Display STBY */\
-MUX_VAL(CP(MCBSP1_DR), (IDIS | PTD | EN | M4)) /*GPIO_159 - McBSP1-DR -> TRF EN2 */\
-MUX_VAL(CP(MCBSP_CLKS), (IEN | PTU | DIS | M0)) /*McBSP_CLKS */\
-MUX_VAL(CP(MCBSP1_FSX), (IDIS | PTD | EN | M4)) /*GPIO_161 - McBSP1-FSX -> TRF EN */\
-MUX_VAL(CP(MCBSP1_CLKX), (IDIS | PTD | EN | M4)) /*GPIO_162 - McBSP1-CLKX -> UART3 Powerdown */
+MUX_VAL(CP(MMC2_CLK), (IEN | PTD | EN | M1)) /*GPIO_130 / MCSPI3-CLK -> TRF*/\
+MUX_VAL(CP(MMC2_CLK), (IDIS | PTD | EN | M4)) /*GPIO_130 / MCSPI3-CLK -> TRF*/\
+MUX_VAL(CP(MMC2_CMD), (IDIS | PTD | EN | M1)) /*GPIO_131 / MCSPI3-SIMO -> TRF*/\
+MUX_VAL(CP(MMC2_CMD), (IDIS | PTD | EN | M4)) /*GPIO_131 / MCSPI3-SIMO -> TRF*/\
+MUX_VAL(CP(MMC2_DAT0), (IEN | PTU | EN | M1)) /*GPIO_132 / MCSPI3-SOMI -> TRF*/\
+MUX_VAL(CP(MMC2_DAT0), (IEN | PTU | EN | M4)) /*GPIO_132 / MCSPI3-SOMI -> TRF*/\
+MUX_VAL(CP(MMC2_DAT1), (IEN | PTU | EN | M4)) /*GPIO_133 / UART3-RX (software)*/\
+MUX_VAL(CP(MMC2_DAT2), (IDIS | PTU | EN | M4)) /*GPIO_134 / UART3-TX (software)*/\
+MUX_VAL(CP(MMC2_DAT3), (IDIS | PTU | EN | M1)) /*GPIO_135 / MCSPI3-CS0*/\
+MUX_VAL(CP(MMC2_DAT4), (IEN | PTD | EN | M4)) /*GPIO_136 / AUX */\
+MUX_VAL(CP(MMC2_DAT5), (IEN | PTU | EN | M4)) /*GPIO_137 / POWER */\
+MUX_VAL(CP(MMC2_DAT6), (IDIS | PTU | EN | M4)) /*GPIO_138 / UART3-RTS (software) */\
+MUX_VAL(CP(MMC2_DAT7), (IEN | PTU | EN | M4)) /*GPIO_139 / UART3-CTS (software) */\
+MUX_VAL(CP(UART2_RX), (IEN | PTU | EN | M4)) /*GPIO_143 / UART2-RX */\
+MUX_VAL(CP(UART2_CTS), (IDIS | PTU | EN | M4)) /*GPIO_144 / UART2-CTS */\
+MUX_VAL(CP(UART2_RTS), (IDIS | PTU | EN | M4)) /*GPIO_145 / UART2-RTS */\
+MUX_VAL(CP(UART2_TX), (IEN | PTU | EN | M4)) /*GPIO_146 / UART2-TX */\
+MUX_VAL(CP(MCBSP1_CLKR), (IEN | PTD | EN | M4)) /*GPIO_156 / ... - KEYIRQ -> TRF IRQ */\
+MUX_VAL(CP(MCBSP1_FSR), (IEN | PTU | EN | M4)) /*GPIO_157 / ... - PENIRQ */\
+MUX_VAL(CP(MCBSP1_DX), (IDIS | PTD | EN | M4)) /*GPIO_158 / ... - Display STBY */\
+MUX_VAL(CP(MCBSP1_DR), (IDIS | PTD | EN | M4)) /*GPIO_159 / McBSP1-DR -> TRF EN2 */\
+MUX_VAL(CP(MCBSP_CLKS), (IEN | PTU | DIS | M0)) /*GPIO_??? / McBSP_CLKS */\
+MUX_VAL(CP(MCBSP1_FSX), (IDIS | PTD | EN | M4)) /*GPIO_161 / McBSP1-FSX -> TRF EN */\
+MUX_VAL(CP(MCBSP1_CLKX), (IDIS | PTD | EN | M4)) /*GPIO_162 / McBSP1-CLKX -> UART3 Powerdown */
diff --git a/u-boot/board/goldelico/beagleb4/beagleb4.h b/u-boot/board/goldelico/beagleb4/beagleb4.h
index 049d999..6c65341 100644
--- a/u-boot/board/goldelico/beagleb4/beagleb4.h
+++ b/u-boot/board/goldelico/beagleb4/beagleb4.h
@@ -3,28 +3,28 @@
// GPIO -> BB-Pin -> Expander function
#define MUX_BEAGLE_EXPANDER() \
-MUX_VAL(CP(MMC2_CLK), (IEN | PTD | EN | M1)) /*GPIO_130 -> MCSPI3-CLK -> TRF*/\
-MUX_VAL(CP(MMC2_CLK), (IDIS | PTD | EN | M4)) /*GPIO_130 -> MCSPI3-CLK -> TRF*/\
-MUX_VAL(CP(MMC2_CMD), (IDIS | PTD | EN | M1)) /*GPIO_131 -> MCSPI3-SIMO -> TRF*/\
-MUX_VAL(CP(MMC2_CMD), (IDIS | PTD | EN | M4)) /*GPIO_131 -> MCSPI3-SIMO -> TRF*/\
-MUX_VAL(CP(MMC2_DAT0), (IEN | PTU | EN | M1)) /*GPIO_132 -> MCSPI3-SOMI -> TRF*/\
-MUX_VAL(CP(MMC2_DAT0), (IEN | PTU | EN | M4)) /*GPIO_132 -> MCSPI3-SOMI -> TRF*/\
-MUX_VAL(CP(MMC2_DAT1), (IEN | PTU | EN | M4)) /*GPIO_133 -> UART3-RX (software)*/\
-MUX_VAL(CP(MMC2_DAT2), (IDIS | PTU | EN | M4)) /*GPIO_134 -> UART3-TX (software)*/\
-MUX_VAL(CP(MMC2_DAT3), (IDIS | PTU | EN | M1)) /*GPIO_135 -> MCSPI3-CS0*/\
-MUX_VAL(CP(MMC2_DAT4), (IEN | PTD | EN | M4)) /*GPIO_136 - AUX */\
-MUX_VAL(CP(MMC2_DAT5), (IEN | PTU | EN | M4)) /*GPIO_137 - POWER */\
-MUX_VAL(CP(MMC2_DAT6), (IDIS | PTU | EN | M4)) /*GPIO_138 - UART3-RTS (software) */\
-MUX_VAL(CP(MMC2_DAT7), (IEN | PTU | EN | M4)) /*GPIO_139 - UART3-CTS (software) */\
-MUX_VAL(CP(UART2_RX), (IEN | PTU | EN | M4)) /*GPIO_143 - UART2-RX */\
-MUX_VAL(CP(UART2_CTS), (IDIS | PTU | EN | M4)) /*GPIO_144 - UART2-CTS */\
-MUX_VAL(CP(UART2_RTS), (IDIS | PTU | EN | M4)) /*GPIO_145 - UART2-RTS */\
-MUX_VAL(CP(UART2_TX), (IEN | PTU | EN | M4)) /*GPIO_146 - UART2-TX */\
-MUX_VAL(CP(MCBSP1_CLKR), (IEN | PTD | EN | M4)) /*GPIO_156 - KEYIRQ -> TRF IRQ */\
-MUX_VAL(CP(MCBSP1_FSR), (IEN | PTU | EN | M4)) /*GPIO_157 - PENIRQ */\
-MUX_VAL(CP(MCBSP1_DX), (IDIS | PTD | EN | M4)) /*GPIO_158 - Display STBY */\
-MUX_VAL(CP(MCBSP1_DR), (IDIS | PTD | EN | M4)) /*GPIO_159 - McBSP1-DR -> TRF EN2 */\
-MUX_VAL(CP(MCBSP_CLKS), (IEN | PTU | DIS | M0)) /*McBSP_CLKS */\
-MUX_VAL(CP(MCBSP1_FSX), (IDIS | PTD | EN | M4)) /*GPIO_161 - McBSP1-FSX -> TRF EN */\
-MUX_VAL(CP(MCBSP1_CLKX), (IDIS | PTD | EN | M4)) /*GPIO_162 - McBSP1-CLKX -> UART3 Powerdown */
+MUX_VAL(CP(MMC2_CLK), (IEN | PTD | EN | M1)) /*GPIO_130 / MCSPI3-CLK -> TRF*/\
+MUX_VAL(CP(MMC2_CLK), (IDIS | PTD | EN | M4)) /*GPIO_130 / MCSPI3-CLK -> TRF*/\
+MUX_VAL(CP(MMC2_CMD), (IDIS | PTD | EN | M1)) /*GPIO_131 / MCSPI3-SIMO -> TRF*/\
+MUX_VAL(CP(MMC2_CMD), (IDIS | PTD | EN | M4)) /*GPIO_131 / MCSPI3-SIMO -> TRF*/\
+MUX_VAL(CP(MMC2_DAT0), (IEN | PTU | EN | M1)) /*GPIO_132 / MCSPI3-SOMI -> TRF*/\
+MUX_VAL(CP(MMC2_DAT0), (IEN | PTU | EN | M4)) /*GPIO_132 / MCSPI3-SOMI -> TRF*/\
+MUX_VAL(CP(MMC2_DAT1), (IEN | PTU | EN | M4)) /*GPIO_133 / UART3-RX (software)*/\
+MUX_VAL(CP(MMC2_DAT2), (IDIS | PTU | EN | M4)) /*GPIO_134 / UART3-TX (software)*/\
+MUX_VAL(CP(MMC2_DAT3), (IDIS | PTU | EN | M1)) /*GPIO_135 / MCSPI3-CS0*/\
+MUX_VAL(CP(MMC2_DAT4), (IEN | PTD | EN | M4)) /*GPIO_136 / AUX */\
+MUX_VAL(CP(MMC2_DAT5), (IEN | PTU | EN | M4)) /*GPIO_137 / POWER */\
+MUX_VAL(CP(MMC2_DAT6), (IDIS | PTU | EN | M4)) /*GPIO_138 / UART3-RTS (software) */\
+MUX_VAL(CP(MMC2_DAT7), (IEN | PTU | EN | M4)) /*GPIO_139 / UART3-CTS (software) */\
+MUX_VAL(CP(UART2_RX), (IEN | PTU | EN | M4)) /*GPIO_143 / UART2-RX */\
+MUX_VAL(CP(UART2_CTS), (IDIS | PTU | EN | M4)) /*GPIO_144 / UART2-CTS */\
+MUX_VAL(CP(UART2_RTS), (IDIS | PTU | EN | M4)) /*GPIO_145 / UART2-RTS */\
+MUX_VAL(CP(UART2_TX), (IEN | PTU | EN | M4)) /*GPIO_146 / UART2-TX */\
+MUX_VAL(CP(MCBSP1_CLKR), (IEN | PTD | EN | M4)) /*GPIO_156 / ... - KEYIRQ -> TRF IRQ */\
+MUX_VAL(CP(MCBSP1_FSR), (IEN | PTU | EN | M4)) /*GPIO_157 / ... - PENIRQ */\
+MUX_VAL(CP(MCBSP1_DX), (IDIS | PTD | EN | M4)) /*GPIO_158 / ... - Display STBY */\
+MUX_VAL(CP(MCBSP1_DR), (IDIS | PTD | EN | M4)) /*GPIO_159 / McBSP1-DR -> TRF EN2 */\
+MUX_VAL(CP(MCBSP_CLKS), (IEN | PTU | DIS | M0)) /*GPIO_??? / McBSP_CLKS */\
+MUX_VAL(CP(MCBSP1_FSX), (IDIS | PTD | EN | M4)) /*GPIO_161 / McBSP1-FSX -> TRF EN */\
+MUX_VAL(CP(MCBSP1_CLKX), (IDIS | PTD | EN | M4)) /*GPIO_162 / McBSP1-CLKX -> UART3 Powerdown */
diff --git a/u-boot/board/goldelico/gta04/backlight.c b/u-boot/board/goldelico/gta04/backlight.c
index 1e167f0..271a254 100644
--- a/u-boot/board/goldelico/gta04/backlight.c
+++ b/u-boot/board/goldelico/gta04/backlight.c
@@ -36,17 +36,17 @@
#if defined(CONFIG_GOLDELICO_EXPANDER_B2)
-#define GPIO_BACKLIGHT 146 /* = GPT11_PWM (instead of UART2-TX) */
+#define GPIO_BACKLIGHT 57
#define GPT_BACKLIGHT OMAP34XX_GPT11
#elif defined(CONFIG_GOLDELICO_EXPANDER_B3)
-#define GPIO_BACKLIGHT 146 /* = GPT11_PWM (instead of UART2-TX) */
+#define GPIO_BACKLIGHT 57
#define GPT_BACKLIGHT OMAP34XX_GPT11
#elif defined(CONFIG_GOLDELICO_EXPANDER_B4)
-#define GPIO_BACKLIGHT 146 /* = GPT11_PWM (instead of UART2-TX) */
+#define GPIO_BACKLIGHT 57
#define GPT_BACKLIGHT OMAP34XX_GPT11
#else
@@ -96,18 +96,18 @@ int backlight_init(void)
#if USE_PWM
struct gptimer *gpt_base = (struct gptimer *)GPT_BACKLIGHT;
#if defined(CONFIG_OMAP3_GTA04)
- MUX_VAL(CP(GPMC_NCS6), (IEN | PTD | DIS | M3)) /* GPT_11 - Backlight enable*/\
+ MUX_VAL(CP(GPMC_NCS6), (IEN | PTD | DIS | M3)) /* Switch GPIO57 to GPT_11 - Backlight enable*/
#elif defined(CONFIG_OMAP3_BEAGLE)
#if defined(CONFIG_GOLDELICO_EXPANDER_B1)
- MUX_VAL(CP(UART2_RTS), (IEN | PTD | DIS | M2)) /* switch to GPT10 */
+ MUX_VAL(CP(UART2_RTS), (IEN | PTD | DIS | M2)) /* switch GPIO145 to GPT10 */
#elif defined(CONFIG_GOLDELICO_EXPANDER_B2)
- MUX_VAL(CP(UART2_TX), (IEN | PTD | DIS | M2)) /* switch to GPT11 */
+ MUX_VAL(CP(UART2_TX), (IEN | PTD | DIS | M2)) /* switch GPIO146 to GPT11 */
#elif defined(CONFIG_GOLDELICO_EXPANDER_B4)
// tbd.
#else
-#error undefined CONFIG
-#endif
-#endif
+#error undefined CONFIG_OMAP3_
+#endif // defined(CONFIG_GOLDELICO_EXPANDER_B1)
+#endif // defined(CONFIG_OMAP3_BEAGLE)
// writel(value, &gpt_base->registername);
// program registers for generating a 100-1000 Hz PWM signal
// or PWM synchronized to VSYNC (to avoid flicker)
@@ -115,21 +115,21 @@ int backlight_init(void)
#error todo
-#else
-
+#else // USE_PWM
+
#if defined(CONFIG_OMAP3_GTA04)
MUX_VAL(CP(GPMC_NCS6), (IEN | PTD | DIS | M4)) /*GPIO_57 - Backlight enable*/
-#elif defined(CONFIG_OMAP3_BEAGLE)
+#elif defined(CONFIG_OMAP3_BEAGLE)
#if defined(CONFIG_GOLDELICO_EXPANDER_B1)
MUX_VAL(CP(UART2_RTS), (IEN | PTD | DIS | M4)) /*GPIO_145*/
#elif defined(CONFIG_GOLDELICO_EXPANDER_B2)
MUX_VAL(CP(UART2_TX), (IEN | PTD | DIS | M4)) /*GPIO_146*/
#elif defined(CONFIG_GOLDELICO_EXPANDER_B4)
- // tbd.
+// tbd. MUX_VAL(CP(UART2_TX), (IEN | PTD | DIS | M4)) /*GPIO_146*/
#else
-#error undefined CONFIG
-#endif
+#error undefined CONFIG_OMAP3_
#endif
+#endif // USE_PWM
if(omap_request_gpio(GPIO_BACKLIGHT) == 0) // 0 == ok
{
omap_set_gpio_direction(GPIO_BACKLIGHT, 0); // output
@@ -141,7 +141,6 @@ int backlight_init(void)
}
#endif
-
return 0;
}
diff --git a/u-boot/board/goldelico/gta04/commands.c b/u-boot/board/goldelico/gta04/commands.c
index c1ec7b9..107cb17 100644
--- a/u-boot/board/goldelico/gta04/commands.c
+++ b/u-boot/board/goldelico/gta04/commands.c
@@ -204,13 +204,13 @@ static int do_tsc_gloop(int argc, char *const argv[])
int i;
for(i=0; i<8; i++)
{
- int val=(480*read_adc(i))/4096;
+ int val=(displayColumns*read_adc(i))/4096;
int x, y;
printf("%d: %d\n", i, val);
for(y=16*i; y<16*i+16; y++)
{ // draw colored bar depending on current value
- for(x=0; x<480; x++)
- fb[x+480*y]=(x < val)?0xfc00:0x03ff;
+ for(x=0; x<displayColumns; x++)
+ fb[x+displayColumns*y]=(x < val)?0xfc00:0x03ff;
}
}
}
diff --git a/u-boot/board/goldelico/gta04/gta04.c b/u-boot/board/goldelico/gta04/gta04.c
index 28baaa4..92df3ef 100644
--- a/u-boot/board/goldelico/gta04/gta04.c
+++ b/u-boot/board/goldelico/gta04/gta04.c
@@ -307,7 +307,7 @@ int misc_init_r(void)
void set_muxconf_regs(void)
{
MUX_BEAGLE();
- MUX_BEAGLE_GTA04();
+ MUX_GTA04();
}
#ifdef CONFIG_GENERIC_MMC
diff --git a/u-boot/board/goldelico/gta04/gta04.h b/u-boot/board/goldelico/gta04/gta04.h
index 744068d..8249518 100644
--- a/u-boot/board/goldelico/gta04/gta04.h
+++ b/u-boot/board/goldelico/gta04/gta04.h
@@ -430,12 +430,12 @@ MUX_VAL(CP(SYS_BOOT6), (IDIS | PTD | DIS | M3)) /*DSS_DATA23*/
#if defined(CONFIG_I2C_OMAP_GTA04A2)
-#define MUX_BEAGLE_GTA04() \
-MUX_VAL(CP(ETK_CLK_ES2), (IDIS | PTU | EN | M4)) /*GPIO_12 - Display serial clock*/\
+#define MUX_GTA04() \
+MUX_VAL(CP(ETK_CLK_ES2), (IDIS | PTU | EN | M4)) /*GPIO_12 / McBSP5-CLKX - Display serial clock*/\
MUX_VAL(CP(ETK_CTL_ES2), (IDIS | PTU | EN | M4)) /*GPIO_13 - IrDA FIR-SEL*/\
-MUX_VAL(CP(ETK_D4_ES2), (IEN | PTU | DIS | M4)) /*GPIO_18 - Display DIN*/\
-MUX_VAL(CP(ETK_D5_ES2), (IDIS | PTU | EN | M4)) /*GPIO_19 - Display chip select*/\
-MUX_VAL(CP(ETK_D6_ES2), (IDIS | PTU | EN | M4)) /*GPIO_20 - Display DOUT*/\
+MUX_VAL(CP(ETK_D4_ES2), (IEN | PTU | DIS | M4)) /*GPIO_18 / McBSP5-DR - Display DIN*/\
+MUX_VAL(CP(ETK_D5_ES2), (IDIS | PTU | EN | M4)) /*GPIO_19 / McBSP5-FSX - Display chip select*/\
+MUX_VAL(CP(ETK_D6_ES2), (IDIS | PTU | EN | M4)) /*GPIO_20 / McBSP5-DX - Display DOUT*/\
MUX_VAL(CP(ETK_D7_ES2), (IEN | PTU | EN | M4)) /*GPIO_21 - RS232 enable*/\
MUX_VAL(CP(GPMC_NCS6), (IDIS | PTD | DIS | M4)) /*GPIO_57/GPT_11 - Backlight enable*/\
MUX_VAL(CP(GPMC_WAIT3), (IDIS | PTU | DIS | M4)) /*GPIO_65 - AUX IN/OUT*/\
@@ -453,10 +453,10 @@ MUX_VAL(CP(MMC2_DAT4), (IEN | PTU | EN | M1)) /*GPIO_136 - MMC2_DIR_DAT0 */\
MUX_VAL(CP(MMC2_DAT5), (IEN | PTU | EN | M1)) /*GPIO_137 - MMC2_DIR_DAT1 */\
MUX_VAL(CP(MMC2_DAT6), (IEN | PTU | EN | M1)) /*GPIO_138 - MMC2_DIR_CMD */\
MUX_VAL(CP(MMC2_DAT7), (IEN | PTU | EN | M1)) /*GPIO_139 - MMC2_DIR_CLKIN */\
-MUX_VAL(CP(UART2_CTS), (IEN | PTU | DIS | M4)) /*GPIO_144 - ext Ant */\
-MUX_VAL(CP(UART2_RTS), (IDIS | PTD | DIS | M4)) /*GPIO_145 - GPS ON(0)/OFF(1)*/\
-MUX_VAL(CP(UART2_TX), (IDIS | PTU | DIS | M0)) /*GPIO_146 - GPS_TX */\
-MUX_VAL(CP(UART2_RX), (IEN | PTU | DIS | M0)) /*GPIO_147 - GPS_RX */\
+MUX_VAL(CP(UART2_CTS), (IEN | PTU | DIS | M4)) /*GPIO_144 / UART2-CTS - ext Ant */\
+MUX_VAL(CP(UART2_RTS), (IDIS | PTD | DIS | M4)) /*GPIO_145 / UART2-RTS - GPS ON(0)/OFF(1)*/\
+MUX_VAL(CP(UART2_TX), (IDIS | PTU | DIS | M0)) /*GPIO_146 / UART2-TX - GPS_TX */\
+MUX_VAL(CP(UART2_RX), (IEN | PTU | DIS | M0)) /*GPIO_147 / UART2-RX - GPS_RX */\
MUX_VAL(CP(MCBSP1_CLKR), (IDIS | PTD | DIS | M0)) /*GPIO_156 - FM TRX*/\
MUX_VAL(CP(MCBSP1_FSR), (IEN | PTU | EN | M0)) /*GPIO_157 - */\
MUX_VAL(CP(MCBSP1_DX), (IDIS | PTD | EN | M0)) /*GPIO_158 - */\
@@ -477,8 +477,7 @@ MUX_VAL(CP(MCSPI1_CS2), (IEN | PTD | DIS | M4)) /*GPIO_176/MMC3CLK - 3G_WOE */
#else // GTA04A3ff has some improved mux assignments
-#define MUX_BEAGLE_GTA04() \
-/*GPIO10 - Keyboard Controller INT - n/a*/\
+#define MUX_GTA04() \
MUX_VAL(CP(ETK_CLK_ES2), (IDIS | PTU | EN | M4)) /*GPIO_12 - Display serial clock*/\
MUX_VAL(CP(ETK_CTL_ES2), (IEN | PTU | EN | M4)) /*GPIO_13 - RS232 enable*/\
MUX_VAL(CP(ETK_D4_ES2), (IEN | PTU | DIS | M4)) /*GPIO_18 - Display DIN*/\
@@ -524,10 +523,10 @@ MUX_VAL(CP(MCBSP1_DR), (IEN | PTU | DIS | M0)) /*GPIO_159 -> MCBSP1_DR */\
MUX_VAL(CP(MCBSP_CLKS), (IEN | PTU | DIS | M4)) /*GPIO_160 - PENIRQ*/\
MUX_VAL(CP(MCBSP1_FSX), (IDIS | PTU | EN | M0)) /*GPIO_161 -> MCBSP1_FSX */\
MUX_VAL(CP(MCBSP1_CLKX), (IDIS | PTD | EN | M0)) /*GPIO_162 -> MCBSP1_CLKX */\
-MUX_VAL(CP(MCBSP4_CLKX), (IEN | PTD | DIS | M0)) /*MCBSP4_CLKX*/\
-MUX_VAL(CP(MCBSP4_DR), (IEN | PTD | DIS | M0)) /*MCBSP4_DR*/\
-MUX_VAL(CP(MCBSP4_DX), (IEN | PTD | DIS | M0)) /*MCBSP4_DX*/\
-MUX_VAL(CP(MCBSP4_FSX), (IEN | PTD | DIS | M0)) /*MCBSP4_FSX*/\
+MUX_VAL(CP(MCBSP4_CLKX), (IEN | PTD | DIS | M0)) /*GPIO_152 / MCBSP4_CLKX*/\
+MUX_VAL(CP(MCBSP4_DR), (IEN | PTD | DIS | M0)) /*GPIO_153 / MCBSP4_DR*/\
+MUX_VAL(CP(MCBSP4_DX), (IEN | PTD | DIS | M0)) /*GPIO_154 / MCBSP4_DX*/\
+MUX_VAL(CP(MCBSP4_FSX), (IEN | PTD | DIS | M0)) /*GPIO_155 / MCBSP4_FSX*/\
MUX_VAL(CP(HDQ_SIO), (IEN | PTU | EN | M0)) /*GPIO_170 -> HDQ*/\
MUX_VAL(CP(MCSPI1_CLK), (IEN | PTU | EN | M4)) /*GPIO_171 - Version sense*/\
MUX_VAL(CP(MCSPI1_SIMO), (IEN | PTU | EN | M4)) /*GPIO_172 - Version sense*/\
diff --git a/u-boot/board/goldelico/gta04/jbt6k74.c b/u-boot/board/goldelico/gta04/jbt6k74.c
index fd66af9..40ef8f6 100644
--- a/u-boot/board/goldelico/gta04/jbt6k74.c
+++ b/u-boot/board/goldelico/gta04/jbt6k74.c
@@ -36,6 +36,7 @@
#include <twl4030.h>
#include "dssfb.h"
#include "panel.h"
+#include "backlight.h"
#include "TD028TTEC1.h"
// FIXME: we have somehow mixed up the file names...
@@ -74,6 +75,9 @@
#define DEBUGPC(x, args...) do { } while (0)
#endif
+int displayColumns=HDISP;
+int displayLines=VDISP;
+
static /*const*/ struct panel_config lcm_cfg =
{
.timing_h = ((HBP-1)<<20) | ((HFP-1)<<8) | ((HS-1)<<0), /* Horizantal timing */
@@ -377,7 +381,7 @@ int board_video_init(GraphicDevice *pGD)
if (get_cpu_family() == CPU_OMAP36XX)
lcm_cfg.divisor = (0x0001<<16)|(DSS1_FCLK3730/PIXEL_CLOCK); /* get Pixel Clock divisor from dss1_fclk */
dssfb_init(&lcm_cfg);
-
+
printf("did board_video_init()\n");
return 0;
}
diff --git a/u-boot/board/goldelico/gta04/panel.h b/u-boot/board/goldelico/gta04/panel.h
index 98c97fc..490a7f7 100644
--- a/u-boot/board/goldelico/gta04/panel.h
+++ b/u-boot/board/goldelico/gta04/panel.h
@@ -16,4 +16,7 @@ int panel_enter_state(enum panel_state new_state);
const char *panel_state(void);
int board_video_init(GraphicDevice *pGD);
+extern int displayColumns;
+extern int displayLines;
+
#endif
diff --git a/u-boot/board/goldelico/gta04b2/COM37H3M05DTC.c b/u-boot/board/goldelico/gta04b2/COM37H3M05DTC.c
index 68337c4..fdc95f5 100644
--- a/u-boot/board/goldelico/gta04b2/COM37H3M05DTC.c
+++ b/u-boot/board/goldelico/gta04b2/COM37H3M05DTC.c
@@ -31,6 +31,7 @@
#include <twl4030.h>
#include "../gta04/dssfb.h"
#include "../gta04/panel.h"
+#include "../gta04/backlight.h"
#include "COM37H3M05DTC.h"
#ifndef CONFIG_GOLDELICO_EXPANDER_B2
@@ -75,6 +76,9 @@
#define HBL (HS+HBP+HFP) // horizontal blanking period
#define HP (HDISP+HBL) // horizontal cycle
+int displayColumns=HDISP;
+int displayLines=VDISP;
+
static /*const*/ struct panel_config lcm_cfg =
{
.timing_h = ((HBP-1)<<20) | ((HFP-1)<<8) | ((HS-1)<<0), /* Horizantal timing */
diff --git a/u-boot/board/goldelico/gta04b2/gta04b2.c b/u-boot/board/goldelico/gta04b2/gta04b2.c
index 3675a89..d1cc2a8 100644
--- a/u-boot/board/goldelico/gta04b2/gta04b2.c
+++ b/u-boot/board/goldelico/gta04b2/gta04b2.c
@@ -13,12 +13,12 @@
void muxinit(void)
{
- MUX_BEAGLE();
- MUX_BEAGLE_EXPANDER();
+ MUX_GTA04();
+ MUX_EXPANDER_B2();
}
-#undef MUX_BEAGLE
-#define MUX_BEAGLE() muxinit()
+#undef MUX_GTA04
+#define MUX_GTA04() muxinit()
// take the original beagle.c code
#include "../gta04/gta04.c"
diff --git a/u-boot/board/goldelico/gta04b2/gta04b2.h b/u-boot/board/goldelico/gta04b2/gta04b2.h
index 668f5f9..d943e02 100644
--- a/u-boot/board/goldelico/gta04b2/gta04b2.h
+++ b/u-boot/board/goldelico/gta04b2/gta04b2.h
@@ -1,8 +1,34 @@
-// all pins on GTA04 expansion connector
+// all reuseable pins on GTA04 expansion connector
// GPIO -> GTA04-Pin -> Expander function
-#define MUX_BEAGLE_EXPANDER() \
+#define MUX_EXPANDER_B2() \
+MUX_VAL(CP(SYS_CLKOUT1), (IDIS | PTD | DIS | M4)) /*GPIO_10 / KEYIRQ - TRF-IRQ*/\
+MUX_VAL(CP(ETK_CLK_ES2), (IDIS | PTD | EN | M4)) /*GPIO_12 / McBSP5-CLKX - Enable 3.3V LDO for display*/\
+MUX_VAL(CP(ETK_D0), (IEN | PTD | EN | M1)) /*GPIO_14 / MCSPI3-SIMO -> TRF*/\
+MUX_VAL(CP(ETK_D1), (IEN | PTD | EN | M1)) /*GPIO_15 / MCSPI3-SOMI -> TRF*/\
+MUX_VAL(CP(ETK_D2), (IEN | PTD | EN | M1)) /*GPIO_16 / MCSPI3-CS -> TRF*/\
+MUX_VAL(CP(ETK_D3), (IEN | PTD | EN | M1)) /*GPIO_17 / MCSPI3-CLK -> TRF*/\
+MUX_VAL(CP(ETK_D4_ES2), (IDIS | PTU | EN | M4)) /*GPIO_18 / McBSP5-DR - drives RS232 EXT line*/\
+MUX_VAL(CP(ETK_D5_ES2), (IDIS | PTD | EN | M4)) /*GPIO_19 / McBSP5-FSX - TRF79x0 EN/EN2*/\
+MUX_VAL(CP(ETK_D6_ES2), (IDIS | PTD | EN | M4)) /*GPIO_20 / McBSP5-DX - Enable 5V on VBUS*/\
+MUX_VAL(CP(UART2_CTS), (IEN | PTU | DIS | M4)) /*GPIO_144 / UART2-CTS - ext Ant */\
+MUX_VAL(CP(UART2_RTS), (IDIS | PTD | DIS | M4)) /*GPIO_145 / UART2-RTS - GPS ON(0)/OFF(1)*/\
+MUX_VAL(CP(UART2_TX), (IDIS | PTU | DIS | M0)) /*GPIO_146 / UART2-TX - GPS_TX */\
+MUX_VAL(CP(UART2_RX), (IEN | PTU | DIS | M0)) /*GPIO_147 / UART2-RX - GPS_RX */\
+MUX_VAL(CP(MCBSP4_CLKX), (IEN | PTD | DIS | M0)) /*GPIO_152 / MCBSP4_CLKX*/\
+MUX_VAL(CP(MCBSP4_DR), (IEN | PTD | DIS | M0)) /*GPIO_153 / MCBSP4_DR*/\
+MUX_VAL(CP(MCBSP4_DX), (IEN | PTD | DIS | M0)) /*GPIO_154 / MCBSP4_DX*/\
+MUX_VAL(CP(MCBSP4_FSX), (IEN | PTD | DIS | M0)) /*GPIO_155 / MCBSP4_FSX*/\
+MUX_VAL(CP(MCBSP_CLKS), (IDIS | PTD | DIS | M4)) /*GPIO_160 / PENIRQ*/\
+
+#if 0
+MUX_VAL(CP(UART3_CTS_RCTX), (IDIS | PTD | DIS | M0)) /*GPIO_163 / UART3-CTS*/\
+MUX_VAL(CP(UART3_RTS_SD), (IDIS | PTD | DIS | M0)) /*GPIO_164 / UART3-RTS*/\
+MUX_VAL(CP(UART3_RX_IRRX), (IDIS | PTD | DIS | M0)) /*GPIO_165 / UART3-RX*/\
+MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)) /*GPIO_166 / UART3-TX*/\
+
+#endif
// FIXME: clean up so that we have the right PinMuxes
#if 0
diff --git a/u-boot/board/goldelico/gta04b2/trf7960.c b/u-boot/board/goldelico/gta04b2/trf7960.c
index fd90792..8744748 100644
--- a/u-boot/board/goldelico/gta04b2/trf7960.c
+++ b/u-boot/board/goldelico/gta04b2/trf7960.c
@@ -663,7 +663,7 @@ int scanInventory(struct trf7960 *device, uchar flags, uchar length, void (*foun
int readBlocks(struct trf7960 *device, uchar flags, uint64_t uid, uchar firstBlock, uchar blocks, uchar *data)
{ /* read single/multiple blocks */
static uchar buffer[32]; /* shared rx/tx buffer */
- char *rxbuf;
+ uchar *rxbuf;
int pdusize = 4 + (uid?sizeof(uid):0); /* flags byte + command byte + optional uid + firstblock + #blocks */
#if 1
printf("readBlocks\n");
@@ -675,7 +675,7 @@ int readBlocks(struct trf7960 *device, uchar flags, uint64_t uid, uchar firstBlo
if(writeRegister(device, TRF7960_REG_IRQMASK, 0x3f)) /* enable no-response interrupt */
return -1;
- rxbuf=malloc(2+32*blocks); // allocate enough memory for storing 32*blocks bytes
+ rxbuf=(uchar *) malloc(2+32*blocks); // allocate enough memory for storing 32*blocks bytes
if(!rxbuf)
return -1; // can't allocate
@@ -728,7 +728,7 @@ int readBlocks(struct trf7960 *device, uchar flags, uint64_t uid, uchar firstBlo
#if 1
printf("tx done %02x\n", device->done);
#endif
- if(!device->done & 0x80) {
+ if(!(device->done & 0x80)) {
#if 1
printf(" unknown TX interrupt %02x\n", device->done);
#endif
diff --git a/u-boot/board/goldelico/gta04b3/LQ070Y3DB3B.c b/u-boot/board/goldelico/gta04b3/LQ070Y3DB3B.c
index 5a77210..89968ec 100644
--- a/u-boot/board/goldelico/gta04b3/LQ070Y3DB3B.c
+++ b/u-boot/board/goldelico/gta04b3/LQ070Y3DB3B.c
@@ -31,6 +31,7 @@
#include <twl4030.h>
#include "../gta04/dssfb.h"
#include "../gta04/panel.h"
+#include "../gta04/backlight.h"
#include "LQ070Y3DB3B.h"
#ifndef CONFIG_GOLDELICO_EXPANDER_B3
@@ -41,7 +42,7 @@
#ifdef CONFIG_OMAP3_GTA04
-#define GPIO_STBY 20
+#define GPIO_STBY 12
#elif CONFIG_OMAP3_BEAGLE
@@ -75,14 +76,17 @@
#define HBL (HS+HBP+HFP) // horizontal blanking period
#define HP (HDISP+HBL) // horizontal cycle
+int displayColumns=HDISP;
+int displayLines=VDISP;
+
static /*const*/ struct panel_config lcm_cfg =
{
.timing_h = ((HBP-1)<<20) | ((HFP-1)<<8) | ((HS-1)<<0), /* Horizantal timing */
.timing_v = ((VBP+0)<<20) | ((VFP+0)<<8) | ((VS-1)<<0), /* Vertical timing */
- // negative clock edge
- // negative sync pulse
+ // negative clock edge samples data; changes on positive edge
+ // negative sync pulses
// positive DE pulse
- .pol_freq = (1<<17)|(1<<16)|(0<<15)|(0<<14)|(1<<13)|(1<<12)|0x28, /* Pol Freq */
+ .pol_freq = (1<<17)|(1<<16)|(0<<15)|(0<<14)|(1<<13)|(1<<12)|0x28, /* DISPC_POL_FREQ */
.divisor = (0x0001<<16)|(DSS1_FCLK/PIXEL_CLOCK), /* Pixel Clock divisor from dss1_fclk */
.lcd_size = ((HDISP-1)<<0) | ((VDISP-1)<<16), /* as defined by LCM */
.panel_type = 0x01, /* TFT */
@@ -94,6 +98,7 @@ static /*const*/ struct panel_config lcm_cfg =
int panel_reg_init(void)
{
omap_request_gpio(GPIO_STBY);
+ printf("panel_reg_init() GPIO_%d\n", GPIO_STBY);
omap_set_gpio_direction(GPIO_STBY, 0); // output
return 0;
}
diff --git a/u-boot/board/goldelico/gta04b3/gta04b3.c b/u-boot/board/goldelico/gta04b3/gta04b3.c
index 99e4e5f..4744efd 100644
--- a/u-boot/board/goldelico/gta04b3/gta04b3.c
+++ b/u-boot/board/goldelico/gta04b3/gta04b3.c
@@ -13,12 +13,12 @@
void muxinit(void)
{
- MUX_BEAGLE();
- MUX_BEAGLE_EXPANDER();
+ MUX_GTA04();
+ MUX_EXPANDER_B3();
}
-#undef MUX_BEAGLE
-#define MUX_BEAGLE() muxinit()
+#undef MUX_GTA04
+#define MUX_GTA04() muxinit()
// take the original beagle.c code
#include "../gta04/gta04.c"
diff --git a/u-boot/board/goldelico/gta04b3/gta04b3.h b/u-boot/board/goldelico/gta04b3/gta04b3.h
index 668f5f9..200c7b4 100644
--- a/u-boot/board/goldelico/gta04b3/gta04b3.h
+++ b/u-boot/board/goldelico/gta04b3/gta04b3.h
@@ -1,13 +1,39 @@
-// all pins on GTA04 expansion connector
+// all reuseable pins on GTA04 expansion connector
// GPIO -> GTA04-Pin -> Expander function
-#define MUX_BEAGLE_EXPANDER() \
+#define MUX_EXPANDER_B3() \
+MUX_VAL(CP(SYS_CLKOUT1), (IDIS | PTD | DIS | M4)) /*GPIO_10 / KEYIRQ - TRF-IRQ*/\
+MUX_VAL(CP(ETK_CLK_ES2), (IDIS | PTD | EN | M4)) /*GPIO_12 / McBSP5-CLKX - Enable 3.3V LDO for display*/\
+MUX_VAL(CP(ETK_D0), (IEN | PTD | EN | M1)) /*GPIO_14 / MCSPI3-SIMO -> TRF*/\
+MUX_VAL(CP(ETK_D1), (IEN | PTD | EN | M1)) /*GPIO_15 / MCSPI3-SOMI -> TRF*/\
+MUX_VAL(CP(ETK_D2), (IEN | PTD | EN | M1)) /*GPIO_16 / MCSPI3-CS -> TRF*/\
+MUX_VAL(CP(ETK_D3), (IEN | PTD | EN | M1)) /*GPIO_17 / MCSPI3-CLK -> TRF*/\
+MUX_VAL(CP(ETK_D4_ES2), (IDIS | PTU | EN | M4)) /*GPIO_18 / McBSP5-DR - drives RS232 EXT line*/\
+MUX_VAL(CP(ETK_D5_ES2), (IDIS | PTD | EN | M4)) /*GPIO_19 / McBSP5-FSX - TRF79x0 EN/EN2*/\
+MUX_VAL(CP(ETK_D6_ES2), (IDIS | PTD | EN | M4)) /*GPIO_20 / McBSP5-DX - Enable 5V on VBUS*/\
+MUX_VAL(CP(UART2_CTS), (IEN | PTU | DIS | M4)) /*GPIO_144 / UART2-CTS - ext Ant */\
+MUX_VAL(CP(UART2_RTS), (IDIS | PTD | DIS | M4)) /*GPIO_145 / UART2-RTS - GPS ON(0)/OFF(1)*/\
+MUX_VAL(CP(UART2_TX), (IDIS | PTU | DIS | M0)) /*GPIO_146 / UART2-TX - GPS_TX */\
+MUX_VAL(CP(UART2_RX), (IEN | PTU | DIS | M0)) /*GPIO_147 / UART2-RX - GPS_RX */\
+MUX_VAL(CP(MCBSP4_CLKX), (IEN | PTD | DIS | M0)) /*GPIO_152 / MCBSP4_CLKX*/\
+MUX_VAL(CP(MCBSP4_DR), (IEN | PTD | DIS | M0)) /*GPIO_153 / MCBSP4_DR*/\
+MUX_VAL(CP(MCBSP4_DX), (IEN | PTD | DIS | M0)) /*GPIO_154 / MCBSP4_DX*/\
+MUX_VAL(CP(MCBSP4_FSX), (IEN | PTD | DIS | M0)) /*GPIO_155 / MCBSP4_FSX*/\
+MUX_VAL(CP(MCBSP_CLKS), (IDIS | PTD | DIS | M4)) /*GPIO_160 / PENIRQ*/\
+
+#if 0
+MUX_VAL(CP(UART3_CTS_RCTX), (IDIS | PTD | DIS | M0)) /*GPIO_163 / UART3-CTS*/\
+MUX_VAL(CP(UART3_RTS_SD), (IDIS | PTD | DIS | M0)) /*GPIO_164 / UART3-RTS*/\
+MUX_VAL(CP(UART3_RX_IRRX), (IDIS | PTD | DIS | M0)) /*GPIO_165 / UART3-RX*/\
+MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)) /*GPIO_166 / UART3-TX*/\
+
+#endif
// FIXME: clean up so that we have the right PinMuxes
+// this below appears to be the BeagleBoard expansion port mapping and not GTA04
#if 0
-MUX_VAL(CP(ETK_D0), (IEN | PTD | EN | M1)) /*GPIO_17 -> MCSPI3-CLK -> TRF*/\
MUX_VAL(CP(MMC2_CLK), (IDIS | PTD | EN | M4)) /*GPIO_130 -> MCSPI3-CLK -> TRF*/\
MUX_VAL(CP(MMC2_CMD), (IDIS | PTD | EN | M4)) /*GPIO_131 -> MCSPI3-SIMO -> TRF*/\
MUX_VAL(CP(MMC2_DAT0), (IEN | PTU | EN | M4)) /*GPIO_132 -> MCSPI3-SOMI -> TRF*/\
diff --git a/u-boot/board/goldelico/gta04b4/LQ050W1LC1B.c b/u-boot/board/goldelico/gta04b4/LQ050W1LC1B.c
index 82752ce..94a470a 100644
--- a/u-boot/board/goldelico/gta04b4/LQ050W1LC1B.c
+++ b/u-boot/board/goldelico/gta04b4/LQ050W1LC1B.c
@@ -31,6 +31,7 @@
#include <twl4030.h>
#include "../gta04/dssfb.h"
#include "../gta04/panel.h"
+#include "../gta04/backlight.h"
#include "LQ050W1LC1B.h"
#define mdelay(n) ({ unsigned long msec = (n); while (msec--) udelay(1000); })
@@ -43,15 +44,15 @@
#ifdef CONFIG_OMAP3_GTA04
-#define GPIO_POWER 12 /* McBSP5-CLKX GTA04 controls 5V power for the display */
+#define GPIO_POWER 12 /* McBSP5-CLKX enables 5V DC/DC (backlight) for the display */
#define GPIO_BLSHUTDOWN 19 /* McBSP5-FSX controls Backlight SHUTDOWN (shutdown if high) */
#define GPIO_SHUTDOWN 20 /* McBSP5-DX controls LVDS SHUTDOWN (shutdown if low) */
#elif CONFIG_OMAP3_BEAGLE
-#define GPIO_POWER 162 /* McBSP5-CLKX GTA04 controls 5V power for the display */
-#define GPIO_BLSHUTDOWN 161 /* McBSP5-FSX controls Backlight SHUTDOWN (shutdown if high) */
-#define GPIO_SHUTDOWN 158 /* McBSP5-DX controls LVDS SHUTDOWN (shutdown if low) */
+#define GPIO_POWER 162 /* McBSP5-CLKX?? enables 5V DC/DC (backlight) for the display */
+#define GPIO_BLSHUTDOWN 161 /* McBSP5-FSX?? controls Backlight SHUTDOWN (shutdown if high) */
+#define GPIO_SHUTDOWN 158 /* McBSP5-DX?? controls LVDS SHUTDOWN (shutdown if low) */
#endif
@@ -81,6 +82,9 @@
#define HBL (HS+HBP+HFP) // horizontal blanking period
#define HP (HDISP+HBL) // horizontal cycle
+int displayColumns=HDISP;
+int displayLines=VDISP;
+
static /*const*/ struct panel_config lcm_cfg =
{
.timing_h = ((HBP-1)<<20) | ((HFP-1)<<8) | ((HS-1)<<0), /* Horizantal timing */
diff --git a/u-boot/board/goldelico/gta04b4/gta04b4.c b/u-boot/board/goldelico/gta04b4/gta04b4.c
index b480288..dc5d1a2 100644
--- a/u-boot/board/goldelico/gta04b4/gta04b4.c
+++ b/u-boot/board/goldelico/gta04b4/gta04b4.c
@@ -13,12 +13,12 @@
void muxinit(void)
{
- MUX_BEAGLE();
- MUX_BEAGLE_EXPANDER();
+ MUX_GTA04();
+ MUX_EXPANDER_B4();
}
-#undef MUX_BEAGLE
-#define MUX_BEAGLE() muxinit()
+#undef MUX_GTA04
+#define MUX_GTA04() muxinit()
// take the original beagle.c code
#include "../gta04/gta04.c"
diff --git a/u-boot/board/goldelico/gta04b4/gta04b4.h b/u-boot/board/goldelico/gta04b4/gta04b4.h
index 668f5f9..c9d0970 100644
--- a/u-boot/board/goldelico/gta04b4/gta04b4.h
+++ b/u-boot/board/goldelico/gta04b4/gta04b4.h
@@ -1,8 +1,34 @@
-// all pins on GTA04 expansion connector
+// all reuseable pins on GTA04 expansion connector
// GPIO -> GTA04-Pin -> Expander function
-#define MUX_BEAGLE_EXPANDER() \
+#define MUX_EXPANDER_B4() \
+MUX_VAL(CP(SYS_CLKOUT1), (IDIS | PTD | DIS | M4)) /*GPIO_10 / KEYIRQ - TRF-IRQ*/\
+MUX_VAL(CP(ETK_CLK_ES2), (IDIS | PTD | EN | M4)) /*GPIO_12 / McBSP5-CLKX - Enable 3.3V LDO for display*/\
+MUX_VAL(CP(ETK_D0), (IEN | PTD | EN | M1)) /*GPIO_14 / MCSPI3-SIMO -> TRF*/\
+MUX_VAL(CP(ETK_D1), (IEN | PTD | EN | M1)) /*GPIO_15 / MCSPI3-SOMI -> TRF*/\
+MUX_VAL(CP(ETK_D2), (IEN | PTD | EN | M1)) /*GPIO_16 / MCSPI3-CS -> TRF*/\
+MUX_VAL(CP(ETK_D3), (IEN | PTD | EN | M1)) /*GPIO_17 / MCSPI3-CLK -> TRF*/\
+MUX_VAL(CP(ETK_D4_ES2), (IDIS | PTU | EN | M4)) /*GPIO_18 / McBSP5-DR - drives RS232 EXT line*/\
+MUX_VAL(CP(ETK_D5_ES2), (IDIS | PTD | EN | M4)) /*GPIO_19 / McBSP5-FSX - TRF79x0 EN/EN2*/\
+MUX_VAL(CP(ETK_D6_ES2), (IDIS | PTD | EN | M4)) /*GPIO_20 / McBSP5-DX - Enable 5V on VBUS*/\
+MUX_VAL(CP(UART2_CTS), (IEN | PTU | DIS | M4)) /*GPIO_144 / UART2-CTS - ext Ant */\
+MUX_VAL(CP(UART2_RTS), (IDIS | PTD | DIS | M4)) /*GPIO_145 / UART2-RTS - GPS ON(0)/OFF(1)*/\
+MUX_VAL(CP(UART2_TX), (IDIS | PTU | DIS | M0)) /*GPIO_146 / UART2-TX - GPS_TX */\
+MUX_VAL(CP(UART2_RX), (IEN | PTU | DIS | M0)) /*GPIO_147 / UART2-RX - GPS_RX */\
+MUX_VAL(CP(MCBSP4_CLKX), (IEN | PTD | DIS | M0)) /*GPIO_152 / MCBSP4_CLKX*/\
+MUX_VAL(CP(MCBSP4_DR), (IEN | PTD | DIS | M0)) /*GPIO_153 / MCBSP4_DR*/\
+MUX_VAL(CP(MCBSP4_DX), (IEN | PTD | DIS | M0)) /*GPIO_154 / MCBSP4_DX*/\
+MUX_VAL(CP(MCBSP4_FSX), (IEN | PTD | DIS | M0)) /*GPIO_155 / MCBSP4_FSX*/\
+MUX_VAL(CP(MCBSP_CLKS), (IDIS | PTD | DIS | M4)) /*GPIO_160 / PENIRQ*/\
+
+#if 0
+MUX_VAL(CP(UART3_CTS_RCTX), (IDIS | PTD | DIS | M0)) /*GPIO_163 / UART3-CTS*/\
+MUX_VAL(CP(UART3_RTS_SD), (IDIS | PTD | DIS | M0)) /*GPIO_164 / UART3-RTS*/\
+MUX_VAL(CP(UART3_RX_IRRX), (IDIS | PTD | DIS | M0)) /*GPIO_165 / UART3-RX*/\
+MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)) /*GPIO_166 / UART3-TX*/\
+
+#endif
// FIXME: clean up so that we have the right PinMuxes
#if 0