diff options
Diffstat (limited to 'board/stx/stxssa/stxssa.c')
| -rw-r--r-- | board/stx/stxssa/stxssa.c | 39 |
1 files changed, 3 insertions, 36 deletions
diff --git a/board/stx/stxssa/stxssa.c b/board/stx/stxssa/stxssa.c index 1e0acab..83ffcd2 100644 --- a/board/stx/stxssa/stxssa.c +++ b/board/stx/stxssa/stxssa.c @@ -41,8 +41,6 @@ #include <miiphy.h> #include <netdev.h> -long int fixed_sdram (void); - /* * I/O Port configuration table * @@ -241,10 +239,10 @@ reset_phy(void) miiphy_reset("FCC1", 0x0); /* change PHY address to 0x02 */ - bb_miiphy_write(NULL, 0, PHY_MIPSCR, 0xf028); + bb_miiphy_write(NULL, 0, MII_MIPSCR, 0xf028); - bb_miiphy_write(NULL, 0x02, PHY_BMCR, - PHY_BMCR_AUTON | PHY_BMCR_RST_NEG); + bb_miiphy_write(NULL, 0x02, MII_BMCR, + BMCR_ANENABLE | BMCR_ANRESTART); #endif /* CONFIG_MII */ #endif } @@ -294,37 +292,6 @@ show_activity(int flag) next_led_update += (get_tbclk() / 4); } -phys_size_t -initdram (int board_type) -{ - long dram_size = 0; - -#if defined(CONFIG_DDR_DLL) - { - volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); - uint temp_ddrdll = 0; - - /* Work around to stabilize DDR DLL */ - temp_ddrdll = gur->ddrdllcr; - gur->ddrdllcr = ((temp_ddrdll & 0xff) << 16) | 0x80000000; - asm("sync;isync;msync"); - } -#endif - - dram_size = fsl_ddr_sdram(); - dram_size = setup_ddr_tlbs(dram_size / 0x100000); - dram_size *= 0x100000; - -#if defined(CONFIG_DDR_ECC) - /* Initialize and enable DDR ECC. - */ - ddr_enable_ecc(dram_size); -#endif - - return dram_size; -} - - #if defined(CONFIG_SYS_DRAM_TEST) int testdram (void) { |