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-rw-r--r--cpu/arm926ejs/nomadik/Makefile46
-rw-r--r--cpu/arm926ejs/nomadik/reset.S25
-rw-r--r--cpu/arm926ejs/nomadik/timer.c183
3 files changed, 254 insertions, 0 deletions
diff --git a/cpu/arm926ejs/nomadik/Makefile b/cpu/arm926ejs/nomadik/Makefile
new file mode 100644
index 0000000..e3bd2ee
--- /dev/null
+++ b/cpu/arm926ejs/nomadik/Makefile
@@ -0,0 +1,46 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(SOC).a
+
+COBJS = timer.o
+SOBJS = reset.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS)) $(addprefix $(obj),$(SOBJS))
+
+all: $(obj).depend $(LIB)
+
+$(LIB): $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/cpu/arm926ejs/nomadik/reset.S b/cpu/arm926ejs/nomadik/reset.S
new file mode 100644
index 0000000..948996b
--- /dev/null
+++ b/cpu/arm926ejs/nomadik/reset.S
@@ -0,0 +1,25 @@
+#include <config.h>
+/*
+ * Processor reset for Nomadik
+ */
+
+ .align 5
+.globl reset_cpu
+reset_cpu:
+#if defined CONFIG_NOMADIK_8815
+ ldr r0, =NOMADIK_SRC_BASE
+ ldr r1, =0x1
+ str r1, [r0, #0x18]
+#else
+ ldr r1, rstctl1 /* get clkm1 reset ctl */
+ mov r3, #0x0
+ strh r3, [r1] /* clear it */
+ mov r3, #0x8
+ strh r3, [r1] /* force dsp+arm reset */
+#endif
+
+_loop_forever:
+ b _loop_forever
+
+rstctl1:
+ .word 0xfffece10
diff --git a/cpu/arm926ejs/nomadik/timer.c b/cpu/arm926ejs/nomadik/timer.c
new file mode 100644
index 0000000..2b2208c
--- /dev/null
+++ b/cpu/arm926ejs/nomadik/timer.c
@@ -0,0 +1,183 @@
+/*
+ * (C) Copyright 2003
+ * Texas Instruments <www.ti.com>
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Alex Zuepke <azu@sysgo.de>
+ *
+ * (C) Copyright 2002-2004
+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ *
+ * (C) Copyright 2004
+ * Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <arm926ejs.h>
+
+#define TIMER_LOAD_VAL 0xffffffff
+
+/* macro to read the 32 bit timer */
+#define READ_TIMER readl(CONFIG_SYS_TIMERBASE + 20)
+
+static ulong timestamp;
+static ulong lastdec;
+
+/* nothing really to do with interrupts, just starts up a counter. */
+int timer_init(void)
+{
+ /* Load timer with initial value */
+ writel(TIMER_LOAD_VAL, CONFIG_SYS_TIMERBASE + 16);
+
+ /*
+ * Set timer to be enabled, free-running, no interrupts, 256 divider,
+ * 32-bit, wrap-mode
+ */
+ writel(0x8a, CONFIG_SYS_TIMERBASE + 24);
+
+ /* init the timestamp and lastdec value */
+ reset_timer_masked();
+
+ return 0;
+}
+
+/*
+ * timer without interrupts
+ */
+void reset_timer(void)
+{
+ reset_timer_masked();
+}
+
+ulong get_timer(ulong base)
+{
+ return get_timer_masked() - base;
+}
+
+void set_timer(ulong t)
+{
+ timestamp = t;
+}
+
+/* delay x useconds AND perserve advance timstamp value */
+void udelay(unsigned long usec)
+{
+ ulong tmo, tmp;
+
+ if (usec >= 1000) {
+ /* if "big" number, spread normalization to seconds */
+ tmo = usec / 1000; /* start to normalize */
+ tmo *= CONFIG_SYS_HZ; /* find number of "ticks" */
+ tmo /= 1000; /* finish normalize. */
+ } else {
+ /* small number, don't kill it prior to HZ multiply */
+ tmo = usec * CONFIG_SYS_HZ;
+ tmo /= (1000 * 1000);
+ }
+
+ tmp = get_timer(0); /* get current timestamp */
+ if ((tmo + tmp + 1) < tmp) /* will roll time stamp? */
+ reset_timer_masked(); /* reset to 0, set lastdec value */
+ else
+ tmo += tmp;
+
+ while (get_timer_masked() < tmo)
+ /* nothing */ ;
+}
+
+void reset_timer_masked(void)
+{
+ /* reset time */
+ lastdec = READ_TIMER; /* capure current decrementer value time */
+ timestamp = 0; /* start "advancing" time stamp from 0 */
+}
+
+ulong get_timer_masked(void)
+{
+ ulong now = READ_TIMER; /* current tick value */
+
+ if (lastdec >= now) { /* normal mode (non roll) */
+ /* move stamp fordward */
+ timestamp += lastdec - now;
+ } else {
+ /*
+ * An overflow is expected.
+ * nts = ts + ld + (TLV - now)
+ * ts=old stamp, ld=time that passed before passing through -1
+ * (TLV-now) amount of time after passing though -1
+ * nts = new "advancing time stamp"...it could also roll
+ */
+ timestamp += lastdec + TIMER_LOAD_VAL - now;
+ }
+ lastdec = now;
+
+ return timestamp;
+}
+
+/* waits specified delay value and resets timestamp */
+void udelay_masked(unsigned long usec)
+{
+ ulong tmo;
+
+ if (usec >= 1000) {
+ /* if "big" number, spread normalization to seconds */
+ tmo = usec / 1000; /* start to normalize */
+ tmo *= CONFIG_SYS_HZ; /* find number of "ticks" */
+ tmo /= 1000; /* finish normalize. */
+ } else {
+ /* else small number, don't kill it prior to HZ multiply */
+ tmo = usec * CONFIG_SYS_HZ;
+ tmo /= (1000*1000);
+ }
+
+ reset_timer_masked();
+ /* set "advancing" timestamp to 0, set lastdec vaule */
+
+ while (get_timer_masked() < tmo)
+ /* nothing */ ;
+}
+
+/*
+ * This function is derived from PowerPC code (read timebase as long long).
+ * On ARM it just returns the timer value.
+ */
+unsigned long long get_ticks(void)
+{
+ return get_timer(0);
+}
+
+/*
+ * This function is derived from PowerPC code (timebase clock frequency).
+ * On ARM it returns the number of timer ticks per second.
+ */
+ulong get_tbclk(void)
+{
+ ulong tbclk;
+
+ tbclk = CONFIG_SYS_HZ;
+ return tbclk;
+}