diff options
Diffstat (limited to 'u-boot/board/bf537-stamp')
| -rw-r--r-- | u-boot/board/bf537-stamp/Makefile | 56 | ||||
| -rw-r--r-- | u-boot/board/bf537-stamp/bf537-stamp.c | 106 | ||||
| -rw-r--r-- | u-boot/board/bf537-stamp/config.mk | 37 | ||||
| -rw-r--r-- | u-boot/board/bf537-stamp/ide-cf.c | 66 | ||||
| -rw-r--r-- | u-boot/board/bf537-stamp/post-memory.c | 318 | ||||
| -rw-r--r-- | u-boot/board/bf537-stamp/post.c | 174 |
6 files changed, 757 insertions, 0 deletions
diff --git a/u-boot/board/bf537-stamp/Makefile b/u-boot/board/bf537-stamp/Makefile new file mode 100644 index 0000000..2b9328b --- /dev/null +++ b/u-boot/board/bf537-stamp/Makefile @@ -0,0 +1,56 @@ +# +# U-boot - Makefile +# +# Copyright (c) 2005-2007 Analog Device Inc. +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS-y := $(BOARD).o +COBJS-$(CONFIG_BFIN_IDE) += ide-cf.o +COBJS-$(CONFIG_HAS_POST) += post.o post-memory.o + +SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS-y)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/u-boot/board/bf537-stamp/bf537-stamp.c b/u-boot/board/bf537-stamp/bf537-stamp.c new file mode 100644 index 0000000..ec888d4 --- /dev/null +++ b/u-boot/board/bf537-stamp/bf537-stamp.c @@ -0,0 +1,106 @@ +/* + * U-boot - main board file + * + * Copyright (c) 2005-2008 Analog Devices Inc. + * + * (C) Copyright 2000-2004 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#include <common.h> +#include <config.h> +#include <command.h> +#include <asm/blackfin.h> +#include <asm/net.h> +#include <net.h> +#include <asm/mach-common/bits/bootrom.h> +#include <netdev.h> + +DECLARE_GLOBAL_DATA_PTR; + +int checkboard(void) +{ + printf("Board: ADI BF537 stamp board\n"); + printf(" Support: http://blackfin.uclinux.org/\n"); + return 0; +} + +void board_reset(void) +{ + /* workaround for weak pull ups on ssel */ + if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER) + bfin_reset_boot_spi_cs(GPIO_PF10); +} + +#ifdef CONFIG_BFIN_MAC +static void board_init_enetaddr(uchar *mac_addr) +{ +#ifdef CONFIG_SYS_NO_FLASH +# define USE_MAC_IN_FLASH 0 +#else +# define USE_MAC_IN_FLASH 1 +#endif + bool valid_mac = false; + + if (USE_MAC_IN_FLASH) { + /* we cram the MAC in the last flash sector */ + uchar *board_mac_addr = (uchar *)0x203F0000; + if (is_valid_ether_addr(board_mac_addr)) { + memcpy(mac_addr, board_mac_addr, 6); + valid_mac = true; + } + } + + if (!valid_mac) { + puts("Warning: Generating 'random' MAC address\n"); + bfin_gen_rand_mac(mac_addr); + } + + eth_setenv_enetaddr("ethaddr", mac_addr); +} + +int board_eth_init(bd_t *bis) +{ + return bfin_EMAC_initialize(bis); +} +#endif + +/* miscellaneous platform dependent initialisations */ +int misc_init_r(void) +{ +#ifdef CONFIG_BFIN_MAC + uchar enetaddr[6]; + if (!eth_getenv_enetaddr("ethaddr", enetaddr)) + board_init_enetaddr(enetaddr); +#endif + +#ifndef CONFIG_SYS_NO_FLASH + /* we use the last sector for the MAC address / POST LDR */ + extern flash_info_t flash_info[]; + flash_protect(FLAG_PROTECT_SET, 0x203F0000, 0x203FFFFF, &flash_info[0]); +#endif + +#ifdef CONFIG_BFIN_IDE + cf_ide_init(); +#endif + + return 0; +} diff --git a/u-boot/board/bf537-stamp/config.mk b/u-boot/board/bf537-stamp/config.mk new file mode 100644 index 0000000..6694f06 --- /dev/null +++ b/u-boot/board/bf537-stamp/config.mk @@ -0,0 +1,37 @@ +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2001 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# This is not actually used for Blackfin boards so do not change it +#CONFIG_SYS_TEXT_BASE = do-not-use-me + +CONFIG_BFIN_CPU = bf537-0.2 + +CFLAGS_lib += -O2 +CFLAGS_lib/lzma += -O2 + +# Set some default LDR flags based on boot mode. +LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8 +LDR_FLAGS-BFIN_BOOT_UART := --port g --gpio 6 +LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE)) diff --git a/u-boot/board/bf537-stamp/ide-cf.c b/u-boot/board/bf537-stamp/ide-cf.c new file mode 100644 index 0000000..5a3720d --- /dev/null +++ b/u-boot/board/bf537-stamp/ide-cf.c @@ -0,0 +1,66 @@ +/* + * CF IDE addon card code + * + * Enter bugs at http://blackfin.uclinux.org/ + * + * Copyright (c) 2005-2009 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> +#include <config.h> +#include <command.h> +#include <asm/blackfin.h> + +void cf_outb(unsigned char val, volatile unsigned char *addr) +{ + *(addr) = val; + SSYNC(); +} + +unsigned char cf_inb(volatile unsigned char *addr) +{ + volatile unsigned char c; + + c = *(addr); + SSYNC(); + + return c; +} + +void cf_insw(unsigned short *sect_buf, unsigned short *addr, int words) +{ + int i; + + for (i = 0; i < words; i++) + *(sect_buf + i) = *(addr); + SSYNC(); +} + +void cf_outsw(unsigned short *addr, unsigned short *sect_buf, int words) +{ + int i; + + for (i = 0; i < words; i++) + *(addr) = *(sect_buf + i); + SSYNC(); +} + +void cf_ide_init(void) +{ +#if defined(CONFIG_BFIN_TRUE_IDE) + /* Enable ATASEL when in True IDE mode */ + printf("Using CF True IDE Mode\n"); + cf_outb(0, (unsigned char *)CONFIG_CF_ATASEL_ENA); + udelay(1000); +#elif defined(CONFIG_BFIN_CF_IDE) + /* Disable ATASEL when we're in Common Memory Mode */ + printf("Using CF Common Memory Mode\n"); + cf_outb(0, (unsigned char *)CONFIG_CF_ATASEL_DIS); + udelay(1000); +#elif defined(CONFIG_BFIN_HDD_IDE) + printf("Using HDD IDE Mode\n"); +#endif + ide_init(); +} diff --git a/u-boot/board/bf537-stamp/post-memory.c b/u-boot/board/bf537-stamp/post-memory.c new file mode 100644 index 0000000..49022dc --- /dev/null +++ b/u-boot/board/bf537-stamp/post-memory.c @@ -0,0 +1,318 @@ +#include <common.h> +#include <asm/io.h> + +#include <post.h> +#include <watchdog.h> + +#if CONFIG_POST & CONFIG_SYS_POST_MEMORY +#define CLKIN 25000000 +#define PATTERN1 0x5A5A5A5A +#define PATTERN2 0xAAAAAAAA + +#define CCLK_NUM 4 +#define SCLK_NUM 3 + +void post_out_buff(char *buff); +int post_key_pressed(void); +void post_init_pll(int mult, int div); +int post_init_sdram(int sclk); +void post_init_uart(int sclk); + +const int pll[CCLK_NUM][SCLK_NUM][2] = { + { {20, 4}, {20, 5}, {20, 10} }, /* CCLK = 500M */ + { {16, 4}, {16, 5}, {16, 8} }, /* CCLK = 400M */ + { {8, 2}, {8, 4}, {8, 5} }, /* CCLK = 200M */ + { {4, 1}, {4, 2}, {4, 4} } /* CCLK = 100M */ +}; +const char *const log[CCLK_NUM][SCLK_NUM] = { + {"CCLK-500MHz SCLK-125MHz: Writing...\0", + "CCLK-500MHz SCLK-100MHz: Writing...\0", + "CCLK-500MHz SCLK- 50MHz: Writing...\0",}, + {"CCLK-400MHz SCLK-100MHz: Writing...\0", + "CCLK-400MHz SCLK- 80MHz: Writing...\0", + "CCLK-400MHz SCLK- 50MHz: Writing...\0",}, + {"CCLK-200MHz SCLK-100MHz: Writing...\0", + "CCLK-200MHz SCLK- 50MHz: Writing...\0", + "CCLK-200MHz SCLK- 40MHz: Writing...\0",}, + {"CCLK-100MHz SCLK-100MHz: Writing...\0", + "CCLK-100MHz SCLK- 50MHz: Writing...\0", + "CCLK-100MHz SCLK- 25MHz: Writing...\0",}, +}; + +int memory_post_test(int flags) +{ + int addr; + int m, n; + int sclk, sclk_temp; + int ret = 1; + + sclk_temp = CLKIN / 1000000; + sclk_temp = sclk_temp * CONFIG_VCO_MULT; + for (sclk = 0; sclk_temp > 0; sclk++) + sclk_temp -= CONFIG_SCLK_DIV; + sclk = sclk * 1000000; + post_init_uart(sclk); + if (post_key_pressed() == 0) + return 0; + + for (m = 0; m < CCLK_NUM; m++) { + for (n = 0; n < SCLK_NUM; n++) { + /* Calculate the sclk */ + sclk_temp = CLKIN / 1000000; + sclk_temp = sclk_temp * pll[m][n][0]; + for (sclk = 0; sclk_temp > 0; sclk++) + sclk_temp -= pll[m][n][1]; + sclk = sclk * 1000000; + + post_init_pll(pll[m][n][0], pll[m][n][1]); + post_init_sdram(sclk); + post_init_uart(sclk); + post_out_buff("\n\r\0"); + post_out_buff(log[m][n]); + for (addr = 0x0; addr < CONFIG_SYS_MAX_RAM_SIZE; addr += 4) + *(unsigned long *)addr = PATTERN1; + post_out_buff("Reading...\0"); + for (addr = 0x0; addr < CONFIG_SYS_MAX_RAM_SIZE; addr += 4) { + if ((*(unsigned long *)addr) != PATTERN1) { + post_out_buff("Error\n\r\0"); + ret = 0; + } + } + post_out_buff("OK\n\r\0"); + } + } + if (ret) + post_out_buff("memory POST passed\n\r\0"); + else + post_out_buff("memory POST failed\n\r\0"); + + post_out_buff("\n\r\n\r\0"); + return 1; +} + +void post_init_uart(int sclk) +{ + int divisor; + + for (divisor = 0; sclk > 0; divisor++) + sclk -= 57600 * 16; + + bfin_write_PORTF_FER(0x000F); + bfin_write_PORTH_FER(0xFFFF); + + bfin_write_UART_GCTL(0x00); + bfin_write_UART_LCR(0x83); + SSYNC(); + bfin_write_UART_DLL(divisor & 0xFF); + SSYNC(); + bfin_write_UART_DLH((divisor >> 8) & 0xFF); + SSYNC(); + bfin_write_UART_LCR(0x03); + SSYNC(); + bfin_write_UART_GCTL(0x01); + SSYNC(); +} + +void post_out_buff(char *buff) +{ + + int i = 0; + for (i = 0; i < 0x80000; i++) + ; + i = 0; + while ((buff[i] != '\0') && (i != 100)) { + while (!(bfin_read_pUART_LSR() & 0x20)) ; + bfin_write_UART_THR(buff[i]); + SSYNC(); + i++; + } + for (i = 0; i < 0x80000; i++) + ; +} + +/* Using sw10-PF5 as the hotkey */ +#define KEY_LOOP 0x80000 +#define KEY_DELAY 0x80 +int post_key_pressed(void) +{ + int i, n; + unsigned short value; + + bfin_write_PORTF_FER(bfin_read_PORTF_FER() & ~PF5); + bfin_write_PORTFIO_DIR(bfin_read_PORTFIO_DIR() & ~PF5); + bfin_write_PORTFIO_INEN(bfin_read_PORTFIO_INEN() | PF5); + SSYNC(); + + post_out_buff("########Press SW10 to enter Memory POST########: 3\0"); + for (i = 0; i < KEY_LOOP; i++) { + value = bfin_read_PORTFIO() & PF5; + if (bfin_read_UART0_RBR() == 0x0D) { + value = 0; + goto key_pressed; + } + if (value != 0) + goto key_pressed; + for (n = 0; n < KEY_DELAY; n++) + asm("nop"); + } + post_out_buff("\b2\0"); + + for (i = 0; i < KEY_LOOP; i++) { + value = bfin_read_PORTFIO() & PF5; + if (bfin_read_UART0_RBR() == 0x0D) { + value = 0; + goto key_pressed; + } + if (value != 0) + goto key_pressed; + for (n = 0; n < KEY_DELAY; n++) + asm("nop"); + } + post_out_buff("\b1\0"); + + for (i = 0; i < KEY_LOOP; i++) { + value = bfin_read_PORTFIO() & PF5; + if (bfin_read_UART0_RBR() == 0x0D) { + value = 0; + goto key_pressed; + } + if (value != 0) + goto key_pressed; + for (n = 0; n < KEY_DELAY; n++) + asm("nop"); + } + key_pressed: + post_out_buff("\b0"); + post_out_buff("\n\r\0"); + if (value == 0) + return 0; + post_out_buff("Hotkey has been pressed, Enter POST . . . . . .\n\r\0"); + return 1; +} + +void post_init_pll(int mult, int div) +{ + + bfin_write_SIC_IWR(0x01); + bfin_write_PLL_CTL((mult << 9)); + bfin_write_PLL_DIV(div); + asm("CLI R2;"); + asm("IDLE;"); + asm("STI R2;"); + while (!(bfin_read_PLL_STAT() & 0x20)) ; +} + +int post_init_sdram(int sclk) +{ + int SDRAM_tRP, SDRAM_tRP_num, SDRAM_tRAS, SDRAM_tRAS_num, SDRAM_tRCD, + SDRAM_tWR; + int SDRAM_Tref, SDRAM_NRA, SDRAM_CL, SDRAM_SIZE, SDRAM_WIDTH, + mem_SDGCTL, mem_SDBCTL, mem_SDRRC; + + if ((sclk > 119402985)) { + SDRAM_tRP = TRP_2; + SDRAM_tRP_num = 2; + SDRAM_tRAS = TRAS_7; + SDRAM_tRAS_num = 7; + SDRAM_tRCD = TRCD_2; + SDRAM_tWR = TWR_2; + } else if ((sclk > 104477612) && (sclk <= 119402985)) { + SDRAM_tRP = TRP_2; + SDRAM_tRP_num = 2; + SDRAM_tRAS = TRAS_6; + SDRAM_tRAS_num = 6; + SDRAM_tRCD = TRCD_2; + SDRAM_tWR = TWR_2; + } else if ((sclk > 89552239) && (sclk <= 104477612)) { + SDRAM_tRP = TRP_2; + SDRAM_tRP_num = 2; + SDRAM_tRAS = TRAS_5; + SDRAM_tRAS_num = 5; + SDRAM_tRCD = TRCD_2; + SDRAM_tWR = TWR_2; + } else if ((sclk > 74626866) && (sclk <= 89552239)) { + SDRAM_tRP = TRP_2; + SDRAM_tRP_num = 2; + SDRAM_tRAS = TRAS_4; + SDRAM_tRAS_num = 4; + SDRAM_tRCD = TRCD_2; + SDRAM_tWR = TWR_2; + } else if ((sclk > 66666667) && (sclk <= 74626866)) { + SDRAM_tRP = TRP_2; + SDRAM_tRP_num = 2; + SDRAM_tRAS = TRAS_3; + SDRAM_tRAS_num = 3; + SDRAM_tRCD = TRCD_2; + SDRAM_tWR = TWR_2; + } else if ((sclk > 59701493) && (sclk <= 66666667)) { + SDRAM_tRP = TRP_1; + SDRAM_tRP_num = 1; + SDRAM_tRAS = TRAS_4; + SDRAM_tRAS_num = 4; + SDRAM_tRCD = TRCD_1; + SDRAM_tWR = TWR_2; + } else if ((sclk > 44776119) && (sclk <= 59701493)) { + SDRAM_tRP = TRP_1; + SDRAM_tRP_num = 1; + SDRAM_tRAS = TRAS_3; + SDRAM_tRAS_num = 3; + SDRAM_tRCD = TRCD_1; + SDRAM_tWR = TWR_2; + } else if ((sclk > 29850746) && (sclk <= 44776119)) { + SDRAM_tRP = TRP_1; + SDRAM_tRP_num = 1; + SDRAM_tRAS = TRAS_2; + SDRAM_tRAS_num = 2; + SDRAM_tRCD = TRCD_1; + SDRAM_tWR = TWR_2; + } else if (sclk <= 29850746) { + SDRAM_tRP = TRP_1; + SDRAM_tRP_num = 1; + SDRAM_tRAS = TRAS_1; + SDRAM_tRAS_num = 1; + SDRAM_tRCD = TRCD_1; + SDRAM_tWR = TWR_2; + } else { + SDRAM_tRP = TRP_1; + SDRAM_tRP_num = 1; + SDRAM_tRAS = TRAS_1; + SDRAM_tRAS_num = 1; + SDRAM_tRCD = TRCD_1; + SDRAM_tWR = TWR_2; + } + /*SDRAM INFORMATION: */ + SDRAM_Tref = 64; /* Refresh period in milliseconds */ + SDRAM_NRA = 4096; /* Number of row addresses in SDRAM */ + SDRAM_CL = CL_3; /* 2 */ + + SDRAM_SIZE = EBSZ_64; + SDRAM_WIDTH = EBCAW_10; + + mem_SDBCTL = SDRAM_WIDTH | SDRAM_SIZE | EBE; + + /* Equation from section 17 (p17-46) of BF533 HRM */ + mem_SDRRC = + (((CONFIG_SCLK_HZ / 1000) * SDRAM_Tref) / SDRAM_NRA) - + (SDRAM_tRAS_num + SDRAM_tRP_num); + + /* Enable SCLK Out */ + mem_SDGCTL = + (SCTLE | SDRAM_CL | SDRAM_tRAS | SDRAM_tRP | SDRAM_tRCD | SDRAM_tWR + | PSS); + + SSYNC(); + + bfin_write_EBIU_SDGCTL(bfin_write_EBIU_SDGCTL() | 0x1000000); + /* Set the SDRAM Refresh Rate control register based on SSCLK value */ + bfin_write_EBIU_SDRRC(mem_SDRRC); + + /* SDRAM Memory Bank Control Register */ + bfin_write_EBIU_SDBCTL(mem_SDBCTL); + + /* SDRAM Memory Global Control Register */ + bfin_write_EBIU_SDGCTL(mem_SDGCTL); + SSYNC(); + return mem_SDRRC; +} + +#endif /* CONFIG_POST & CONFIG_SYS_POST_MEMORY */ diff --git a/u-boot/board/bf537-stamp/post.c b/u-boot/board/bf537-stamp/post.c new file mode 100644 index 0000000..60eed5f --- /dev/null +++ b/u-boot/board/bf537-stamp/post.c @@ -0,0 +1,174 @@ +/* + * BF537-STAMP POST code + * + * Enter bugs at http://blackfin.uclinux.org/ + * + * Copyright (c) 2005-2009 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> +#include <config.h> +#include <command.h> +#include <asm/blackfin.h> +#include <asm/gpio.h> + +/* Using sw10-PF5 as the hotkey */ +int post_hotkeys_pressed(void) +{ + int delay = 3; + int i; + unsigned short value; + + gpio_request(GPIO_PF5, "post"); + gpio_direction_input(GPIO_PF5); + + printf("########Press SW10 to enter Memory POST########: %2d ", delay); + while (delay--) { + for (i = 0; i < 100; i++) { + value = gpio_get_value(GPIO_PF5); + if (value != 0) { + break; + } + udelay(10000); + } + printf("\b\b\b%2d ", delay); + } + printf("\b\b\b 0"); + printf("\n"); + if (value == 0) + return 0; + else { + printf("Hotkey has been pressed, Enter POST . . . . . .\n"); + return 1; + } + + gpio_free(GPIO_PF5); +} + +int uart_post_test(int flags) +{ + return 0; +} + +#define BLOCK_SIZE 0x10000 +#define VERIFY_ADDR 0x2000000 +extern int erase_block_flash(int); +extern int write_data(long lStart, long lCount, uchar * pnData); +int flash_post_test(int flags) +{ + unsigned short *pbuf, *temp; + int offset, n, i; + int value = 0; + int result = 0; + printf("\n"); + pbuf = (unsigned short *)VERIFY_ADDR; + temp = pbuf; + for (n = FLASH_START_POST_BLOCK; n < FLASH_END_POST_BLOCK; n++) { + offset = (n - 7) * BLOCK_SIZE; + printf("--------Erase block:%2d..", n); + erase_block_flash(n); + printf("OK\r"); + printf("--------Program block:%2d...", n); + write_data(CONFIG_SYS_FLASH_BASE + offset, BLOCK_SIZE, pbuf); + printf("OK\r"); + printf("--------Verify block:%2d...", n); + for (i = 0; i < BLOCK_SIZE; i += 2) { + if (*(unsigned short *)(CONFIG_SYS_FLASH_BASE + offset + i) != + *temp++) { + value = 1; + result = 1; + } + } + if (value) + printf("failed\n"); + else + printf("OK %3d%%\r", + (int)( + (n + 1 - + FLASH_START_POST_BLOCK) * + 100 / (FLASH_END_POST_BLOCK - + FLASH_START_POST_BLOCK))); + + temp = pbuf; + value = 0; + } + printf("\n"); + if (result) + return -1; + else + return 0; +} + +/**************************************************** + * LED1 ---- PF6 LED2 ---- PF7 * + * LED3 ---- PF8 LED4 ---- PF9 * + * LED5 ---- PF10 LED6 ---- PF11 * + ****************************************************/ +int led_post_test(int flags) +{ + unsigned int leds[] = { + GPIO_PF6, GPIO_PF7, GPIO_PF8, + GPIO_PF9, GPIO_PF10, GPIO_PF11, + }; + int i; + + for (i = 0; i < ARRAY_SIZE(leds); ++i) { + gpio_request(leds[i], "post"); + gpio_direction_output(leds[i], 0); + + printf("LED%i on", i + 1); + gpio_set_value(leds[i], 1); + udelay(1000000); + printf("\b\b\b\b\b\b\b"); + + gpio_free(leds[i]); + } + + return 0; +} + +/************************************************ + * SW10 ---- PF5 SW11 ---- PF4 * + * SW12 ---- PF3 SW13 ---- PF2 * + ************************************************/ +int button_post_test(int flags) +{ + unsigned int buttons[] = { + GPIO_PF2, GPIO_PF3, GPIO_PF4, GPIO_PF5, + }; + unsigned int sws[] = { 13, 12, 11, 10, }; + int i, delay = 5; + unsigned short value = 0; + int result = 0; + + for (i = 0; i < ARRAY_SIZE(buttons); ++i) { + gpio_request(buttons[i], "post"); + gpio_direction_input(buttons[i]); + + delay = 5; + printf("\n--------Press SW%i: %2d ", sws[i], delay); + while (delay--) { + for (i = 0; i < 100; i++) { + value = gpio_get_value(buttons[i]); + if (value != 0) + break; + udelay(10000); + } + printf("\b\b\b%2d ", delay); + } + if (value != 0) + puts("\b\bOK"); + else { + result = -1; + puts("\b\bfailed"); + } + + gpio_free(buttons[i]); + } + + puts("\n"); + + return result; +} |