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author | H. Nikolaus Schaller <hns@goldelico.com> | 2012-09-28 19:55:22 +0200 |
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committer | H. Nikolaus Schaller <hns@goldelico.com> | 2012-09-28 19:55:22 +0200 |
commit | 8374941aa31e1b22a7a6c574748e1914588e875f (patch) | |
tree | 6cc8c1dc202c878e2f6ade88c4195ee56b594233 | |
parent | cfd8bd21b1e545c59490c029fb31902d61437853 (diff) | |
download | bootable_bootloader_goldelico_gta04_x-loader-8374941aa31e1b22a7a6c574748e1914588e875f.zip bootable_bootloader_goldelico_gta04_x-loader-8374941aa31e1b22a7a6c574748e1914588e875f.tar.gz bootable_bootloader_goldelico_gta04_x-loader-8374941aa31e1b22a7a6c574748e1914588e875f.tar.bz2 |
recognize Micron MCP with 512 MB RAM/1GB NAND
-rw-r--r-- | drivers/k9f1g08r0a.c | 3 | ||||
-rw-r--r-- | include/configs/omap3530gta04.h | 4 |
2 files changed, 4 insertions, 3 deletions
diff --git a/drivers/k9f1g08r0a.c b/drivers/k9f1g08r0a.c index 988533c..611572a 100644 --- a/drivers/k9f1g08r0a.c +++ b/drivers/k9f1g08r0a.c @@ -46,6 +46,7 @@ #define MT29F1G_ID 0xa1 /* x8, 1GiB */ #define MT29F2G_ID 0xba /* x16, 2GiB */ #define MT29F4G_ID 0xbc /* x16, 4GiB */ +#define MT29F8G_ID 0xb3 /* x16, 8GiB */ #define ADDR_COLUMN 1 #define ADDR_PAGE 2 @@ -208,7 +209,7 @@ int nand_chip() NAND_DISABLE_CE(); if (((mfr == MT29F1G_MFR || mfr == MT29F1G_MFR2 || mfr == MT29F1G_MFR3) && - (id == MT29F1G_ID || id == MT29F2G_ID || id == MT29F4G_ID)) || + (id == MT29F1G_ID || id == MT29F2G_ID || id == MT29F4G_ID || id == MT29F8G_ID)) || (mfr == K9F1G08R0A_MFR && (id == K9F1G08R0A_ID))) { return 0; } else { diff --git a/include/configs/omap3530gta04.h b/include/configs/omap3530gta04.h index 3e6ef21..645f48f 100644 --- a/include/configs/omap3530gta04.h +++ b/include/configs/omap3530gta04.h @@ -47,7 +47,7 @@ #define CONFIG_BEAGLE_REV2 1 /* Enable the below macro if MMC boot support is required */ -//#define CONFIG_MMC 1 +#define CONFIG_MMC 1 #if defined(CONFIG_MMC) #define CFG_CMD_MMC 1 #define CFG_CMD_FAT 1 @@ -86,7 +86,7 @@ #define SDRC_R_B_C 1 /* Enable the below macro if NAND boot support is required */ -//#define CONFIG_NAND 1 +#define CONFIG_NAND 1 #define NAND_BASE_ADR NAND_BASE #define ONENAND_BASE ONENAND_MAP |