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authorH. Nikolaus Schaller <hns@goldelico.com>2012-04-20 14:10:36 +0200
committerH. Nikolaus Schaller <hns@goldelico.com>2012-04-20 14:10:36 +0200
commit819e36b8ceadb1d67db1ffe91b99c5282bfc6159 (patch)
treecaa2bc25e54f0d41abb61920f29d3bf5eee3d864 /include/asm/byteorder.h
parenta9a9e3f6aed040a12daf64157615f5e9fed974bb (diff)
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diff --git a/include/asm/byteorder.h b/include/asm/byteorder.h
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+/*
+ * linux/include/asm-arm/byteorder.h
+ *
+ * ARM Endian-ness. In little endian mode, the data bus is connected such
+ * that byte accesses appear as:
+ * 0 = d0...d7, 1 = d8...d15, 2 = d16...d23, 3 = d24...d31
+ * and word accesses (data or instruction) appear as:
+ * d0...d31
+ *
+ * When in big endian mode, byte accesses appear as:
+ * 0 = d24...d31, 1 = d16...d23, 2 = d8...d15, 3 = d0...d7
+ * and word accesses (data or instruction) appear as:
+ * d0...d31
+ */
+#ifndef __ASM_ARM_BYTEORDER_H
+#define __ASM_ARM_BYTEORDER_H
+
+
+#include <asm/types.h>
+
+#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
+# define __BYTEORDER_HAS_U64__
+# define __SWAB_64_THRU_32__
+#endif
+
+#ifdef __ARMEB__
+#include <linux/byteorder/big_endian.h>
+#else
+#include <linux/byteorder/little_endian.h>
+#endif
+
+#endif