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m---------uart-loader0
-rw-r--r--uart-loader/include/asm/arch-arm1136/bits.h49
l---------uart-loader/include/asm/arch-arm1136/clocks.h1
l---------uart-loader/include/asm/arch-arm1136/clocks242x.h1
l---------uart-loader/include/asm/arch-arm1136/clocks243x.h1
l---------uart-loader/include/asm/arch-arm1136/mem.h1
-rw-r--r--uart-loader/include/asm/arch-arm1136/omap2420.h223
-rw-r--r--uart-loader/include/asm/arch-arm1136/omap2430.h255
-rw-r--r--uart-loader/include/asm/arch-arm1136/sizes.h50
-rw-r--r--uart-loader/include/asm/arch-arm1136/sys_info.h139
-rw-r--r--uart-loader/include/asm/arch-arm926ejs/sizes.h51
l---------uart-loader/include/asm/arch-omap3/bits.h1
l---------uart-loader/include/asm/arch-omap3/clocks.h1
l---------uart-loader/include/asm/arch-omap3/clocks343x.h1
l---------uart-loader/include/asm/arch-omap3/cpu.h1
l---------uart-loader/include/asm/arch-omap3/dpll_table_34xx.S1
l---------uart-loader/include/asm/arch-omap3/dpll_table_36xx.S1
l---------uart-loader/include/asm/arch-omap3/mem.h1
-rw-r--r--uart-loader/include/asm/arch-omap3/mmc.h187
l---------uart-loader/include/asm/arch-omap3/mux.h1
l---------uart-loader/include/asm/arch-omap3/omap3430.h1
l---------uart-loader/include/asm/arch-omap3/rev.h1
l---------uart-loader/include/asm/arch-omap3/sizes.h1
l---------uart-loader/include/asm/arch-omap3/sys_info.h1
l---------uart-loader/include/asm/arch-omap3/sys_proto.h1
-rw-r--r--uart-loader/include/asm/atomic.h113
l---------uart-loader/include/asm/byteorder.h1
-rw-r--r--uart-loader/include/asm/posix_types.h79
-rw-r--r--uart-loader/include/asm/setup.h269
-rw-r--r--uart-loader/include/asm/sizes.h52
-rw-r--r--uart-loader/include/asm/string.h47
-rw-r--r--uart-loader/include/asm/types.h50
-rw-r--r--uart-loader/include/asm/x-load-arm.h40
l---------uart-loader/include/command.h1
-rw-r--r--uart-loader/include/common.h110
-rw-r--r--uart-loader/include/configs/omap3430labrador.h220
l---------uart-loader/include/fat.h1
l---------uart-loader/include/ide.h1
l---------uart-loader/include/linux/byteorder1
-rw-r--r--uart-loader/include/linux/config.h6
-rw-r--r--uart-loader/include/linux/posix_types.h48
l---------uart-loader/include/linux/stat.h1
-rw-r--r--uart-loader/include/linux/stddef.h18
l---------uart-loader/include/linux/time.h1
-rw-r--r--uart-loader/include/linux/types.h130
l---------uart-loader/include/malloc.h1
l---------uart-loader/include/mmc.h1
-rw-r--r--uart-loader/include/ns16550.h130
l---------uart-loader/include/part.h1
49 files changed, 2293 insertions, 0 deletions
diff --git a/uart-loader b/uart-loader
deleted file mode 160000
-Subproject eb8b047c29a2027fbdd841cd1289fa27ddb22d7
diff --git a/uart-loader/include/asm/arch-arm1136/bits.h b/uart-loader/include/asm/arch-arm1136/bits.h
new file mode 100644
index 0000000..dc3273e
--- /dev/null
+++ b/uart-loader/include/asm/arch-arm1136/bits.h
@@ -0,0 +1,49 @@
+/* bits.h
+ * Copyright (c) 2004 Texas Instruments
+ *
+ * This package is free software; you can redistribute it and/or
+ * modify it under the terms of the license found in the file
+ * named COPYING that should have accompanied this file.
+ *
+ * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
+ * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ */
+#ifndef __bits_h
+#define __bits_h 1
+
+#define BIT0 (1<<0)
+#define BIT1 (1<<1)
+#define BIT2 (1<<2)
+#define BIT3 (1<<3)
+#define BIT4 (1<<4)
+#define BIT5 (1<<5)
+#define BIT6 (1<<6)
+#define BIT7 (1<<7)
+#define BIT8 (1<<8)
+#define BIT9 (1<<9)
+#define BIT10 (1<<10)
+#define BIT11 (1<<11)
+#define BIT12 (1<<12)
+#define BIT13 (1<<13)
+#define BIT14 (1<<14)
+#define BIT15 (1<<15)
+#define BIT16 (1<<16)
+#define BIT17 (1<<17)
+#define BIT18 (1<<18)
+#define BIT19 (1<<19)
+#define BIT20 (1<<20)
+#define BIT21 (1<<21)
+#define BIT22 (1<<22)
+#define BIT23 (1<<23)
+#define BIT24 (1<<24)
+#define BIT25 (1<<25)
+#define BIT26 (1<<26)
+#define BIT27 (1<<27)
+#define BIT28 (1<<28)
+#define BIT29 (1<<29)
+#define BIT30 (1<<30)
+#define BIT31 (1<<31)
+
+#endif
+
diff --git a/uart-loader/include/asm/arch-arm1136/clocks.h b/uart-loader/include/asm/arch-arm1136/clocks.h
new file mode 120000
index 0000000..c4b03ba
--- /dev/null
+++ b/uart-loader/include/asm/arch-arm1136/clocks.h
@@ -0,0 +1 @@
+../../../../u-boot/include/asm-arm/arch-arm1136/clocks.h \ No newline at end of file
diff --git a/uart-loader/include/asm/arch-arm1136/clocks242x.h b/uart-loader/include/asm/arch-arm1136/clocks242x.h
new file mode 120000
index 0000000..f080726
--- /dev/null
+++ b/uart-loader/include/asm/arch-arm1136/clocks242x.h
@@ -0,0 +1 @@
+../../../../u-boot/include/asm-arm/arch-arm1136/clocks242x.h \ No newline at end of file
diff --git a/uart-loader/include/asm/arch-arm1136/clocks243x.h b/uart-loader/include/asm/arch-arm1136/clocks243x.h
new file mode 120000
index 0000000..703bdce
--- /dev/null
+++ b/uart-loader/include/asm/arch-arm1136/clocks243x.h
@@ -0,0 +1 @@
+../../../../u-boot/include/asm-arm/arch-arm1136/clocks243x.h \ No newline at end of file
diff --git a/uart-loader/include/asm/arch-arm1136/mem.h b/uart-loader/include/asm/arch-arm1136/mem.h
new file mode 120000
index 0000000..dd453b2
--- /dev/null
+++ b/uart-loader/include/asm/arch-arm1136/mem.h
@@ -0,0 +1 @@
+../../../../u-boot/include/asm-arm/arch-arm1136/mem.h \ No newline at end of file
diff --git a/uart-loader/include/asm/arch-arm1136/omap2420.h b/uart-loader/include/asm/arch-arm1136/omap2420.h
new file mode 100644
index 0000000..2164b68
--- /dev/null
+++ b/uart-loader/include/asm/arch-arm1136/omap2420.h
@@ -0,0 +1,223 @@
+/*
+ * Copyright (C) 2005 Texas Instruments, <www.ti.com>
+ *
+ * (C) Copyright 2004
+ * Texas Instruments, <www.ti.com>
+ * Richard Woodruff <r-woodruff2@ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _OMAP2420_SYS_H_
+#define _OMAP2420_SYS_H_
+
+#include <asm/arch/sizes.h>
+
+
+#define __raw_writeb(v,a) (*(volatile unsigned char *)(a) = (v))
+#define __raw_writew(v,a) (*(volatile unsigned short *)(a) = (v))
+#define __raw_writel(v,a) (*(volatile unsigned int *)(a) = (v))
+
+#define __raw_readb(a) (*(volatile unsigned char *)(a))
+#define __raw_readw(a) (*(volatile unsigned short *)(a))
+#define __raw_readl(a) (*(volatile unsigned int *)(a))
+
+
+/*
+ * 2420 specific Section
+ */
+
+/* CONTROL */
+#define OMAP2420_CTRL_BASE (0x48000000)
+#define CONTROL_STATUS (OMAP2420_CTRL_BASE + 0x2F8)
+
+/* TAP information */
+#define OMAP2420_TAP_BASE (0x48014000)
+#define TAP_IDCODE_REG (OMAP2420_TAP_BASE+0x204)
+
+/* GPMC */
+#define OMAP2420_GPMC_BASE (0x6800A000)
+#define GPMC_SYSCONFIG (OMAP2420_GPMC_BASE+0x10)
+#define GPMC_SYSSTATUS (OMAP2420_GPMC_BASE+0x14)
+#define GPMC_IRQENABLE (OMAP2420_GPMC_BASE+0x1C)
+#define GPMC_TIMEOUT_CONTROL (OMAP2420_GPMC_BASE+0x40)
+#define GPMC_CONFIG (OMAP2420_GPMC_BASE+0x50)
+#define GPMC_CONFIG1_0 (OMAP2420_GPMC_BASE+0x60)
+#define GPMC_CONFIG2_0 (OMAP2420_GPMC_BASE+0x64)
+#define GPMC_CONFIG3_0 (OMAP2420_GPMC_BASE+0x68)
+#define GPMC_CONFIG4_0 (OMAP2420_GPMC_BASE+0x6C)
+#define GPMC_CONFIG5_0 (OMAP2420_GPMC_BASE+0x70)
+#define GPMC_CONFIG6_0 (OMAP2420_GPMC_BASE+0x74)
+#define GPMC_CONFIG7_0 (OMAP2420_GPMC_BASE+0x78)
+#define GPMC_CONFIG1_1 (OMAP2420_GPMC_BASE+0x90)
+#define GPMC_CONFIG2_1 (OMAP2420_GPMC_BASE+0x94)
+#define GPMC_CONFIG3_1 (OMAP2420_GPMC_BASE+0x98)
+#define GPMC_CONFIG4_1 (OMAP2420_GPMC_BASE+0x9C)
+#define GPMC_CONFIG5_1 (OMAP2420_GPMC_BASE+0xA0)
+#define GPMC_CONFIG6_1 (OMAP2420_GPMC_BASE+0xA4)
+#define GPMC_CONFIG7_1 (OMAP2420_GPMC_BASE+0xA8)
+
+/* SMS */
+#define OMAP2420_SMS_BASE 0x68008000
+#define SMS_SYSCONFIG (OMAP2420_SMS_BASE+0x10)
+
+/* SDRC */
+#define OMAP2420_SDRC_BASE 0x68009000
+#define SDRC_SYSCONFIG (OMAP2420_SDRC_BASE+0x10)
+#define SDRC_STATUS (OMAP2420_SDRC_BASE+0x14)
+#define SDRC_SHARING (OMAP2420_SDRC_BASE+0x44)
+#define SDRC_DLLA_CTRL (OMAP2420_SDRC_BASE+0x60)
+#define SDRC_DLLA_STATUS (OMAP2420_SDRC_BASE+0x64)
+#define SDRC_DLLB_CTRL (OMAP2420_SDRC_BASE+0x68)
+#define SDRC_POWER (OMAP2420_SDRC_BASE+0x70)
+#define SDRC_MCFG_0 (OMAP2420_SDRC_BASE+0x80)
+#define SDRC_MR_0 (OMAP2420_SDRC_BASE+0x84)
+#define SDRC_ACTIM_CTRLA_0 (OMAP2420_SDRC_BASE+0x9C)
+#define SDRC_ACTIM_CTRLB_0 (OMAP2420_SDRC_BASE+0xA0)
+#define SDRC_MCFG_1 (OMAP2420_SDRC_BASE+0xB0)
+#define SDRC_MR_1 (OMAP2420_SDRC_BASE+0xB4)
+#define SDRC_EMR2_1 (OMAP2420_SDRC_BASE+0xBC)
+#define SDRC_ACTIM_CTRLA_1 (OMAP2420_SDRC_BASE+0xC4)
+#define SDRC_ACTIM_CTRLB_1 (OMAP2420_SDRC_BASE+0xC8)
+#define SDRC_RFR_CTRL (OMAP2420_SDRC_BASE+0xA4)
+#define SDRC_MANUAL_0 (OMAP2420_SDRC_BASE+0xA8)
+#define SDRC_RFR_CTRL1 (OMAP2420_SDRC_BASE+0xD4)
+#define SDRC_MANUAL_1 (OMAP2420_SDRC_BASE+0xD8)
+
+#define OMAP2420_SDRC_CS0 0x80000000
+#define OMAP2420_SDRC_CS1 0xA0000000
+
+#define LOADDLL BIT2
+#define CMD_NOP 0x0
+#define CMD_PRECHARGE 0x1
+#define CMD_AUTOREFRESH 0x2
+#define CMD_ENTR_PWRDOWN 0x3
+#define CMD_EXIT_PWRDOWN 0x4
+#define CMD_ENTR_SRFRSH 0x5
+#define CMD_CKE_HIGH 0x6
+#define CMD_CKE_LOW 0x7
+#define SOFTRESET BIT1
+#define SMART_IDLE (0x2 << 3)
+#define REF_ON_IDLE (0x1 << 6)
+
+
+/* UART */
+#define OMAP2420_UART1 0x4806A000
+#define OMAP2420_UART2 0x4806C000
+#define OMAP2420_UART3 0x4806E000
+
+/* General Purpose Timers */
+#define OMAP2420_GPT1 0x48028000
+#define OMAP2420_GPT2 0x4802A000
+#define OMAP2420_GPT3 0x48078000
+#define OMAP2420_GPT4 0x4807A000
+#define OMAP2420_GPT5 0x4807C000
+#define OMAP2420_GPT6 0x4807E000
+#define OMAP2420_GPT7 0x48080000
+#define OMAP2420_GPT8 0x48082000
+#define OMAP2420_GPT9 0x48084000
+#define OMAP2420_GPT10 0x48086000
+#define OMAP2420_GPT11 0x48088000
+#define OMAP2420_GPT12 0x4808A000
+
+/* timer regs offsets (32 bit regs) */
+#define TIDR 0x0 /* r */
+#define TIOCP_CFG 0x10 /* rw */
+#define TISTAT 0x14 /* r */
+#define TISR 0x18 /* rw */
+#define TIER 0x1C /* rw */
+#define TWER 0x20 /* rw */
+#define TCLR 0x24 /* rw */
+#define TCRR 0x28 /* rw */
+#define TLDR 0x2C /* rw */
+#define TTGR 0x30 /* rw */
+#define TWPS 0x34 /* r */
+#define TMAR 0x38 /* rw */
+#define TCAR1 0x3c /* r */
+#define TSICR 0x40 /* rw */
+#define TCAR2 0x44 /* r */
+
+/* WatchDog Timers (1 secure, 3 GP) */
+#define WD1_BASE 0x48020000
+#define WD2_BASE 0x48022000
+#define WD3_BASE 0x48024000
+#define WD4_BASE 0x48026000
+#define WWPS 0x34 /* r */
+#define WSPR 0x48 /* rw */
+#define WD_UNLOCK1 0xAAAA
+#define WD_UNLOCK2 0x5555
+
+/* PRCM */
+#define OMAP2420_CM_BASE 0x48008000
+#define PRCM_CLKCFG_CTRL (OMAP2420_CM_BASE+0x080)
+#define CM_CLKSEL_MPU (OMAP2420_CM_BASE+0x140)
+#define CM_FCLKEN1_CORE (OMAP2420_CM_BASE+0x200)
+#define CM_FCLKEN2_CORE (OMAP2420_CM_BASE+0x204)
+#define CM_ICLKEN1_CORE (OMAP2420_CM_BASE+0x210)
+#define CM_ICLKEN2_CORE (OMAP2420_CM_BASE+0x214)
+#define CM_CLKSEL1_CORE (OMAP2420_CM_BASE+0x240)
+#define CM_CLKSEL_WKUP (OMAP2420_CM_BASE+0x440)
+#define CM_CLKSEL2_CORE (OMAP2420_CM_BASE+0x244)
+#define CM_CLKSEL_GFX (OMAP2420_CM_BASE+0x340)
+#define PM_RSTCTRL_WKUP (OMAP2420_CM_BASE+0x450)
+#define CM_CLKEN_PLL (OMAP2420_CM_BASE+0x500)
+#define CM_IDLEST_CKGEN (OMAP2420_CM_BASE+0x520)
+#define CM_CLKSEL1_PLL (OMAP2420_CM_BASE+0x540)
+#define CM_CLKSEL2_PLL (OMAP2420_CM_BASE+0x544)
+#define CM_CLKSEL_DSP (OMAP2420_CM_BASE+0x840)
+
+/*
+ * H4 specific Section
+ */
+
+/*
+ * The 2420's chip selects are programmable. The mask ROM
+ * does configure CS0 to 0x08000000 before dispatch. So, if
+ * you want your code to live below that address, you have to
+ * be prepared to jump though hoops, to reset the base address.
+ */
+#if defined(CONFIG_OMAP2420H4)
+/* GPMC */
+#ifdef CONFIG_VIRTIO_A /* Pre version B */
+# define H4_CS0_BASE 0x08000000 /* flash (64 Meg aligned) */
+# define H4_CS1_BASE 0x04000000 /* debug board */
+# define H4_CS2_BASE 0x0A000000 /* wifi board */
+#else
+# define H4_CS0_BASE 0x04000000 /* flash (64 Meg aligned) */
+# define H4_CS1_BASE 0x08000000 /* debug board */
+# define H4_CS2_BASE 0x0A000000 /* wifi board */
+#endif
+
+/* base address for indirect vectors (internal boot mode) */
+#define SRAM_OFFSET0 0x40000000
+#define SRAM_OFFSET1 0x00200000
+#define SRAM_OFFSET2 0x0000F800
+#define SRAM_VECT_CODE (SRAM_OFFSET0|SRAM_OFFSET1|SRAM_OFFSET2)
+
+#define LOW_LEVEL_SRAM_STACK 0x4020FFFC
+
+#define PERIFERAL_PORT_BASE 0x480FE003
+
+/* FPGA on Debug board.*/
+#define ETH_CONTROL_REG (H4_CS1_BASE+0x30b)
+#define LAN_RESET_REGISTER (H4_CS1_BASE+0x1c)
+#endif /* endif CONFIG_2420H4 */
+
+#endif
+
diff --git a/uart-loader/include/asm/arch-arm1136/omap2430.h b/uart-loader/include/asm/arch-arm1136/omap2430.h
new file mode 100644
index 0000000..cf2b0f9
--- /dev/null
+++ b/uart-loader/include/asm/arch-arm1136/omap2430.h
@@ -0,0 +1,255 @@
+/*
+ * (C) Copyright 2004-2005
+ * Texas Instruments, <www.ti.com>
+ * Richard Woodruff <r-woodruff2@ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _OMAP2430_SYS_H_
+#define _OMAP2430_SYS_H_
+
+#include <asm/arch/sizes.h>
+
+
+#define __raw_writeb(v,a) (*(volatile unsigned char *)(a) = (v))
+#define __raw_writew(v,a) (*(volatile unsigned short *)(a) = (v))
+#define __raw_writel(v,a) (*(volatile unsigned int *)(a) = (v))
+
+#define __raw_readb(a) (*(volatile unsigned char *)(a))
+#define __raw_readw(a) (*(volatile unsigned short *)(a))
+#define __raw_readl(a) (*(volatile unsigned int *)(a))
+
+/* device type */
+#define DEVICE_MASK (BIT8|BIT9|BIT10)
+#define TST_DEVICE 0x0
+#define EMU_DEVICE 0x1
+#define HS_DEVICE 0x2
+#define GP_DEVICE 0x3
+
+/*
+ * 2430 specific Section
+ */
+#define OMAP243X_CORE_L4_IO_BASE 0x48000000
+#define OMAP243X_WAKEUP_L4_IO_BASE 0x49000000
+#define OMAP24XX_L4_IO_BASE OMAP243X_CORE_L4_IO_BASE
+
+
+/* CONTROL */
+#define OMAP24XX_CTRL_BASE (OMAP243X_WAKEUP_L4_IO_BASE+0x2000)
+#define CONTROL_STATUS (OMAP24XX_CTRL_BASE + 0x2F8)
+
+/* TAP information */
+#define OMAP24XX_TAP_BASE (OMAP243X_WAKEUP_L4_IO_BASE+0xA000)
+#define TAP_IDCODE_REG (OMAP24XX_TAP_BASE+0x204)
+
+/*
+ GPMC : In 2430 NOR and NAND can coexist.
+ During NAND booting , NAND is at CS0 and NOR at CS1
+ and Debug FPGA is GPMC_CS5
+*/
+#define OMAP24XX_GPMC_BASE (0x6E000000)
+
+#define GPMC_SYSCONFIG (OMAP24XX_GPMC_BASE+0x10)
+#define GPMC_SYSSTATUS (OMAP24XX_GPMC_BASE+0x14)
+#define GPMC_IRQENABLE (OMAP24XX_GPMC_BASE+0x1C)
+#define GPMC_TIMEOUT_CONTROL (OMAP24XX_GPMC_BASE+0x40)
+#define GPMC_CONFIG (OMAP24XX_GPMC_BASE+0x50)
+#define GPMC_CONFIG1_0 (OMAP24XX_GPMC_BASE+0x60)
+#define GPMC_CONFIG2_0 (OMAP24XX_GPMC_BASE+0x64)
+#define GPMC_CONFIG3_0 (OMAP24XX_GPMC_BASE+0x68)
+#define GPMC_CONFIG4_0 (OMAP24XX_GPMC_BASE+0x6C)
+#define GPMC_CONFIG5_0 (OMAP24XX_GPMC_BASE+0x70)
+#define GPMC_CONFIG6_0 (OMAP24XX_GPMC_BASE+0x74)
+#define GPMC_CONFIG7_0 (OMAP24XX_GPMC_BASE+0x78)
+#define GPMC_CONFIG1_1 (OMAP24XX_GPMC_BASE+0x90)
+#define GPMC_CONFIG2_1 (OMAP24XX_GPMC_BASE+0x94)
+#define GPMC_CONFIG3_1 (OMAP24XX_GPMC_BASE+0x98)
+#define GPMC_CONFIG4_1 (OMAP24XX_GPMC_BASE+0x9C)
+#define GPMC_CONFIG5_1 (OMAP24XX_GPMC_BASE+0xA0)
+#define GPMC_CONFIG6_1 (OMAP24XX_GPMC_BASE+0xA4)
+#define GPMC_CONFIG7_1 (OMAP24XX_GPMC_BASE+0xA8)
+#define GPMC_CONFIG1_5 (OMAP24XX_GPMC_BASE+0x150)
+#define GPMC_CONFIG2_5 (OMAP24XX_GPMC_BASE+0x154)
+#define GPMC_CONFIG3_5 (OMAP24XX_GPMC_BASE+0x158)
+#define GPMC_CONFIG4_5 (OMAP24XX_GPMC_BASE+0x15C)
+#define GPMC_CONFIG5_5 (OMAP24XX_GPMC_BASE+0x160)
+#define GPMC_CONFIG6_5 (OMAP24XX_GPMC_BASE+0x164)
+#define GPMC_CONFIG7_5 (OMAP24XX_GPMC_BASE+0x168)
+
+
+/* SMS */
+#define OMAP24XX_SMS_BASE 0x6C000000
+#define SMS_SYSCONFIG (OMAP24XX_SMS_BASE+0x10)
+
+/* SDRC */
+#define OMAP24XX_SDRC_BASE 0x6D000000
+#define OMAP24XX_SDRC_CS0 0x80000000
+#define OMAP24XX_SDRC_CS1 0xA0000000
+#define SDRC_SYSCONFIG (OMAP24XX_SDRC_BASE+0x10)
+#define SDRC_STATUS (OMAP24XX_SDRC_BASE+0x14)
+#define SDRC_SHARING (OMAP24XX_SDRC_BASE+0x44)
+#define SDRC_DLLA_CTRL (OMAP24XX_SDRC_BASE+0x60)
+#define SDRC_DLLA_STATUS (OMAP24XX_SDRC_BASE+0x64)
+#define SDRC_DLLB_CTRL (OMAP24XX_SDRC_BASE+0x68)
+#define SDRC_POWER (OMAP24XX_SDRC_BASE+0x70)
+#define SDRC_MCFG_0 (OMAP24XX_SDRC_BASE+0x80)
+#define SDRC_MR_0 (OMAP24XX_SDRC_BASE+0x84)
+#define SDRC_ACTIM_CTRLA_0 (OMAP24XX_SDRC_BASE+0x9C)
+#define SDRC_ACTIM_CTRLB_0 (OMAP24XX_SDRC_BASE+0xA0)
+#define SDRC_MCFG_1 (OMAP24XX_SDRC_BASE+0xB0)
+#define SDRC_ACTIM_CTRLA_1 (OMAP24XX_SDRC_BASE+0xC4)
+#define SDRC_ACTIM_CTRLB_1 (OMAP24XX_SDRC_BASE+0xC8)
+#define SDRC_RFR_CTRL (OMAP24XX_SDRC_BASE+0xA4)
+#define SDRC_MANUAL_0 (OMAP24XX_SDRC_BASE+0xA8)
+#define SDRC_RFR_CTRL1 (OMAP24XX_SDRC_BASE+0xD4)
+
+#define LOADDLL BIT2
+#define CMD_NOP 0x0
+#define CMD_PRECHARGE 0x1
+#define CMD_AUTOREFRESH 0x2
+#define CMD_ENTR_PWRDOWN 0x3
+#define CMD_EXIT_PWRDOWN 0x4
+#define CMD_ENTR_SRFRSH 0x5
+#define CMD_CKE_HIGH 0x6
+#define CMD_CKE_LOW 0x7
+#define SOFTRESET BIT1
+#define SMART_IDLE (0x2 << 3)
+#define REF_ON_IDLE (0x1 << 6)
+
+
+/* UART */
+#define OMAP2430_UART1 0x4806A000
+#define OMAP2430_UART2 0x4806C000
+#define OMAP2430_UART3 0x4806E000
+
+/* General Purpose Timers */
+#define OMAP24XX_GPT1 (OMAP243X_WAKEUP_L4_IO_BASE+0x18000)
+#define OMAP24XX_GPT2 (OMAP24XX_L4_IO_BASE+0x2A000)
+#define OMAP24XX_GPT3 (OMAP24XX_L4_IO_BASE+0x78000)
+#define OMAP24XX_GPT4 (OMAP24XX_L4_IO_BASE+0x7A000)
+#define OMAP24XX_GPT5 (OMAP24XX_L4_IO_BASE+0x7C000)
+#define OMAP24XX_GPT6 (OMAP24XX_L4_IO_BASE+0x7E000)
+#define OMAP24XX_GPT7 (OMAP24XX_L4_IO_BASE+0x80000)
+#define OMAP24XX_GPT8 (OMAP24XX_L4_IO_BASE+0x82000)
+#define OMAP24XX_GPT9 (OMAP24XX_L4_IO_BASE+0x84000)
+#define OMAP24XX_GPT10 (OMAP24XX_L4_IO_BASE+0x86000)
+#define OMAP24XX_GPT11 (OMAP24XX_L4_IO_BASE+0x88000)
+#define OMAP24XX_GPT12 (OMAP24XX_L4_IO_BASE+0x8A000
+
+/* timer regs offsets (32 bit regs) */
+#define TIDR 0x0 /* r */
+#define TIOCP_CFG 0x10 /* rw */
+#define TISTAT 0x14 /* r */
+#define TISR 0x18 /* rw */
+#define TIER 0x1C /* rw */
+#define TWER 0x20 /* rw */
+#define TCLR 0x24 /* rw */
+#define TCRR 0x28 /* rw */
+#define TLDR 0x2C /* rw */
+#define TTGR 0x30 /* rw */
+#define TWPS 0x34 /* r */
+#define TMAR 0x38 /* rw */
+#define TCAR1 0x3c /* r */
+#define TSICR 0x40 /* rw */
+#define TCAR2 0x44 /* r */
+
+/* WatchDog Timers (1 secure, 3 GP) */
+#define WD1_BASE (OMAP243X_WAKEUP_L4_IO_BASE+0x14000)
+#define WD2_BASE (OMAP243X_WAKEUP_L4_IO_BASE+0x16000)
+#define WD3_BASE (OMAP24XX_L4_IO_BASE+0x24000) /* not present */
+#define WD4_BASE (OMAP24XX_L4_IO_BASE+0x26000)
+
+/* 32KTIMER */
+#define SYNC_32KTIMER_BASE (OMAP243X_WAKEUP_L4_IO_BASE+0x20000)
+#define S32K_CR (SYNC_32KTIMER_BASE+0x10)
+
+#define WWPS 0x34 /* r */
+#define WSPR 0x48 /* rw */
+#define WD_UNLOCK1 0xAAAA
+#define WD_UNLOCK2 0x5555
+
+/* PRCM */
+#define OMAP24XX_CM_BASE (OMAP243X_WAKEUP_L4_IO_BASE+0x06000)
+
+#define PRCM_CLKSRC_CTRL (OMAP24XX_CM_BASE+0x060)
+#define PRCM_CLKOUT_CTRL (OMAP24XX_CM_BASE+0x070)
+#define PRCM_CLKEMUL_CTRL (OMAP24XX_CM_BASE+0x078)
+#define PRCM_CLKCFG_CTRL (OMAP24XX_CM_BASE+0x080)
+#define PRCM_CLKCFG_STATUS (OMAP24XX_CM_BASE+0x084)
+#define CM_CLKSEL_MPU (OMAP24XX_CM_BASE+0x140)
+#define CM_FCLKEN1_CORE (OMAP24XX_CM_BASE+0x200)
+#define CM_FCLKEN2_CORE (OMAP24XX_CM_BASE+0x204)
+#define CM_ICLKEN1_CORE (OMAP24XX_CM_BASE+0x210)
+#define CM_ICLKEN2_CORE (OMAP24XX_CM_BASE+0x214)
+#define CM_CLKSEL1_CORE (OMAP24XX_CM_BASE+0x240)
+#define CM_CLKSEL_WKUP (OMAP24XX_CM_BASE+0x440)
+#define CM_CLKSEL2_CORE (OMAP24XX_CM_BASE+0x244)
+#define CM_FCLKEN_GFX (OMAP24XX_CM_BASE+0x300)
+#define CM_ICLKEN_GFX (OMAP24XX_CM_BASE+0x310)
+#define CM_CLKSEL_GFX (OMAP24XX_CM_BASE+0x340)
+#define RM_RSTCTRL_GFX (OMAP24XX_CM_BASE+0x350)
+#define CM_FCLKEN_WKUP (OMAP24XX_CM_BASE+0x400)
+#define CM_ICLKEN_WKUP (OMAP24XX_CM_BASE+0x410)
+#define PM_RSTCTRL_WKUP (OMAP24XX_CM_BASE+0x450)
+#define CM_CLKEN_PLL (OMAP24XX_CM_BASE+0x500)
+#define CM_IDLEST_CKGEN (OMAP24XX_CM_BASE+0x520)
+#define CM_CLKSEL1_PLL (OMAP24XX_CM_BASE+0x540)
+#define CM_CLKSEL2_PLL (OMAP24XX_CM_BASE+0x544)
+#define CM_CLKSEL_DSP (OMAP24XX_CM_BASE+0x840)
+#define CM_CLKSEL_MDM (OMAP24XX_CM_BASE+0xC40)
+
+/* SMX-APE */
+#define SMX_APE_BASE 0x68000000
+#define PM_RT_APE_BASE_ADDR_ARM (SMX_APE_BASE + 0x10000)
+#define PM_GPMC_BASE_ADDR_ARM (SMX_APE_BASE + 0x12400)
+#define PM_OCM_RAM_BASE_ADDR_ARM (SMX_APE_BASE + 0x12800)
+#define PM_OCM_ROM_BASE_ADDR_ARM (SMX_APE_BASE + 0x12C00)
+
+/* IVA2 */
+#define PM_IVA2_BASE_ADDR_ARM (SMX_APE_BASE + 0x14000)
+
+/*
+ * The 2430's chip selects are programmable. The mask ROM
+ * does configure CS0 to 0x08000000 before dispatch. So, if
+ * you want your code to live below that address, you have to
+ * be prepared to jump though hoops, to reset the base address.
+ */
+#if defined(CONFIG_OMAP243X)
+
+/* GPMC */
+/* This is being used by the macros in mem.h. PHYS_FLASH_1 is defined to H4_CS0_BASE */
+# define H4_CS1_BASE 0x09000000 /* flash (64 Meg aligned) */
+#define CFG_FLASH_BASE H4_CS1_BASE
+#define DEBUG_BASE 0x08000000
+
+/* base address for indirect vectors (internal boot mode) */
+#define SRAM_OFFSET0 0x40000000
+#define SRAM_OFFSET1 0x00200000
+#define SRAM_OFFSET2 0x0000F800
+#define SRAM_VECT_CODE (SRAM_OFFSET0|SRAM_OFFSET1|SRAM_OFFSET2)
+
+#define LOW_LEVEL_SRAM_STACK 0x4020FFFC
+
+#define PERIFERAL_PORT_BASE 0x480FE003
+
+#endif /* endif CONFIG_2430SDP */
+
+#endif
+
diff --git a/uart-loader/include/asm/arch-arm1136/sizes.h b/uart-loader/include/asm/arch-arm1136/sizes.h
new file mode 100644
index 0000000..3dddd8e
--- /dev/null
+++ b/uart-loader/include/asm/arch-arm1136/sizes.h
@@ -0,0 +1,50 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+/* Size defintions
+ * Copyright (C) ARM Limited 1998. All rights reserved.
+ */
+
+#ifndef __sizes_h
+#define __sizes_h 1
+
+/* handy sizes */
+#define SZ_1K 0x00000400
+#define SZ_4K 0x00001000
+#define SZ_8K 0x00002000
+#define SZ_16K 0x00004000
+#define SZ_32K 0x00008000
+#define SZ_64K 0x00010000
+#define SZ_128K 0x00020000
+#define SZ_256K 0x00040000
+#define SZ_512K 0x00080000
+
+#define SZ_1M 0x00100000
+#define SZ_2M 0x00200000
+#define SZ_4M 0x00400000
+#define SZ_8M 0x00800000
+#define SZ_16M 0x01000000
+#define SZ_31M 0x01F00000
+#define SZ_32M 0x02000000
+#define SZ_64M 0x04000000
+#define SZ_128M 0x08000000
+#define SZ_256M 0x10000000
+#define SZ_512M 0x20000000
+
+#define SZ_1G 0x40000000
+#define SZ_2G 0x80000000
+
+#endif /* __sizes_h */
+
diff --git a/uart-loader/include/asm/arch-arm1136/sys_info.h b/uart-loader/include/asm/arch-arm1136/sys_info.h
new file mode 100644
index 0000000..94a09cd
--- /dev/null
+++ b/uart-loader/include/asm/arch-arm1136/sys_info.h
@@ -0,0 +1,139 @@
+/*
+ * Copyright 2005 (C) Texas Instruments, <www.ti.com>
+ * (C) Copyright 2004
+ * Texas Instruments, <www.ti.com>
+ * Richard Woodruff <r-woodruff2@ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _OMAP24XX_SYS_INFO_H_
+#define _OMAP24XX_SYS_INFO_H_
+
+#if 0
+typedef struct h4_system_data {
+ /* base board info */
+ u32 base_b_rev; /* rev from base board i2c */
+ /* cpu board info */
+ u32 cpu_b_rev; /* rev from cpu board i2c */
+ u32 cpu_b_mux; /* mux type on daughter board */
+ u32 cpu_b_ddr_type; /* mem type */
+ u32 cpu_b_ddr_speed; /* ddr speed rating */
+ u32 cpu_b_switches; /* boot ctrl switch settings */
+ /* cpu info */
+ u32 cpu_type; /* type of cpu; 2420, 2422, 2430,...*/
+ u32 cpu_rev; /* rev of given cpu; ES1, ES2,...*/
+} h4_sys_data;
+
+#endif
+
+#define XDR_POP 5 /* package on package part */
+#define SDR_DISCRETE 4 /* 128M memory SDR module*/
+#define DDR_STACKED 3 /* stacked part on 2422 */
+#define DDR_COMBO 2 /* combo part on cpu daughter card (menalaeus) */
+#define DDR_DISCRETE 1 /* 2x16 parts on daughter card */
+
+#define DDR_100 100 /* type found on most mem d-boards */
+#define DDR_111 111 /* some combo parts */
+#define DDR_133 133 /* most combo, some mem d-boards */
+#define DDR_165 165 /* future parts */
+
+#define CPU_2420 0x2420
+#define CPU_2422 0x2422 /* 2420 + 64M stacked */
+#define CPU_2423 0x2423 /* 2420 + 96M stacked */
+#define CPU_2430 0x2430
+
+/* 242x real hardware:
+ * ES1 = rev 0
+ * ES2 = rev 1
+ * ES2.05 = rev 2
+ * ES2.1 = rev 3
+ * ES2.1.1 = rev 4
+ */
+
+/* 242x code defines:
+ * ES1 = 0+1 = 1
+ * ES2 = 1+1 = 2
+ * ES2.05 = 2+1 = 3
+ * ES2.1 = 3+1 = 4
+ * Es2.1.1 = 4+1 = 5
+ */
+#define CPU_2422_ES1 1
+#define CPU_2422_ES2 2
+#define CPU_2422_ES2_05 3
+#define CPU_2422_ES2_1 4
+#define CPU_2422_ES2_1_1 5
+
+#define CPU_2420_ES1 1
+#define CPU_2420_ES2 2
+#define CPU_2420_ES2_05 3
+#define CPU_2420_ES2_1 4
+#define CPU_2420_ES2_1_1 5
+
+#define CPU_242X_ES1 1
+#define CPU_242X_ES2 2
+#define CPU_242X_ES2_05 3
+#define CPU_242X_ES2_1 4
+#define CPU_242X_ES2_1_1 5
+
+#define CPU_2420_2422_ES1 1
+#define CPU_2420_2422_ES2_1 4
+
+/* 243x real hardware:
+ * ES1 = rev 0
+ * ES2 = rev 1
+ *
+ * 243x code defines:
+ * ES1 = 0+1 = 1
+ * ES2 = 1+1 = 2
+ */
+#define CPU_2430_ES1 1
+#define CPU_2430_ES2 2
+
+#ifdef VPOM2430
+# define CPU_2430_VIRTIO 3
+#else
+# define CPU_2430_VIRTIO 1
+#endif
+#define CPU_2430_ZEBU 0xD
+
+#define CPU_2420_CHIPID 0x0B5D9000
+#define CPU_2430_CHIPID 0x0B68A000
+#define CPU_24XX_ID_MASK 0x0FFFF000
+#define CPU_242X_REV_MASK 0xF0000000
+#define CPU_242X_PID_MASK 0x000F0000
+
+#define BOARD_H4_MENELAUS 1
+#define BOARD_H4_SDP 2
+#define BOARD_H4_MENELAUS_HRP 3
+#define BOARD_SDP_2430 4
+
+#define GPMC_MUXED 1
+#define GPMC_NONMUXED 0
+
+#define TYPE_NAND 0x800 /* bit pos for nand in gpmc reg */
+#define TYPE_NOR 0x000
+#define TYPE_ONENAND 0x800
+
+#define WIDTH_8BIT 0x0000
+#define WIDTH_16BIT 0x1000 /* bit pos for 16 bit in gpmc */
+
+#define I2C_MENELAUS 0x72 /* i2c id for companion chip */
+
+#endif
diff --git a/uart-loader/include/asm/arch-arm926ejs/sizes.h b/uart-loader/include/asm/arch-arm926ejs/sizes.h
new file mode 100644
index 0000000..ef0b99b
--- /dev/null
+++ b/uart-loader/include/asm/arch-arm926ejs/sizes.h
@@ -0,0 +1,51 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA0 2111-1307
+ * USA
+ */
+/* DO NOT EDIT!! - this file automatically generated
+ * from .s file by awk -f s2h.awk
+ */
+/* Size defintions
+ * Copyright (C) ARM Limited 1998. All rights reserved.
+ */
+
+#ifndef __sizes_h
+#define __sizes_h 1
+
+/* handy sizes */
+#define SZ_1K 0x00000400
+#define SZ_4K 0x00001000
+#define SZ_8K 0x00002000
+#define SZ_16K 0x00004000
+#define SZ_64K 0x00010000
+#define SZ_128K 0x00020000
+#define SZ_256K 0x00040000
+#define SZ_512K 0x00080000
+
+#define SZ_1M 0x00100000
+#define SZ_2M 0x00200000
+#define SZ_4M 0x00400000
+#define SZ_8M 0x00800000
+#define SZ_16M 0x01000000
+#define SZ_32M 0x02000000
+#define SZ_64M 0x04000000
+#define SZ_128M 0x08000000
+#define SZ_256M 0x10000000
+#define SZ_512M 0x20000000
+
+#define SZ_1G 0x40000000
+#define SZ_2G 0x80000000
+
+#endif /* __sizes_h */
diff --git a/uart-loader/include/asm/arch-omap3/bits.h b/uart-loader/include/asm/arch-omap3/bits.h
new file mode 120000
index 0000000..036fe66
--- /dev/null
+++ b/uart-loader/include/asm/arch-omap3/bits.h
@@ -0,0 +1 @@
+../../../../u-boot/include/asm-arm/arch-omap3/bits.h \ No newline at end of file
diff --git a/uart-loader/include/asm/arch-omap3/clocks.h b/uart-loader/include/asm/arch-omap3/clocks.h
new file mode 120000
index 0000000..894fadf
--- /dev/null
+++ b/uart-loader/include/asm/arch-omap3/clocks.h
@@ -0,0 +1 @@
+../../../../u-boot/include/asm-arm/arch-omap3/clocks.h \ No newline at end of file
diff --git a/uart-loader/include/asm/arch-omap3/clocks343x.h b/uart-loader/include/asm/arch-omap3/clocks343x.h
new file mode 120000
index 0000000..92f7376
--- /dev/null
+++ b/uart-loader/include/asm/arch-omap3/clocks343x.h
@@ -0,0 +1 @@
+../../../../u-boot/include/asm-arm/arch-omap3/clocks343x.h \ No newline at end of file
diff --git a/uart-loader/include/asm/arch-omap3/cpu.h b/uart-loader/include/asm/arch-omap3/cpu.h
new file mode 120000
index 0000000..5c88731
--- /dev/null
+++ b/uart-loader/include/asm/arch-omap3/cpu.h
@@ -0,0 +1 @@
+../../../../u-boot/include/asm-arm/arch-omap3/cpu.h \ No newline at end of file
diff --git a/uart-loader/include/asm/arch-omap3/dpll_table_34xx.S b/uart-loader/include/asm/arch-omap3/dpll_table_34xx.S
new file mode 120000
index 0000000..803f515
--- /dev/null
+++ b/uart-loader/include/asm/arch-omap3/dpll_table_34xx.S
@@ -0,0 +1 @@
+../../../../u-boot/include/asm-arm/arch-omap3/dpll_table_34xx.S \ No newline at end of file
diff --git a/uart-loader/include/asm/arch-omap3/dpll_table_36xx.S b/uart-loader/include/asm/arch-omap3/dpll_table_36xx.S
new file mode 120000
index 0000000..e8f2f9b
--- /dev/null
+++ b/uart-loader/include/asm/arch-omap3/dpll_table_36xx.S
@@ -0,0 +1 @@
+../../../../u-boot/include/asm-arm/arch-omap3/dpll_table_36xx.S \ No newline at end of file
diff --git a/uart-loader/include/asm/arch-omap3/mem.h b/uart-loader/include/asm/arch-omap3/mem.h
new file mode 120000
index 0000000..b49b783
--- /dev/null
+++ b/uart-loader/include/asm/arch-omap3/mem.h
@@ -0,0 +1 @@
+../../../../u-boot/include/asm-arm/arch-omap3/mem.h \ No newline at end of file
diff --git a/uart-loader/include/asm/arch-omap3/mmc.h b/uart-loader/include/asm/arch-omap3/mmc.h
new file mode 100644
index 0000000..7bceb5f
--- /dev/null
+++ b/uart-loader/include/asm/arch-omap3/mmc.h
@@ -0,0 +1,187 @@
+/*
+ * linux/drivers/mmc/mmc_pxa.h
+ *
+ * Author: Vladimir Shebordaev, Igor Oblakov
+ * Copyright: MontaVista Software Inc.
+ *
+ * $Id: mmc_pxa.h,v 0.3.1.6 2002/09/25 19:25:48 ted Exp ted $
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __MMC_PXA_P_H__
+#define __MMC_PXA_P_H__
+
+/* PXA-250 MMC controller registers */
+
+/* MMC_STRPCL */
+#define MMC_STRPCL_STOP_CLK (0x0001UL)
+#define MMC_STRPCL_START_CLK (0x0002UL)
+
+/* MMC_STAT */
+
+#define MMC_STAT_ERRORS (MMC_STAT_RES_CRC_ERROR | MMC_STAT_SPI_READ_ERROR_TOKEN\
+ | MMC_STAT_CRC_READ_ERROR | MMC_STAT_TIME_OUT_RESPONSE \
+ | MMC_STAT_READ_TIME_OUT | MMC_STAT_CRC_WRITE_ERROR)
+
+/* MMC_CLKRT */
+#define MMC_CLKRT_20MHZ (0x0000UL)
+#define MMC_CLKRT_10MHZ (0x0001UL)
+#define MMC_CLKRT_5MHZ (0x0002UL)
+#define MMC_CLKRT_2_5MHZ (0x0003UL)
+#define MMC_CLKRT_1_25MHZ (0x0004UL)
+#define MMC_CLKRT_0_625MHZ (0x0005UL)
+#define MMC_CLKRT_0_3125MHZ (0x0006UL)
+
+/* MMC_SPI */
+#define MMC_SPI_DISABLE (0x00UL)
+#define MMC_SPI_EN (0x01UL)
+#define MMC_SPI_CS_EN (0x01UL << 2)
+#define MMC_SPI_CS_ADDRESS (0x01UL << 3)
+#define MMC_SPI_CRC_ON (0x01UL << 1)
+
+/* MMC_CMDAT */
+#define MMC_CMDAT_MMC_DMA_EN (0x0001UL << 7)
+#define MMC_CMDAT_INIT (0x0001UL << 6)
+#define MMC_CMDAT_BUSY (0x0001UL << 5)
+#define MMC_CMDAT_STREAM (0x0001UL << 4)
+#define MMC_CMDAT_BLOCK (0x0000UL << 4)
+#define MMC_CMDAT_WRITE (0x0001UL << 3)
+#define MMC_CMDAT_READ (0x0000UL << 3)
+#define MMC_CMDAT_DATA_EN (0x0001UL << 2)
+#define MMC_CMDAT_R1 (0x0001UL)
+#define MMC_CMDAT_R2 (0x0002UL)
+#define MMC_CMDAT_R3 (0x0003UL)
+
+/* MMC_RESTO */
+#define MMC_RES_TO_MAX (0x007fUL) /* [6:0] */
+
+/* MMC_RDTO */
+#define MMC_READ_TO_MAX (0x0ffffUL) /* [15:0] */
+
+/* MMC_BLKLEN */
+#define MMC_BLK_LEN_MAX (0x03ffUL) /* [9:0] */
+
+/* MMC_PRTBUF */
+#define MMC_PRTBUF_BUF_PART_FULL (0x01UL)
+#define MMC_PRTBUF_BUF_FULL (0x00UL)
+
+/* MMC_I_MASK */
+#define MMC_I_MASK_TXFIFO_WR_REQ (0x01UL << 6)
+#define MMC_I_MASK_RXFIFO_RD_REQ (0x01UL << 5)
+#define MMC_I_MASK_CLK_IS_OFF (0x01UL << 4)
+#define MMC_I_MASK_STOP_CMD (0x01UL << 3)
+#define MMC_I_MASK_END_CMD_RES (0x01UL << 2)
+#define MMC_I_MASK_PRG_DONE (0x01UL << 1)
+#define MMC_I_MASK_DATA_TRAN_DONE (0x01UL)
+#define MMC_I_MASK_ALL (0x07fUL)
+
+
+/* MMC_I_REG */
+#define MMC_I_REG_TXFIFO_WR_REQ (0x01UL << 6)
+#define MMC_I_REG_RXFIFO_RD_REQ (0x01UL << 5)
+#define MMC_I_REG_CLK_IS_OFF (0x01UL << 4)
+#define MMC_I_REG_STOP_CMD (0x01UL << 3)
+#define MMC_I_REG_END_CMD_RES (0x01UL << 2)
+#define MMC_I_REG_PRG_DONE (0x01UL << 1)
+#define MMC_I_REG_DATA_TRAN_DONE (0x01UL)
+#define MMC_I_REG_ALL (0x007fUL)
+
+/* MMC_CMD */
+#define MMC_CMD_INDEX_MAX (0x006fUL) /* [5:0] */
+#define CMD(x) (x)
+
+#define MMC_DEFAULT_RCA 1
+
+#define MMC_BLOCK_SIZE 512
+#define MMC_CMD_RESET 0
+#define MMC_CMD_SEND_OP_COND 1
+#define MMC_CMD_ALL_SEND_CID 2
+#define MMC_CMD_SET_RCA 3
+#define MMC_CMD_SEND_CSD 9
+#define MMC_CMD_SEND_CID 10
+#define MMC_CMD_SEND_STATUS 13
+#define MMC_CMD_SET_BLOCKLEN 16
+#define MMC_CMD_READ_BLOCK 17
+#define MMC_CMD_RD_BLK_MULTI 18
+#define MMC_CMD_WRITE_BLOCK 24
+
+#define MMC_MAX_BLOCK_SIZE 512
+
+#define MMC_R1_IDLE_STATE 0x01
+#define MMC_R1_ERASE_STATE 0x02
+#define MMC_R1_ILLEGAL_CMD 0x04
+#define MMC_R1_COM_CRC_ERR 0x08
+#define MMC_R1_ERASE_SEQ_ERR 0x01
+#define MMC_R1_ADDR_ERR 0x02
+#define MMC_R1_PARAM_ERR 0x04
+
+#define MMC_R1B_WP_ERASE_SKIP 0x0002
+#define MMC_R1B_ERR 0x0004
+#define MMC_R1B_CC_ERR 0x0008
+#define MMC_R1B_CARD_ECC_ERR 0x0010
+#define MMC_R1B_WP_VIOLATION 0x0020
+#define MMC_R1B_ERASE_PARAM 0x0040
+#define MMC_R1B_OOR 0x0080
+#define MMC_R1B_IDLE_STATE 0x0100
+#define MMC_R1B_ERASE_RESET 0x0200
+#define MMC_R1B_ILLEGAL_CMD 0x0400
+#define MMC_R1B_COM_CRC_ERR 0x0800
+#define MMC_R1B_ERASE_SEQ_ERR 0x1000
+#define MMC_R1B_ADDR_ERR 0x2000
+#define MMC_R1B_PARAM_ERR 0x4000
+
+typedef struct mmc_cid {
+/* FIXME: BYTE_ORDER */
+ unsigned char year:4,
+ month:4;
+ unsigned char sn[3];
+ unsigned char fwrev:4,
+ hwrev:4;
+ unsigned char name[6];
+ unsigned char id[3];
+} mmc_cid_t;
+
+typedef struct mmc_csd
+{
+ unsigned char ecc:2,
+ file_format:2,
+ tmp_write_protect:1,
+ perm_write_protect:1,
+ copy:1,
+ file_format_grp:1;
+ unsigned long int content_prot_app:1,
+ rsvd3:4,
+ write_bl_partial:1,
+ write_bl_len:4,
+ r2w_factor:3,
+ default_ecc:2,
+ wp_grp_enable:1,
+ wp_grp_size:5,
+ erase_grp_mult:5,
+ erase_grp_size:5,
+ c_size_mult1:3,
+ vdd_w_curr_max:3,
+ vdd_w_curr_min:3,
+ vdd_r_curr_max:3,
+ vdd_r_curr_min:3,
+ c_size:12,
+ rsvd2:2,
+ dsr_imp:1,
+ read_blk_misalign:1,
+ write_blk_misalign:1,
+ read_bl_partial:1;
+
+ unsigned short read_bl_len:4,
+ ccc:12;
+ unsigned char tran_speed;
+ unsigned char nsac;
+ unsigned char taac;
+ unsigned char rsvd1:2,
+ spec_vers:4,
+ csd_structure:2;
+} mmc_csd_t;
+
+
+#endif /* __MMC_PXA_P_H__ */
diff --git a/uart-loader/include/asm/arch-omap3/mux.h b/uart-loader/include/asm/arch-omap3/mux.h
new file mode 120000
index 0000000..a745fbd
--- /dev/null
+++ b/uart-loader/include/asm/arch-omap3/mux.h
@@ -0,0 +1 @@
+../../../../u-boot/include/asm-arm/arch-omap3/mux.h \ No newline at end of file
diff --git a/uart-loader/include/asm/arch-omap3/omap3430.h b/uart-loader/include/asm/arch-omap3/omap3430.h
new file mode 120000
index 0000000..69502f2
--- /dev/null
+++ b/uart-loader/include/asm/arch-omap3/omap3430.h
@@ -0,0 +1 @@
+../../../../u-boot/include/asm-arm/arch-omap3/omap3430.h \ No newline at end of file
diff --git a/uart-loader/include/asm/arch-omap3/rev.h b/uart-loader/include/asm/arch-omap3/rev.h
new file mode 120000
index 0000000..66918c9
--- /dev/null
+++ b/uart-loader/include/asm/arch-omap3/rev.h
@@ -0,0 +1 @@
+../../../../u-boot/include/asm-arm/arch-omap3/rev.h \ No newline at end of file
diff --git a/uart-loader/include/asm/arch-omap3/sizes.h b/uart-loader/include/asm/arch-omap3/sizes.h
new file mode 120000
index 0000000..4eda715
--- /dev/null
+++ b/uart-loader/include/asm/arch-omap3/sizes.h
@@ -0,0 +1 @@
+../../../../u-boot/include/asm-arm/arch-omap3/sizes.h \ No newline at end of file
diff --git a/uart-loader/include/asm/arch-omap3/sys_info.h b/uart-loader/include/asm/arch-omap3/sys_info.h
new file mode 120000
index 0000000..2e4d1d0
--- /dev/null
+++ b/uart-loader/include/asm/arch-omap3/sys_info.h
@@ -0,0 +1 @@
+../../../../u-boot/include/asm-arm/arch-omap3/sys_info.h \ No newline at end of file
diff --git a/uart-loader/include/asm/arch-omap3/sys_proto.h b/uart-loader/include/asm/arch-omap3/sys_proto.h
new file mode 120000
index 0000000..3a032c8
--- /dev/null
+++ b/uart-loader/include/asm/arch-omap3/sys_proto.h
@@ -0,0 +1 @@
+../../../../u-boot/include/asm-arm/arch-omap3/sys_proto.h \ No newline at end of file
diff --git a/uart-loader/include/asm/atomic.h b/uart-loader/include/asm/atomic.h
new file mode 100644
index 0000000..ba9e4b7
--- /dev/null
+++ b/uart-loader/include/asm/atomic.h
@@ -0,0 +1,113 @@
+/*
+ * linux/include/asm-arm/atomic.h
+ *
+ * Copyright (c) 1996 Russell King.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Changelog:
+ * 27-06-1996 RMK Created
+ * 13-04-1997 RMK Made functions atomic!
+ * 07-12-1997 RMK Upgraded for v2.1.
+ * 26-08-1998 PJB Added #ifdef __KERNEL__
+ */
+#ifndef __ASM_ARM_ATOMIC_H
+#define __ASM_ARM_ATOMIC_H
+
+#include <linux/config.h>
+
+#ifdef CONFIG_SMP
+#error SMP not supported
+#endif
+
+typedef struct { volatile int counter; } atomic_t;
+
+#define ATOMIC_INIT(i) { (i) }
+
+#ifdef __KERNEL__
+#include <asm/proc/system.h>
+
+#define atomic_read(v) ((v)->counter)
+#define atomic_set(v,i) (((v)->counter) = (i))
+
+static inline void atomic_add(int i, volatile atomic_t *v)
+{
+ unsigned long flags;
+
+ local_irq_save(flags);
+ v->counter += i;
+ local_irq_restore(flags);
+}
+
+static inline void atomic_sub(int i, volatile atomic_t *v)
+{
+ unsigned long flags;
+
+ local_irq_save(flags);
+ v->counter -= i;
+ local_irq_restore(flags);
+}
+
+static inline void atomic_inc(volatile atomic_t *v)
+{
+ unsigned long flags;
+
+ local_irq_save(flags);
+ v->counter += 1;
+ local_irq_restore(flags);
+}
+
+static inline void atomic_dec(volatile atomic_t *v)
+{
+ unsigned long flags;
+
+ local_irq_save(flags);
+ v->counter -= 1;
+ local_irq_restore(flags);
+}
+
+static inline int atomic_dec_and_test(volatile atomic_t *v)
+{
+ unsigned long flags;
+ int val;
+
+ local_irq_save(flags);
+ val = v->counter;
+ v->counter = val -= 1;
+ local_irq_restore(flags);
+
+ return val == 0;
+}
+
+static inline int atomic_add_negative(int i, volatile atomic_t *v)
+{
+ unsigned long flags;
+ int val;
+
+ local_irq_save(flags);
+ val = v->counter;
+ v->counter = val += i;
+ local_irq_restore(flags);
+
+ return val < 0;
+}
+
+static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr)
+{
+ unsigned long flags;
+
+ local_irq_save(flags);
+ *addr &= ~mask;
+ local_irq_restore(flags);
+}
+
+/* Atomic operations are already serializing on ARM */
+#define smp_mb__before_atomic_dec() barrier()
+#define smp_mb__after_atomic_dec() barrier()
+#define smp_mb__before_atomic_inc() barrier()
+#define smp_mb__after_atomic_inc() barrier()
+
+#endif
+#endif
diff --git a/uart-loader/include/asm/byteorder.h b/uart-loader/include/asm/byteorder.h
new file mode 120000
index 0000000..be6afe8
--- /dev/null
+++ b/uart-loader/include/asm/byteorder.h
@@ -0,0 +1 @@
+../../../u-boot/include/asm-arm/byteorder.h \ No newline at end of file
diff --git a/uart-loader/include/asm/posix_types.h b/uart-loader/include/asm/posix_types.h
new file mode 100644
index 0000000..c412486
--- /dev/null
+++ b/uart-loader/include/asm/posix_types.h
@@ -0,0 +1,79 @@
+/*
+ * linux/include/asm-arm/posix_types.h
+ *
+ * Copyright (C) 1996-1998 Russell King.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Changelog:
+ * 27-06-1996 RMK Created
+ */
+#ifndef __ARCH_ARM_POSIX_TYPES_H
+#define __ARCH_ARM_POSIX_TYPES_H
+
+/*
+ * This file is generally used by user-level software, so you need to
+ * be a little careful about namespace pollution etc. Also, we cannot
+ * assume GCC is being used.
+ */
+
+typedef unsigned short __kernel_dev_t;
+typedef unsigned long __kernel_ino_t;
+typedef unsigned short __kernel_mode_t;
+typedef unsigned short __kernel_nlink_t;
+typedef long __kernel_off_t;
+typedef int __kernel_pid_t;
+typedef unsigned short __kernel_ipc_pid_t;
+typedef unsigned short __kernel_uid_t;
+typedef unsigned short __kernel_gid_t;
+typedef unsigned int __kernel_size_t;
+typedef int __kernel_ssize_t;
+typedef int __kernel_ptrdiff_t;
+typedef long __kernel_time_t;
+typedef long __kernel_suseconds_t;
+typedef long __kernel_clock_t;
+typedef int __kernel_daddr_t;
+typedef char * __kernel_caddr_t;
+typedef unsigned short __kernel_uid16_t;
+typedef unsigned short __kernel_gid16_t;
+typedef unsigned int __kernel_uid32_t;
+typedef unsigned int __kernel_gid32_t;
+
+typedef unsigned short __kernel_old_uid_t;
+typedef unsigned short __kernel_old_gid_t;
+
+#ifdef __GNUC__
+typedef long long __kernel_loff_t;
+#endif
+
+typedef struct {
+#if defined(__KERNEL__) || defined(__USE_ALL)
+ int val[2];
+#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */
+ int __val[2];
+#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */
+} __kernel_fsid_t;
+
+#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2)
+
+#undef __FD_SET
+#define __FD_SET(fd, fdsetp) \
+ (((fd_set *)fdsetp)->fds_bits[fd >> 5] |= (1<<(fd & 31)))
+
+#undef __FD_CLR
+#define __FD_CLR(fd, fdsetp) \
+ (((fd_set *)fdsetp)->fds_bits[fd >> 5] &= ~(1<<(fd & 31)))
+
+#undef __FD_ISSET
+#define __FD_ISSET(fd, fdsetp) \
+ ((((fd_set *)fdsetp)->fds_bits[fd >> 5] & (1<<(fd & 31))) != 0)
+
+#undef __FD_ZERO
+#define __FD_ZERO(fdsetp) \
+ (memset (fdsetp, 0, sizeof (*(fd_set *)fdsetp)))
+
+#endif
+
+#endif
diff --git a/uart-loader/include/asm/setup.h b/uart-loader/include/asm/setup.h
new file mode 100644
index 0000000..89df4dc
--- /dev/null
+++ b/uart-loader/include/asm/setup.h
@@ -0,0 +1,269 @@
+/*
+ * linux/include/asm/setup.h
+ *
+ * Copyright (C) 1997-1999 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Structure passed to kernel to tell it about the
+ * hardware it's running on. See linux/Documentation/arm/Setup
+ * for more info.
+ *
+ * NOTE:
+ * This file contains two ways to pass information from the boot
+ * loader to the kernel. The old struct param_struct is deprecated,
+ * but it will be kept in the kernel for 5 years from now
+ * (2001). This will allow boot loaders to convert to the new struct
+ * tag way.
+ */
+#ifndef __ASMARM_SETUP_H
+#define __ASMARM_SETUP_H
+
+/*
+ * Usage:
+ * - do not go blindly adding fields, add them at the end
+ * - when adding fields, don't rely on the address until
+ * a patch from me has been released
+ * - unused fields should be zero (for future expansion)
+ * - this structure is relatively short-lived - only
+ * guaranteed to contain useful data in setup_arch()
+ */
+#define COMMAND_LINE_SIZE 1024
+
+/* This is the old deprecated way to pass parameters to the kernel */
+struct param_struct {
+ union {
+ struct {
+ unsigned long page_size; /* 0 */
+ unsigned long nr_pages; /* 4 */
+ unsigned long ramdisk_size; /* 8 */
+ unsigned long flags; /* 12 */
+#define FLAG_READONLY 1
+#define FLAG_RDLOAD 4
+#define FLAG_RDPROMPT 8
+ unsigned long rootdev; /* 16 */
+ unsigned long video_num_cols; /* 20 */
+ unsigned long video_num_rows; /* 24 */
+ unsigned long video_x; /* 28 */
+ unsigned long video_y; /* 32 */
+ unsigned long memc_control_reg; /* 36 */
+ unsigned char sounddefault; /* 40 */
+ unsigned char adfsdrives; /* 41 */
+ unsigned char bytes_per_char_h; /* 42 */
+ unsigned char bytes_per_char_v; /* 43 */
+ unsigned long pages_in_bank[4]; /* 44 */
+ unsigned long pages_in_vram; /* 60 */
+ unsigned long initrd_start; /* 64 */
+ unsigned long initrd_size; /* 68 */
+ unsigned long rd_start; /* 72 */
+ unsigned long system_rev; /* 76 */
+ unsigned long system_serial_low; /* 80 */
+ unsigned long system_serial_high; /* 84 */
+ unsigned long mem_fclk_21285; /* 88 */
+ } s;
+ char unused[256];
+ } u1;
+ union {
+ char paths[8][128];
+ struct {
+ unsigned long magic;
+ char n[1024 - sizeof(unsigned long)];
+ } s;
+ } u2;
+ char commandline[COMMAND_LINE_SIZE];
+};
+
+
+/*
+ * The new way of passing information: a list of tagged entries
+ */
+
+/* The list ends with an ATAG_NONE node. */
+#define ATAG_NONE 0x00000000
+
+struct tag_header {
+ u32 size;
+ u32 tag;
+};
+
+/* The list must start with an ATAG_CORE node */
+#define ATAG_CORE 0x54410001
+
+struct tag_core {
+ u32 flags; /* bit 0 = read-only */
+ u32 pagesize;
+ u32 rootdev;
+};
+
+/* it is allowed to have multiple ATAG_MEM nodes */
+#define ATAG_MEM 0x54410002
+
+struct tag_mem32 {
+ u32 size;
+ u32 start; /* physical start address */
+};
+
+/* VGA text type displays */
+#define ATAG_VIDEOTEXT 0x54410003
+
+struct tag_videotext {
+ u8 x;
+ u8 y;
+ u16 video_page;
+ u8 video_mode;
+ u8 video_cols;
+ u16 video_ega_bx;
+ u8 video_lines;
+ u8 video_isvga;
+ u16 video_points;
+};
+
+/* describes how the ramdisk will be used in kernel */
+#define ATAG_RAMDISK 0x54410004
+
+struct tag_ramdisk {
+ u32 flags; /* bit 0 = load, bit 1 = prompt */
+ u32 size; /* decompressed ramdisk size in _kilo_ bytes */
+ u32 start; /* starting block of floppy-based RAM disk image */
+};
+
+/* describes where the compressed ramdisk image lives (virtual address) */
+/*
+ * this one accidentally used virtual addresses - as such,
+ * its depreciated.
+ */
+#define ATAG_INITRD 0x54410005
+
+/* describes where the compressed ramdisk image lives (physical address) */
+#define ATAG_INITRD2 0x54420005
+
+struct tag_initrd {
+ u32 start; /* physical start address */
+ u32 size; /* size of compressed ramdisk image in bytes */
+};
+
+/* board serial number. "64 bits should be enough for everybody" */
+#define ATAG_SERIAL 0x54410006
+
+struct tag_serialnr {
+ u32 low;
+ u32 high;
+};
+
+/* board revision */
+#define ATAG_REVISION 0x54410007
+
+struct tag_revision {
+ u32 rev;
+};
+
+/* initial values for vesafb-type framebuffers. see struct screen_info
+ * in include/linux/tty.h
+ */
+#define ATAG_VIDEOLFB 0x54410008
+
+struct tag_videolfb {
+ u16 lfb_width;
+ u16 lfb_height;
+ u16 lfb_depth;
+ u16 lfb_linelength;
+ u32 lfb_base;
+ u32 lfb_size;
+ u8 red_size;
+ u8 red_pos;
+ u8 green_size;
+ u8 green_pos;
+ u8 blue_size;
+ u8 blue_pos;
+ u8 rsvd_size;
+ u8 rsvd_pos;
+};
+
+/* command line: \0 terminated string */
+#define ATAG_CMDLINE 0x54410009
+
+struct tag_cmdline {
+ char cmdline[1]; /* this is the minimum size */
+};
+
+/* acorn RiscPC specific information */
+#define ATAG_ACORN 0x41000101
+
+struct tag_acorn {
+ u32 memc_control_reg;
+ u32 vram_pages;
+ u8 sounddefault;
+ u8 adfsdrives;
+};
+
+/* footbridge memory clock, see arch/arm/mach-footbridge/arch.c */
+#define ATAG_MEMCLK 0x41000402
+
+struct tag_memclk {
+ u32 fmemclk;
+};
+
+struct tag {
+ struct tag_header hdr;
+ union {
+ struct tag_core core;
+ struct tag_mem32 mem;
+ struct tag_videotext videotext;
+ struct tag_ramdisk ramdisk;
+ struct tag_initrd initrd;
+ struct tag_serialnr serialnr;
+ struct tag_revision revision;
+ struct tag_videolfb videolfb;
+ struct tag_cmdline cmdline;
+
+ /*
+ * Acorn specific
+ */
+ struct tag_acorn acorn;
+
+ /*
+ * DC21285 specific
+ */
+ struct tag_memclk memclk;
+ } u;
+};
+
+struct tagtable {
+ u32 tag;
+ int (*parse)(const struct tag *);
+};
+
+#define __tag __attribute__((unused, __section__(".taglist")))
+#define __tagtable(tag, fn) \
+static struct tagtable __tagtable_##fn __tag = { tag, fn }
+
+#define tag_member_present(tag,member) \
+ ((unsigned long)(&((struct tag *)0L)->member + 1) \
+ <= (tag)->hdr.size * 4)
+
+#define tag_next(t) ((struct tag *)((u32 *)(t) + (t)->hdr.size))
+#define tag_size(type) ((sizeof(struct tag_header) + sizeof(struct type)) >> 2)
+
+#define for_each_tag(t,base) \
+ for (t = base; t->hdr.size; t = tag_next(t))
+
+/*
+ * Memory map description
+ */
+#define NR_BANKS 8
+
+struct meminfo {
+ int nr_banks;
+ unsigned long end;
+ struct {
+ unsigned long start;
+ unsigned long size;
+ int node;
+ } bank[NR_BANKS];
+};
+
+extern struct meminfo meminfo;
+
+#endif
diff --git a/uart-loader/include/asm/sizes.h b/uart-loader/include/asm/sizes.h
new file mode 100644
index 0000000..f8d92ca
--- /dev/null
+++ b/uart-loader/include/asm/sizes.h
@@ -0,0 +1,52 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+/* DO NOT EDIT!! - this file automatically generated
+ * from .s file by awk -f s2h.awk
+ */
+/* Size defintions
+ * Copyright (C) ARM Limited 1998. All rights reserved.
+ */
+
+#ifndef __sizes_h
+#define __sizes_h 1
+
+/* handy sizes */
+#define SZ_1K 0x00000400
+#define SZ_4K 0x00001000
+#define SZ_8K 0x00002000
+#define SZ_16K 0x00004000
+#define SZ_64K 0x00010000
+#define SZ_128K 0x00020000
+#define SZ_256K 0x00040000
+#define SZ_512K 0x00080000
+
+#define SZ_1M 0x00100000
+#define SZ_2M 0x00200000
+#define SZ_4M 0x00400000
+#define SZ_8M 0x00800000
+#define SZ_16M 0x01000000
+#define SZ_32M 0x02000000
+#define SZ_64M 0x04000000
+#define SZ_128M 0x08000000
+#define SZ_256M 0x10000000
+#define SZ_512M 0x20000000
+
+#define SZ_1G 0x40000000
+#define SZ_2G 0x80000000
+
+#endif
+
+/* END */
diff --git a/uart-loader/include/asm/string.h b/uart-loader/include/asm/string.h
new file mode 100644
index 0000000..c3ea582
--- /dev/null
+++ b/uart-loader/include/asm/string.h
@@ -0,0 +1,47 @@
+#ifndef __ASM_ARM_STRING_H
+#define __ASM_ARM_STRING_H
+
+/*
+ * We don't do inline string functions, since the
+ * optimised inline asm versions are not small.
+ */
+
+#undef __HAVE_ARCH_STRRCHR
+extern char * strrchr(const char * s, int c);
+
+#undef __HAVE_ARCH_STRCHR
+extern char * strchr(const char * s, int c);
+
+#undef __HAVE_ARCH_MEMCPY
+extern void * memcpy(void *, const void *, __kernel_size_t);
+
+#undef __HAVE_ARCH_MEMMOVE
+extern void * memmove(void *, const void *, __kernel_size_t);
+
+#undef __HAVE_ARCH_MEMCHR
+extern void * memchr(const void *, int, __kernel_size_t);
+
+#undef __HAVE_ARCH_MEMZERO
+#undef __HAVE_ARCH_MEMSET
+extern void * memset(void *, int, __kernel_size_t);
+
+#if 0
+extern void __memzero(void *ptr, __kernel_size_t n);
+
+#define memset(p,v,n) \
+ ({ \
+ if ((n) != 0) { \
+ if (__builtin_constant_p((v)) && (v) == 0) \
+ __memzero((p),(n)); \
+ else \
+ memset((p),(v),(n)); \
+ } \
+ (p); \
+ })
+
+#define memzero(p,n) ({ if ((n) != 0) __memzero((p),(n)); (p); })
+#else
+extern void memzero(void *ptr, __kernel_size_t n);
+#endif
+
+#endif
diff --git a/uart-loader/include/asm/types.h b/uart-loader/include/asm/types.h
new file mode 100644
index 0000000..13e9806
--- /dev/null
+++ b/uart-loader/include/asm/types.h
@@ -0,0 +1,50 @@
+#ifndef __ASM_ARM_TYPES_H
+#define __ASM_ARM_TYPES_H
+
+typedef unsigned short umode_t;
+
+/*
+ * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
+ * header files exported to user space
+ */
+
+typedef __signed__ char __s8;
+typedef unsigned char __u8;
+
+typedef __signed__ short __s16;
+typedef unsigned short __u16;
+
+typedef __signed__ int __s32;
+typedef unsigned int __u32;
+
+#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
+typedef __signed__ long long __s64;
+typedef unsigned long long __u64;
+#endif
+
+/*
+ * These aren't exported outside the kernel to avoid name space clashes
+ */
+#ifdef __KERNEL__
+
+typedef signed char s8;
+typedef unsigned char u8;
+
+typedef signed short s16;
+typedef unsigned short u16;
+
+typedef signed int s32;
+typedef unsigned int u32;
+
+typedef signed long long s64;
+typedef unsigned long long u64;
+
+#define BITS_PER_LONG 32
+
+/* Dma addresses are 32-bits wide. */
+
+typedef u32 dma_addr_t;
+
+#endif /* __KERNEL__ */
+
+#endif
diff --git a/uart-loader/include/asm/x-load-arm.h b/uart-loader/include/asm/x-load-arm.h
new file mode 100644
index 0000000..eef268e
--- /dev/null
+++ b/uart-loader/include/asm/x-load-arm.h
@@ -0,0 +1,40 @@
+/*
+ * (C) Copyright 2004
+ * Texas Instruments
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Alex Zuepke <azu@sysgo.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _X_LOAD_ARM_H_
+#define _X_LOAD_ARM_H_ 1
+
+/* for the following variables, see start.S */
+extern ulong _armboot_start; /* code start */
+extern ulong _bss_start; /* code + data end == BSS start */
+extern ulong _bss_end; /* BSS end */
+
+#endif /* _X_LOAD_ARM_H_ */
diff --git a/uart-loader/include/command.h b/uart-loader/include/command.h
new file mode 120000
index 0000000..f4bd05e
--- /dev/null
+++ b/uart-loader/include/command.h
@@ -0,0 +1 @@
+../../u-boot/include/command.h \ No newline at end of file
diff --git a/uart-loader/include/common.h b/uart-loader/include/common.h
new file mode 100644
index 0000000..fe8bc90
--- /dev/null
+++ b/uart-loader/include/common.h
@@ -0,0 +1,110 @@
+/*
+ * (C) Copyright 2004
+ * Texas Instruments
+ *
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __COMMON_H_
+#define __COMMON_H_ 1
+
+#undef _LINUX_CONFIG_H
+#define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */
+
+typedef unsigned char uchar;
+typedef volatile unsigned long vu_long;
+typedef volatile unsigned short vu_short;
+typedef volatile unsigned char vu_char;
+
+#include <config.h>
+#include <linux/types.h>
+#include <stdarg.h>
+
+#ifdef CONFIG_ARM
+#define asmlinkage /* nothing */
+#endif
+
+
+#ifdef CONFIG_ARM
+# include <asm/setup.h>
+# include <asm/x-load-arm.h> /* ARM version to be fixed! */
+#endif /* CONFIG_ARM */
+
+#ifdef CFG_PRINTF
+#define printf(fmt,args...) serial_printf (fmt ,##args)
+#define getc() serial_getc()
+#else
+#define printf(fmt,args...)
+#define getc() ' '
+#endif /* CFG_PRINTF */
+
+/* board/$(BOARD)/$(BOARD).c */
+int board_init (void);
+int nand_init (void);
+int mmc_boot (void);
+void board_hang (void);
+
+/* cpu/$(CPU)/cpu.c */
+int cpu_init (void);
+#ifdef CFG_UDELAY
+void udelay (unsigned long usec);
+#endif
+
+/* nand driver */
+#define NAND_CMD_READ0 0
+#define NAND_CMD_READ1 1
+#define NAND_CMD_READOOB 0x50
+#define NAND_CMD_STATUS 0x70
+#define NAND_CMD_READID 0x90
+#define NAND_CMD_RESET 0xff
+
+/* Extended Commands for Large page devices */
+#define NAND_CMD_READSTART 0x30
+
+int nand_chip(void);
+int nand_read_block(uchar *buf, ulong block_addr);
+
+int onenand_chip(void);
+int onenand_read_block(unsigned char *buf, ulong block);
+
+
+#ifdef CFG_PRINTF
+
+/* serial driver */
+int serial_init (void);
+void serial_setbrg (void);
+void serial_putc (const char);
+void serial_puts (const char *);
+int serial_getc (void);
+int serial_tstc (void);
+
+/* lib/printf.c */
+void serial_printf (const char *fmt, ...);
+#endif
+
+/* lib/crc.c */
+void nand_calculate_ecc (const u_char *dat, u_char *ecc_code);
+int nand_correct_data (u_char *dat, u_char *read_ecc, u_char *calc_ecc);
+
+/* lib/board.c */
+void hang (void) __attribute__ ((noreturn));
+#endif /* __COMMON_H_ */
diff --git a/uart-loader/include/configs/omap3430labrador.h b/uart-loader/include/configs/omap3430labrador.h
new file mode 100644
index 0000000..e1e2665
--- /dev/null
+++ b/uart-loader/include/configs/omap3430labrador.h
@@ -0,0 +1,220 @@
+/*
+ * (C) Copyright 2006
+ * Texas Instruments <www.ti.com>
+ * Richard Woodruff <r-woodruff2@ti.com>
+ *
+ * X-Loader Configuation settings for the TI OMAP SDP3430 board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/* serial printf facility takes about 3.5K */
+#define CFG_PRINTF
+//#undef CFG_PRINTF
+
+/*
+ * High Level Configuration Options
+ */
+#define CONFIG_ARMCORTEXA8 1 /* This is an ARM V7 CPU core */
+#define CONFIG_OMAP 1 /* in a TI OMAP core */
+#define CONFIG_OMAP34XX 1 /* which is a 34XX */
+#define CONFIG_OMAP3430 1 /* which is in a 3430 */
+#define CONFIG_3430LABRADOR 1 /* working on Labrador */
+//#define CONFIG_3430_AS_3410 1 /* true for 3430 in 3410 mode */
+
+#include <asm/arch/cpu.h> /* get chip and board defs */
+
+/* uncomment it if you need timer based udelay(). it takes about 250 bytes */
+//#define CFG_UDELAY
+
+/* Clock Defines */
+#define V_OSCK 26000000 /* Clock output from T2 */
+#define V_SCLK V_OSCK
+
+//#define PRCM_CLK_CFG2_266MHZ 1 /* VDD2=1.15v - 133MHz DDR */
+#define PRCM_CLK_CFG2_332MHZ 1 /* VDD2=1.15v - 166MHz DDR */
+#define PRCM_PCLK_OPP2 1 /* ARM=500MHz - VDD1=1.20v */
+
+/* Memory type */
+#define CFG_3430SDRAM_DDR 1
+
+/* The actual register values are defined in u-boot- mem.h */
+/* SDRAM Bank Allocation method */
+//#define SDRC_B_R_C 1
+//#define SDRC_B1_R_B0_C 1
+#define SDRC_R_B_C 1
+
+/* Boot type */
+#define CFG_NAND 1
+//#define CFG_ONENAND 1
+
+# define NAND_BASE_ADR NAND_BASE /* NAND flash */
+# define ONENAND_BASE ONENAND_MAP /* OneNand flash */
+
+/* To use the 256/512 byte s/w ecc define CFG_SW_ECC_(256/512) */
+/* Use the 512 byte hw ecc in rom code layout */
+#define NAND_HW_ROMCODE_ECC_LAYOUT
+
+#ifdef CFG_NAND
+#define OMAP34XX_GPMC_CS0_SIZE GPMC_SIZE_128M /* u = ofdon't need so much for nand port */
+#define OMAP34XX_GPMC_CS0_MAP NAND_BASE_ADR
+#else
+#define OMAP34XX_GPMC_CS0_SIZE GPMC_SIZE_128M
+#define OMAP34XX_GPMC_CS0_MAP ONENAND_BASE
+#define ONENAND_ADDR ONENAND_BASE /* physical address of OneNAND at CS0*/
+#endif
+
+
+#ifdef CFG_PRINTF
+
+#define CFG_NS16550
+#define CFG_NS16550_SERIAL
+#define CFG_NS16550_REG_SIZE (-4)
+#define CFG_NS16550_CLK (48000000)
+#define CFG_NS16550_COM3 OMAP34XX_UART3
+
+/*
+ * select serial console configuration
+ */
+#define CONFIG_SERIAL3 3 /* UART3 on board */
+#define CONFIG_CONS_INDEX 3
+
+#define CONFIG_BAUDRATE 115200
+#define CFG_PBSIZE 256
+
+#endif /* CFG_PRINTF */
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LOADADDR 0x80008000
+
+#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
+
+/*-----------------------------------------------------------------------
+ * Stack sizes
+ *
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE (128*1024) /* regular stack */
+
+#ifdef CFG_NAND
+
+/*-----------------------------------------------------------------------
+ * Board NAND Info.
+ */
+
+
+#define CFG_NAND_K9F1G08R0A /* Micron 16-bit 256MB chip large page NAND chip*/
+#define NAND_16BIT
+
+/* NAND is partitioned:
+ * 0x00000000 - 0x0007FFFF Booting Image
+ * 0x00080000 - 0x000BFFFF U-Boot Image
+ * 0x000C0000 - 0x000FFFFF U-Boot Env Data (X-loader doesn't care)
+ * 0x00100000 - 0x002FFFFF Kernel Image
+ * 0x00300000 - 0x08000000 depends on application
+ */
+#define NAND_UBOOT_START 0x0080000 /* Leaving first 4 blocks for x-load */
+#define NAND_UBOOT_END 0x00C0000 /* Giving a space of 2 blocks = 256KB */
+#define NAND_BLOCK_SIZE 0x20000
+
+#define GPMC_CONFIG (OMAP34XX_GPMC_BASE+0x50)
+#define GPMC_NAND_COMMAND_0 (OMAP34XX_GPMC_BASE+0x7C)
+#define GPMC_NAND_ADDRESS_0 (OMAP34XX_GPMC_BASE+0x80)
+#define GPMC_NAND_DATA_0 (OMAP34XX_GPMC_BASE+0x84)
+
+#ifdef NAND_16BIT
+#define WRITE_NAND_COMMAND(d, adr) \
+ do {*(volatile u16 *)GPMC_NAND_COMMAND_0 = d;} while(0)
+#define WRITE_NAND_ADDRESS(d, adr) \
+ do {*(volatile u16 *)GPMC_NAND_ADDRESS_0 = d;} while(0)
+#define WRITE_NAND(d, adr) \
+ do {*(volatile u16 *)GPMC_NAND_DATA_0 = d;} while(0)
+#define READ_NAND(adr) \
+ (*(volatile u16 *)GPMC_NAND_DATA_0)
+#define NAND_WAIT_READY()
+#define NAND_WP_OFF() \
+ do {*(volatile u32 *)(GPMC_CONFIG) |= 0x00000010;} while(0)
+#define NAND_WP_ON() \
+ do {*(volatile u32 *)(GPMC_CONFIG) &= ~0x00000010;} while(0)
+
+#else /* to support 8-bit NAND devices */
+#define WRITE_NAND_COMMAND(d, adr) \
+ do {*(volatile u8 *)GPMC_NAND_COMMAND_0 = d;} while(0)
+#define WRITE_NAND_ADDRESS(d, adr) \
+ do {*(volatile u8 *)GPMC_NAND_ADDRESS_0 = d;} while(0)
+#define WRITE_NAND(d, adr) \
+ do {*(volatile u8 *)GPMC_NAND_DATA_0 = d;} while(0)
+#define READ_NAND(adr) \
+ (*(volatile u8 *)GPMC_NAND_DATA_0);
+#define NAND_WAIT_READY()
+#define NAND_WP_OFF() \
+ do {*(volatile u32 *)(GPMC_CONFIG) |= 0x00000010;} while(0)
+#define NAND_WP_ON() \
+ do {*(volatile u32 *)(GPMC_CONFIG) &= ~0x00000010;} while(0)
+
+#endif
+
+#define NAND_CTL_CLRALE(adr)
+#define NAND_CTL_SETALE(adr)
+#define NAND_CTL_CLRCLE(adr)
+#define NAND_CTL_SETCLE(adr)
+#define NAND_DISABLE_CE()
+#define NAND_ENABLE_CE()
+
+#else
+/*-----------------------------------------------------------------------
+ * Board oneNAND Info.
+ */
+#define CFG_SYNC_BURST_READ 1
+
+/* OneNAND is partitioned:
+ * 0x0000000 - 0x0080000 X-Loader
+ * 0x0080000 - 0x00c0000 U-boot Image
+ * 0x00c0000 - 0x00e0000 U-Boot Env Data (X-loader doesn't care)
+ * 0x00e0000 - 0x0120000 Kernel Image
+ * 0x0120000 - 0x4000000 depends on application
+ */
+
+#define ONENAND_START_BLOCK 4
+#define ONENAND_END_BLOCK 6
+#define ONENAND_PAGE_SIZE 2048 /* 2KB */
+#define ONENAND_BLOCK_SIZE 0x20000 /* 128KB */
+
+#endif /* oneNAND */
+
+/* Enable CONFIG_MMC macro if MMC boot support is required */
+/* if loadb and MMC support are enabled together, the size of x-loader
+ (code + data) becomes greater than 32K - the size of SRAM. So don't enable
+ them together.
+ */
+#if !defined(START_LOADB_DOWNLOAD)
+#define CONFIG_MMC 1
+#endif
+#if defined(CONFIG_MMC)
+ #define CFG_CMD_MMC 1
+ #define CFG_CMD_FAT 1
+#endif
+
+#endif /* __CONFIG_H */
+
diff --git a/uart-loader/include/fat.h b/uart-loader/include/fat.h
new file mode 120000
index 0000000..aeeb5a0
--- /dev/null
+++ b/uart-loader/include/fat.h
@@ -0,0 +1 @@
+../../u-boot/include/fat.h \ No newline at end of file
diff --git a/uart-loader/include/ide.h b/uart-loader/include/ide.h
new file mode 120000
index 0000000..9c84a17
--- /dev/null
+++ b/uart-loader/include/ide.h
@@ -0,0 +1 @@
+../../u-boot/include/ide.h \ No newline at end of file
diff --git a/uart-loader/include/linux/byteorder b/uart-loader/include/linux/byteorder
new file mode 120000
index 0000000..f000c3b
--- /dev/null
+++ b/uart-loader/include/linux/byteorder
@@ -0,0 +1 @@
+../../../u-boot/include/linux/byteorder \ No newline at end of file
diff --git a/uart-loader/include/linux/config.h b/uart-loader/include/linux/config.h
new file mode 100644
index 0000000..a0194cb
--- /dev/null
+++ b/uart-loader/include/linux/config.h
@@ -0,0 +1,6 @@
+#ifndef _LINUX_CONFIG_H
+#define _LINUX_CONFIG_H
+
+/* #include <linux/autoconf.h> */
+
+#endif
diff --git a/uart-loader/include/linux/posix_types.h b/uart-loader/include/linux/posix_types.h
new file mode 100644
index 0000000..bd37e1f
--- /dev/null
+++ b/uart-loader/include/linux/posix_types.h
@@ -0,0 +1,48 @@
+#ifndef _LINUX_POSIX_TYPES_H
+#define _LINUX_POSIX_TYPES_H
+
+#include <linux/stddef.h>
+
+/*
+ * This allows for 1024 file descriptors: if NR_OPEN is ever grown
+ * beyond that you'll have to change this too. But 1024 fd's seem to be
+ * enough even for such "real" unices like OSF/1, so hopefully this is
+ * one limit that doesn't have to be changed [again].
+ *
+ * Note that POSIX wants the FD_CLEAR(fd,fdsetp) defines to be in
+ * <sys/time.h> (and thus <linux/time.h>) - but this is a more logical
+ * place for them. Solved by having dummy defines in <sys/time.h>.
+ */
+
+/*
+ * Those macros may have been defined in <gnu/types.h>. But we always
+ * use the ones here.
+ */
+#undef __NFDBITS
+#define __NFDBITS (8 * sizeof(unsigned long))
+
+#undef __FD_SETSIZE
+#define __FD_SETSIZE 1024
+
+#undef __FDSET_LONGS
+#define __FDSET_LONGS (__FD_SETSIZE/__NFDBITS)
+
+#undef __FDELT
+#define __FDELT(d) ((d) / __NFDBITS)
+
+#undef __FDMASK
+#define __FDMASK(d) (1UL << ((d) % __NFDBITS))
+
+typedef struct {
+ unsigned long fds_bits [__FDSET_LONGS];
+} __kernel_fd_set;
+
+/* Type of a signal handler. */
+typedef void (*__kernel_sighandler_t)(int);
+
+/* Type of a SYSV IPC key. */
+typedef int __kernel_key_t;
+
+#include <asm/posix_types.h>
+
+#endif /* _LINUX_POSIX_TYPES_H */
diff --git a/uart-loader/include/linux/stat.h b/uart-loader/include/linux/stat.h
new file mode 120000
index 0000000..3bc0369
--- /dev/null
+++ b/uart-loader/include/linux/stat.h
@@ -0,0 +1 @@
+../../../u-boot/include/linux/stat.h \ No newline at end of file
diff --git a/uart-loader/include/linux/stddef.h b/uart-loader/include/linux/stddef.h
new file mode 100644
index 0000000..81e34c2
--- /dev/null
+++ b/uart-loader/include/linux/stddef.h
@@ -0,0 +1,18 @@
+#ifndef _LINUX_STDDEF_H
+#define _LINUX_STDDEF_H
+
+#undef NULL
+#if defined(__cplusplus)
+#define NULL 0
+#else
+#define NULL ((void *)0)
+#endif
+
+#ifndef _SIZE_T
+#include <linux/types.h>
+#endif
+
+#undef offsetof
+#define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER)
+
+#endif
diff --git a/uart-loader/include/linux/time.h b/uart-loader/include/linux/time.h
new file mode 120000
index 0000000..d630a65
--- /dev/null
+++ b/uart-loader/include/linux/time.h
@@ -0,0 +1 @@
+../../../u-boot/include/linux/time.h \ No newline at end of file
diff --git a/uart-loader/include/linux/types.h b/uart-loader/include/linux/types.h
new file mode 100644
index 0000000..df4808f
--- /dev/null
+++ b/uart-loader/include/linux/types.h
@@ -0,0 +1,130 @@
+#ifndef _LINUX_TYPES_H
+#define _LINUX_TYPES_H
+
+#ifdef __KERNEL__
+#include <linux/config.h>
+#endif
+
+#include <linux/posix_types.h>
+#include <asm/types.h>
+
+#ifndef __KERNEL_STRICT_NAMES
+
+typedef __kernel_fd_set fd_set;
+typedef __kernel_dev_t dev_t;
+typedef __kernel_ino_t ino_t;
+typedef __kernel_mode_t mode_t;
+typedef __kernel_nlink_t nlink_t;
+typedef __kernel_off_t off_t;
+typedef __kernel_pid_t pid_t;
+typedef __kernel_daddr_t daddr_t;
+typedef __kernel_key_t key_t;
+typedef __kernel_suseconds_t suseconds_t;
+
+#ifdef __KERNEL__
+typedef __kernel_uid32_t uid_t;
+typedef __kernel_gid32_t gid_t;
+typedef __kernel_uid16_t uid16_t;
+typedef __kernel_gid16_t gid16_t;
+
+#ifdef CONFIG_UID16
+/* This is defined by include/asm-{arch}/posix_types.h */
+typedef __kernel_old_uid_t old_uid_t;
+typedef __kernel_old_gid_t old_gid_t;
+#endif /* CONFIG_UID16 */
+
+/* libc5 includes this file to define uid_t, thus uid_t can never change
+ * when it is included by non-kernel code
+ */
+#else
+typedef __kernel_uid_t uid_t;
+typedef __kernel_gid_t gid_t;
+#endif /* __KERNEL__ */
+
+#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
+typedef __kernel_loff_t loff_t;
+#endif
+
+/*
+ * The following typedefs are also protected by individual ifdefs for
+ * historical reasons:
+ */
+#ifndef _SIZE_T
+#define _SIZE_T
+typedef __kernel_size_t size_t;
+#endif
+
+#ifndef _SSIZE_T
+#define _SSIZE_T
+typedef __kernel_ssize_t ssize_t;
+#endif
+
+#ifndef _PTRDIFF_T
+#define _PTRDIFF_T
+typedef __kernel_ptrdiff_t ptrdiff_t;
+#endif
+
+#ifndef _TIME_T
+#define _TIME_T
+typedef __kernel_time_t time_t;
+#endif
+
+#ifndef _CLOCK_T
+#define _CLOCK_T
+typedef __kernel_clock_t clock_t;
+#endif
+
+#ifndef _CADDR_T
+#define _CADDR_T
+typedef __kernel_caddr_t caddr_t;
+#endif
+
+/* bsd */
+typedef unsigned char u_char;
+typedef unsigned short u_short;
+typedef unsigned int u_int;
+typedef unsigned long u_long;
+
+/* sysv */
+typedef unsigned char unchar;
+typedef unsigned short ushort;
+typedef unsigned int uint;
+typedef unsigned long ulong;
+
+#ifndef __BIT_TYPES_DEFINED__
+#define __BIT_TYPES_DEFINED__
+
+typedef __u8 u_int8_t;
+typedef __s8 int8_t;
+typedef __u16 u_int16_t;
+typedef __s16 int16_t;
+typedef __u32 u_int32_t;
+typedef __s32 int32_t;
+
+#endif /* !(__BIT_TYPES_DEFINED__) */
+
+typedef __u8 uint8_t;
+typedef __u16 uint16_t;
+typedef __u32 uint32_t;
+
+#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
+typedef __u64 uint64_t;
+typedef __u64 u_int64_t;
+typedef __s64 int64_t;
+#endif
+
+#endif /* __KERNEL_STRICT_NAMES */
+
+/*
+ * Below are truly Linux-specific types that should never collide with
+ * any application/library that wants linux/types.h.
+ */
+
+struct ustat {
+ __kernel_daddr_t f_tfree;
+ __kernel_ino_t f_tinode;
+ char f_fname[6];
+ char f_fpack[6];
+};
+
+#endif /* _LINUX_TYPES_H */
diff --git a/uart-loader/include/malloc.h b/uart-loader/include/malloc.h
new file mode 120000
index 0000000..9e84013
--- /dev/null
+++ b/uart-loader/include/malloc.h
@@ -0,0 +1 @@
+../../u-boot/include/malloc.h \ No newline at end of file
diff --git a/uart-loader/include/mmc.h b/uart-loader/include/mmc.h
new file mode 120000
index 0000000..1e59fb9
--- /dev/null
+++ b/uart-loader/include/mmc.h
@@ -0,0 +1 @@
+../../u-boot/include/mmc.h \ No newline at end of file
diff --git a/uart-loader/include/ns16550.h b/uart-loader/include/ns16550.h
new file mode 100644
index 0000000..36d2d40
--- /dev/null
+++ b/uart-loader/include/ns16550.h
@@ -0,0 +1,130 @@
+/*
+ *This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ *
+ * NS16550 Serial Port
+ * originally from linux source (arch/ppc/boot/ns16550.h)
+ * modified slightly to
+ * have addresses as offsets from CFG_ISA_BASE
+ * added a few more definitions
+ * added prototypes for ns16550.c
+ * reduced no of com ports to 2
+ * modifications (c) Rob Taylor, Flying Pig Systems. 2000.
+ */
+
+#if (CFG_NS16550_REG_SIZE == 1)
+struct NS16550 {
+ unsigned char rbr; /* 0 */
+ unsigned char ier; /* 1 */
+ unsigned char fcr; /* 2 */
+ unsigned char lcr; /* 3 */
+ unsigned char mcr; /* 4 */
+ unsigned char lsr; /* 5 */
+ unsigned char msr; /* 6 */
+ unsigned char scr; /* 7 */
+} __attribute__ ((packed));
+#elif (CFG_NS16550_REG_SIZE == 2)
+struct NS16550 {
+ unsigned short rbr; /* 0 */
+ unsigned short ier; /* 1 */
+ unsigned short fcr; /* 2 */
+ unsigned short lcr; /* 3 */
+ unsigned short mcr; /* 4 */
+ unsigned short lsr; /* 5 */
+ unsigned short msr; /* 6 */
+ unsigned short scr; /* 7 */
+} __attribute__ ((packed));
+#elif (CFG_NS16550_REG_SIZE == 4)
+struct NS16550 {
+ unsigned long rbr; /* 0 */
+ unsigned long ier; /* 1 */
+ unsigned long fcr; /* 2 */
+ unsigned long lcr; /* 3 */
+ unsigned long mcr; /* 4 */
+ unsigned long lsr; /* 5 */
+ unsigned long msr; /* 6 */
+ unsigned long scr; /* 7 */
+} __attribute__ ((packed));
+#elif (CFG_NS16550_REG_SIZE == -4)
+struct NS16550 {
+ unsigned char rbr; /* 0 */
+ int pad1:24;
+ unsigned char ier; /* 1 */
+ int pad2:24;
+ unsigned char fcr; /* 2 */
+ int pad3:24;
+ unsigned char lcr; /* 3 */
+ int pad4:24;
+ unsigned char mcr; /* 4 */
+ int pad5:24;
+ unsigned char lsr; /* 5 */
+ int pad6:24;
+ unsigned char msr; /* 6 */
+ int pad7:24;
+ unsigned char scr; /* 7 */
+ int pad8:24;
+#if defined(CONFIG_OMAP)
+ unsigned char mdr1; /* mode select reset TL16C750*/
+#endif
+#ifdef CONFIG_OMAP1510
+ int pad9:24;
+ unsigned long pad[10];
+ unsigned char osc_12m_sel;
+ int pad10:24;
+#endif
+} __attribute__ ((packed));
+#else
+#error "Please define NS16550 registers size."
+#endif
+
+#define thr rbr
+#define iir fcr
+#define dll rbr
+#define dlm ier
+
+typedef volatile struct NS16550 *NS16550_t;
+
+#define FCR_FIFO_EN 0x01 /* Fifo enable */
+#define FCR_RXSR 0x02 /* Receiver soft reset */
+#define FCR_TXSR 0x04 /* Transmitter soft reset */
+
+#define MCR_DTR 0x01
+#define MCR_RTS 0x02
+#define MCR_DMA_EN 0x04
+#define MCR_TX_DFR 0x08
+
+#define LCR_WLS_MSK 0x03 /* character length slect mask */
+#define LCR_WLS_5 0x00 /* 5 bit character length */
+#define LCR_WLS_6 0x01 /* 6 bit character length */
+#define LCR_WLS_7 0x02 /* 7 bit character length */
+#define LCR_WLS_8 0x03 /* 8 bit character length */
+#define LCR_STB 0x04 /* Number of stop Bits, off = 1, on = 1.5 or 2) */
+#define LCR_PEN 0x08 /* Parity eneble */
+#define LCR_EPS 0x10 /* Even Parity Select */
+#define LCR_STKP 0x20 /* Stick Parity */
+#define LCR_SBRK 0x40 /* Set Break */
+#define LCR_BKSE 0x80 /* Bank select enable */
+
+#define LSR_DR 0x01 /* Data ready */
+#define LSR_OE 0x02 /* Overrun */
+#define LSR_PE 0x04 /* Parity error */
+#define LSR_FE 0x08 /* Framing error */
+#define LSR_BI 0x10 /* Break */
+#define LSR_THRE 0x20 /* Xmit holding register empty */
+#define LSR_TEMT 0x40 /* Xmitter empty */
+#define LSR_ERR 0x80 /* Error */
+
+#ifdef CONFIG_OMAP1510
+#define OSC_12M_SEL 0x01 /* selects 6.5 * current clk div */
+#endif
+
+/* useful defaults for LCR */
+#define LCR_8N1 0x03
+
+void NS16550_init (NS16550_t com_port, int baud_divisor);
+void NS16550_putc (NS16550_t com_port, char c);
+char NS16550_getc (NS16550_t com_port);
+int NS16550_tstc (NS16550_t com_port);
+void NS16550_reinit (NS16550_t com_port, int baud_divisor);
diff --git a/uart-loader/include/part.h b/uart-loader/include/part.h
new file mode 120000
index 0000000..766e417
--- /dev/null
+++ b/uart-loader/include/part.h
@@ -0,0 +1 @@
+../../u-boot/include/part.h \ No newline at end of file