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| author | Ed Heyl <edheyl@google.com> | 2010-08-26 14:44:27 -0700 |
|---|---|---|
| committer | Ed Heyl <edheyl@google.com> | 2010-08-26 14:44:27 -0700 |
| commit | 3126606fbba216dd0aabf68cbacc13642014095d (patch) | |
| tree | 886efc91b5ff887859754ddec3efc39408697bcb /include/s3c_mem.h | |
| parent | ec456383c58adf2d4c4818438a703e5a2ca949b5 (diff) | |
| download | device_samsung_crespo-3126606fbba216dd0aabf68cbacc13642014095d.zip device_samsung_crespo-3126606fbba216dd0aabf68cbacc13642014095d.tar.gz device_samsung_crespo-3126606fbba216dd0aabf68cbacc13642014095d.tar.bz2 | |
S5PC110: 3D: Add header files to support rendering using texture stream
Change-Id: I36dff2eb210739e815af49f60176cc5256f8821f
Diffstat (limited to 'include/s3c_mem.h')
| -rwxr-xr-x | include/s3c_mem.h | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/include/s3c_mem.h b/include/s3c_mem.h new file mode 100755 index 0000000..d51398a --- /dev/null +++ b/include/s3c_mem.h @@ -0,0 +1,56 @@ +/* + * Copyright@ Samsung Electronics Co. LTD + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef _S3C_MEM_COMMON_H_ +#define _S3C_MEM_COMMON_H_ + +#define MEM_IOCTL_MAGIC 'M' + +#define S3C_MEM_ALLOC _IOWR(MEM_IOCTL_MAGIC, 310, struct s3c_mem_alloc) +#define S3C_MEM_FREE _IOWR(MEM_IOCTL_MAGIC, 311, struct s3c_mem_alloc) + +#define S3C_MEM_SHARE_ALLOC _IOWR(MEM_IOCTL_MAGIC, 314, struct s3c_mem_alloc) +#define S3C_MEM_SHARE_FREE _IOWR(MEM_IOCTL_MAGIC, 315, struct s3c_mem_alloc) + +#define S3C_MEM_CACHEABLE_ALLOC _IOWR(MEM_IOCTL_MAGIC, 316, struct s3c_mem_alloc) +#define S3C_MEM_CACHEABLE_SHARE_ALLOC _IOWR(MEM_IOCTL_MAGIC, 317, struct s3c_mem_alloc) + +#define S3C_MEM_DMA_COPY _IOWR(MEM_IOCTL_MAGIC, 318, struct s3c_mem_dma_param) +#define S3C_MEM_DMA_SET _IOWR(MEM_IOCTL_MAGIC, 319, struct s3c_mem_dma_param) + +#define S3C_MEM_CACHE_INV _IOWR(MEM_IOCTL_MAGIC, 330, struct s3c_mem_dma_param) + + +struct s3c_mem_alloc { + int size; + unsigned int vir_addr; + unsigned int phy_addr; +}; + +struct s3c_mem_dma_param { + int size; + unsigned int src_addr; + unsigned int dst_addr; + int cfg; +}; + +#if 0 +typedef struct _s3c_mem_t{ + int dev_fd; + struct s3c_mem_alloc mem_alloc_info; +}s3c_mem_t; +#endif +#endif // _S3C_MEM_COMMON_H_ |