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authorSeungBeom Kim <sbcrux.kim@samsung.com>2011-08-16 14:33:17 +0900
committerJP Abgrall <jpa@google.com>2011-09-29 18:59:52 -0700
commitcf663174a6221ba8b2442bc7d6507e797a3954f9 (patch)
tree965457258524c91895555445fadb19d2cf54af41 /sec_mm/sec_omx/sec_codecs/video/mfc_c110/dec/src/SsbSipMfcDecAPI.c
parent70bfae5cdf49fbed04b9994c307bcf90a45c1a9f (diff)
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Changed SEC-OMX for decoding and encoding speed improvements.
1. I separate thread for decode and other(CSC) in OMX component. OMX is processing color converting when one frame decoding. (parallel processing.) (n-1)frame CSC with (n)frame decode are process At the same time. Encoding scheme is the same as decoding scheme. 2. MFC use cacheable input and ouput buffer. Because, ICS framework can not use '0'copy. use real data. Therefore, should be used Cacheable buffer at CSC for performance. Dependencies - Change Ia0191181: S5PC11X: MFC: MFC use cacheable buffer for improve performance. Change-Id: Ib07a00f2569dd80b9def015d4b1fdcfbb9d36c67 Signed-off-by: SeungBeom Kim <sbcrux.kim@samsung.com>
Diffstat (limited to 'sec_mm/sec_omx/sec_codecs/video/mfc_c110/dec/src/SsbSipMfcDecAPI.c')
-rw-r--r--sec_mm/sec_omx/sec_codecs/video/mfc_c110/dec/src/SsbSipMfcDecAPI.c15
1 files changed, 14 insertions, 1 deletions
diff --git a/sec_mm/sec_omx/sec_codecs/video/mfc_c110/dec/src/SsbSipMfcDecAPI.c b/sec_mm/sec_omx/sec_codecs/video/mfc_c110/dec/src/SsbSipMfcDecAPI.c
index 19b63b0..8e47683 100644
--- a/sec_mm/sec_omx/sec_codecs/video/mfc_c110/dec/src/SsbSipMfcDecAPI.c
+++ b/sec_mm/sec_omx/sec_codecs/video/mfc_c110/dec/src/SsbSipMfcDecAPI.c
@@ -84,11 +84,13 @@ out:
return MFC_UNPACKED_PB;
}
-void *SsbSipMfcDecOpen(void)
+void *SsbSipMfcDecOpen(void *value)
{
int hMFCOpen;
unsigned int mapped_addr;
_MFCLIB *pCTX;
+ mfc_common_args DecArg;
+ int ret_code;
pCTX = (_MFCLIB *)malloc(sizeof(_MFCLIB));
if (pCTX == NULL) {
@@ -103,6 +105,17 @@ void *SsbSipMfcDecOpen(void)
return NULL;
}
+ if (*(unsigned int *)value == NO_CACHE ||
+ *(unsigned int *)value == CACHE) {
+ DecArg.args.buf_type = *(unsigned int *)value;
+ ret_code = ioctl(hMFCOpen, IOCTL_MFC_BUF_CACHE, &DecArg);
+ if (DecArg.ret_code != MFC_RET_OK) {
+ LOGE("SsbSipMfcDecOpenExt: IOCTL_MFC_BUF_CACHE (%d) failed\n", DecArg.ret_code);
+ }
+ } else {
+ LOGE("SsbSipMfcDecOpenExt: value is invalid, value: %d\n", *(int *)value);
+ }
+
mapped_addr = (unsigned int)mmap(0, MMAP_BUFFER_SIZE_MMAP, PROT_READ | PROT_WRITE, MAP_SHARED, hMFCOpen, 0);
if (!mapped_addr) {
LOGE("SsbSipMfcDecOpen: FIMV5.0 driver address mapping failed\n");