SMDK4x12 Camera

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>

4 files changed, 1604 insertions, 0 deletions

diff --git a/camera/include/fimc.h b/camera/include/fimc.h
new file mode 100644
index 0000000..3e7732d
--- /dev/null
+++ b/camera/include/fimc.h
@@ -0,0 +1,405 @@
+/* linux/drivers/media/video/samsung/fimc/fimc.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *		http://www.samsung.com/
+ *
+ * Header file for Samsung Camera Interface (FIMC) driver
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+
+#ifndef __FIMC_H
+#define __FIMC_H __FILE__
+
+typedef unsigned int dma_addr_t;
+typedef __u32  u32;
+typedef __s32  s32;
+
+#ifdef __KERNEL__
+#include <linux/wait.h>
+#include <linux/mutex.h>
+#include <linux/i2c.h>
+#include <linux/fb.h>
+#include <linux/videodev2.h>
+#include <linux/platform_device.h>
+#include <media/v4l2-common.h>
+#include <media/v4l2-device.h>
+#include <media/v4l2-ioctl.h>
+#include <media/videobuf-core.h>
+#ifdef CONFIG_SLP_DMABUF
+#include <media/videobuf2-core.h>
+#endif
+#include <media/v4l2-mediabus.h>
+#if defined(CONFIG_BUSFREQ_OPP) || defined(CONFIG_BUSFREQ_LOCK_WRAPPER)
+#include <mach/dev.h>
+#endif
+#include <plat/media.h>
+#include <plat/fimc.h>
+#include <plat/cpu.h>
+#endif
+
+#ifdef CONFIG_PM_RUNTIME
+#include <linux/pm_runtime.h>
+#endif
+
+#define FIMC_NAME		"s3c-fimc"
+#define FIMC_CMA_NAME		"fimc"
+
+#define FIMC_CORE_CLK		"sclk_fimc"
+
+extern int fimc_clk_rate(void);
+
+#define EXYNOS_BUSFREQ_NAME	"exynos-busfreq"
+
+#if defined(CONFIG_ARCH_EXYNOS4)
+#define FIMC_DEVICES		4
+#define FIMC_PHYBUFS		32
+#define FIMC_MAXCAMS		7
+#else
+#define FIMC_DEVICES		3
+#define FIMC_PHYBUFS		4
+#define FIMC_MAXCAMS		5
+#endif
+
+#define FIMC_SUBDEVS		3
+#define FIMC_OUTBUFS		3
+#define FIMC_INQUEUES		10
+#if defined(CONFIG_SLP)
+#define FIMC_MAX_CTXS		8
+#else
+#define FIMC_MAX_CTXS		4
+#endif
+#define FIMC_TPID		3
+#define FIMC_CAPBUFS		32
+#define FIMC_ONESHOT_TIMEOUT	200
+#define FIMC_DQUEUE_TIMEOUT	1000
+
+#define FIMC_FIFOOFF_CNT	1000000 /* Sufficiently big value for stop */
+
+#define FORMAT_FLAGS_PACKED	0x1
+#define FORMAT_FLAGS_PLANAR	0x2
+
+#define FIMC_ADDR_Y		0
+#define FIMC_ADDR_CB		1
+#define FIMC_ADDR_CR		2
+
+#define FIMC_HD_WIDTH		1280
+#define FIMC_HD_HEIGHT		720
+
+#define FIMC_FHD_WIDTH		1920
+#define FIMC_FHD_HEIGHT		1080
+
+#define FIMC_MMAP_IDX		-1
+#define FIMC_USERPTR_IDX	-2
+
+#define FIMC_HCLK		0
+#define FIMC_SCLK		1
+#define CSI_CH_0		0
+#define CSI_CH_1		1
+#if defined(CONFIG_VIDEO_FIMC_FIFO)
+#define FIMC_OVLY_MODE FIMC_OVLY_FIFO
+#elif defined(CONFIG_VIDEO_FIMC_DMA_AUTO)
+#define FIMC_OVLY_MODE FIMC_OVLY_DMA_AUTO
+#endif
+
+#define PINGPONG_2ADDR_MODE
+#if defined(PINGPONG_2ADDR_MODE)
+#define FIMC_PINGPONG 2
+#endif
+
+#define check_bit(data, loc)	((data) & (0x1<<(loc)))
+#define FRAME_SEQ		0xf
+
+#define fimc_cam_use		((pdata->use_cam) ? 1 : 0)
+
+#define L2_FLUSH_ALL	SZ_1M
+#define L1_FLUSH_ALL	SZ_64K
+
+/*
+ * ENUMERATIONS
+*/
+enum fimc_status {
+	FIMC_READY_OFF		= 0x00,
+	FIMC_STREAMOFF		= 0x01,
+	FIMC_READY_ON		= 0x02,
+	FIMC_STREAMON		= 0x03,
+	FIMC_STREAMON_IDLE	= 0x04, /* oneshot mode */
+	FIMC_OFF_SLEEP		= 0x05,
+	FIMC_ON_SLEEP		= 0x06,
+	FIMC_ON_IDLE_SLEEP	= 0x07, /* oneshot mode */
+	FIMC_READY_RESUME	= 0x08,
+	FIMC_BUFFER_STOP	= 0x09,
+	FIMC_BUFFER_START	= 0x0A,
+};
+
+enum fimc_fifo_state {
+	FIFO_CLOSE,
+	FIFO_SLEEP,
+};
+
+enum fimc_fimd_state {
+	FIMD_OFF,
+	FIMD_ON,
+};
+
+enum fimc_rot_flip {
+	FIMC_XFLIP	= 0x01,
+	FIMC_YFLIP	= 0x02,
+	FIMC_ROT	= 0x10,
+};
+
+enum fimc_input {
+	FIMC_SRC_CAM,
+	FIMC_SRC_MSDMA,
+};
+
+enum fimc_overlay_mode {
+	FIMC_OVLY_NOT_FIXED		= 0x0,	/* Overlay mode isn't fixed. */
+	FIMC_OVLY_FIFO			= 0x1,	/* Non-destructive Overlay with FIFO */
+	FIMC_OVLY_DMA_AUTO		= 0x2,	/* Non-destructive Overlay with DMA */
+	FIMC_OVLY_DMA_MANUAL		= 0x3,	/* Non-destructive Overlay with DMA */
+	FIMC_OVLY_NONE_SINGLE_BUF	= 0x4,	/* Destructive Overlay with DMA single destination buffer */
+	FIMC_OVLY_NONE_MULTI_BUF	= 0x5,	/* Destructive Overlay with DMA multiple dstination buffer */
+};
+
+enum fimc_autoload {
+	FIMC_AUTO_LOAD,
+	FIMC_ONE_SHOT,
+};
+
+enum fimc_log {
+	FIMC_LOG_DEBUG		= 0x1000,
+	FIMC_LOG_INFO_L2	= 0x0200,
+	FIMC_LOG_INFO_L1	= 0x0100,
+	FIMC_LOG_WARN		= 0x0010,
+	FIMC_LOG_ERR		= 0x0001,
+};
+
+enum fimc_range {
+	FIMC_RANGE_NARROW	= 0x0,
+	FIMC_RANGE_WIDE		= 0x1,
+};
+
+enum fimc_pixel_format_type{
+	FIMC_RGB,
+	FIMC_YUV420,
+	FIMC_YUV422,
+	FIMC_YUV444,
+};
+
+enum fimc_framecnt_seq {
+	FIMC_FRAMECNT_SEQ_DISABLE,
+	FIMC_FRAMECNT_SEQ_ENABLE,
+};
+
+enum fimc_sysmmu_flag {
+	FIMC_SYSMMU_OFF,
+	FIMC_SYSMMU_ON,
+};
+
+enum fimc_id {
+	FIMC0 = 0x0,
+	FIMC1 = 0x1,
+	FIMC2 = 0x2,
+	FIMC3 = 0x3,
+};
+
+enum fimc_power_status {
+	FIMC_POWER_OFF,
+	FIMC_POWER_ON,
+	FIMC_POWER_SUSPEND,
+};
+
+enum cam_mclk_status {
+	CAM_MCLK_OFF,
+	CAM_MCLK_ON,
+};
+
+enum fimc_plane_num {
+	PLANE_1 = 0x1,
+	PLANE_2 = 0x2,
+	PLANE_3 = 0x3,
+	PLANE_4 = 0x4,
+};
+
+/*
+ * STRUCTURES
+*/
+
+/* for reserved memory */
+struct fimc_meminfo {
+#ifdef CONFIG_USE_FIMC_CMA
+	void		*cpu_addr;
+#endif
+	dma_addr_t	base;		/* buffer base */
+	size_t		size;		/* total length */
+	dma_addr_t	curr;		/* current addr */
+	dma_addr_t	vaddr_base;		/* buffer base */
+	dma_addr_t	vaddr_curr;		/* current addr */
+};
+
+struct fimc_buf {
+	dma_addr_t	base[3];
+	size_t		length[3];
+};
+
+struct fimc_overlay_buf {
+	u32 vir_addr[3];
+	size_t size[3];
+	u32 phy_addr[3];
+};
+
+struct fimc_overlay {
+	enum fimc_overlay_mode mode;
+	struct fimc_overlay_buf buf;
+	s32 req_idx;
+};
+
+/* for output overlay device */
+struct fimc_idx {
+	int ctx;
+	int idx;
+};
+
+struct fimc_ctx_idx {
+	struct fimc_idx prev;
+	struct fimc_idx active;
+	struct fimc_idx next;
+};
+
+/* scaler abstraction: local use recommended */
+struct fimc_scaler {
+	u32 bypass;
+	u32 hfactor;
+	u32 vfactor;
+	u32 pre_hratio;
+	u32 pre_vratio;
+	u32 pre_dst_width;
+	u32 pre_dst_height;
+	u32 scaleup_h;
+	u32 scaleup_v;
+	u32 main_hratio;
+	u32 main_vratio;
+	u32 real_width;
+	u32 real_height;
+	u32 shfactor;
+	u32 skipline;
+};
+
+struct s3cfb_user_window {
+	int x;
+	int y;
+};
+
+enum s3cfb_data_path_t {
+	DATA_PATH_FIFO	= 0,
+	DATA_PATH_DMA	= 1,
+	DATA_PATH_IPC	= 2,
+};
+
+enum s3cfb_mem_owner_t {
+	DMA_MEM_NONE	= 0,
+	DMA_MEM_FIMD	= 1,
+	DMA_MEM_OTHER	= 2,
+};
+#define S3CFB_WIN_OFF_ALL	_IO('F', 202)
+#define S3CFB_WIN_POSITION	_IOW('F', 203, struct s3cfb_user_window)
+#define S3CFB_GET_LCD_WIDTH	_IOR('F', 302, int)
+#define S3CFB_GET_LCD_HEIGHT	_IOR('F', 303, int)
+#define S3CFB_SET_WRITEBACK	_IOW('F', 304, u32)
+#define S3CFB_SET_WIN_ON	_IOW('F', 305, u32)
+#define S3CFB_SET_WIN_OFF	_IOW('F', 306, u32)
+#define S3CFB_SET_WIN_PATH	_IOW('F', 307, enum s3cfb_data_path_t)
+#define S3CFB_SET_WIN_ADDR	_IOW('F', 308, unsigned long)
+#define S3CFB_SET_WIN_MEM	_IOW('F', 309, enum s3cfb_mem_owner_t)
+/* ------------------------------------------------------------------------ */
+
+struct fimc_fbinfo {
+	struct fb_fix_screeninfo	*fix;
+	struct fb_var_screeninfo	*var;
+	int				lcd_hres;
+	int				lcd_vres;
+	u32				is_enable;
+	/* lcd fifo control */
+
+	int (*open_fifo)(int id, int ch, int (*do_priv)(void *), void *param);
+	int (*close_fifo)(int id, int (*do_priv)(void *), void *param);
+};
+
+struct fimc_limit {
+	u32 pre_dst_w;
+	u32 bypass_w;
+	u32 trg_h_no_rot;
+	u32 trg_h_rot;
+	u32 real_w_no_rot;
+	u32 real_h_rot;
+};
+
+enum FIMC_EFFECT_FIN {
+	FIMC_EFFECT_FIN_BYPASS = 0,
+	FIMC_EFFECT_FIN_ARBITRARY_CBCR,
+	FIMC_EFFECT_FIN_NEGATIVE,
+	FIMC_EFFECT_FIN_ART_FREEZE,
+	FIMC_EFFECT_FIN_EMBOSSING,
+	FIMC_EFFECT_FIN_SILHOUETTE,
+};
+
+
+struct fimc_effect {
+	int ie_on;
+	int ie_after_sc;
+	enum FIMC_EFFECT_FIN fin;
+	int pat_cb;
+	int pat_cr;
+};
+
+/* debug macro */
+#define FIMC_LOG_DEFAULT	(FIMC_LOG_WARN | FIMC_LOG_ERR)
+
+#define FIMC_DEBUG(fmt, ...)						\
+	do {								\
+		if (ctrl->log & FIMC_LOG_DEBUG)				\
+			printk(KERN_DEBUG FIMC_NAME "%d: "		\
+				fmt, ctrl->id, ##__VA_ARGS__);			\
+	} while (0)
+
+#define FIMC_INFO_L2(fmt, ...)						\
+	do {								\
+		if (ctrl->log & FIMC_LOG_INFO_L2)			\
+			printk(KERN_INFO FIMC_NAME "%d: "		\
+				fmt, ctrl->id, ##__VA_ARGS__);			\
+	} while (0)
+
+#define FIMC_INFO_L1(fmt, ...)						\
+	do {								\
+		if (ctrl->log & FIMC_LOG_INFO_L1)			\
+			printk(KERN_INFO FIMC_NAME "%d: "		\
+				fmt, ctrl->id, ##__VA_ARGS__);			\
+	} while (0)
+
+#define FIMC_WARN(fmt, ...)						\
+	do {								\
+		if (ctrl->log & FIMC_LOG_WARN)				\
+			printk(KERN_WARNING FIMC_NAME "%d: "		\
+				fmt, ctrl->id, ##__VA_ARGS__);			\
+	} while (0)
+
+
+#define FIMC_ERROR(fmt, ...)						\
+	do {								\
+		if (ctrl->log & FIMC_LOG_ERR)				\
+			printk(KERN_ERR FIMC_NAME "%d: "		\
+				fmt, ctrl->id, ##__VA_ARGS__);			\
+	} while (0)
+
+
+#define fimc_dbg(fmt, ...)		FIMC_DEBUG(fmt, ##__VA_ARGS__)
+#define fimc_info2(fmt, ...)		FIMC_INFO_L2(fmt, ##__VA_ARGS__)
+#define fimc_info1(fmt, ...)		FIMC_INFO_L1(fmt, ##__VA_ARGS__)
+#define fimc_warn(fmt, ...)		FIMC_WARN(fmt, ##__VA_ARGS__)
+#define fimc_err(fmt, ...)		FIMC_ERROR(fmt, ##__VA_ARGS__)
+
+#endif /* __FIMC_H */
diff --git a/camera/include/ion.h b/camera/include/ion.h
new file mode 100644
index 0000000..29dba57
--- /dev/null
+++ b/camera/include/ion.h
@@ -0,0 +1,449 @@
+/*
+ * include/linux/ion.h
+ *
+ * Copyright (C) 2011 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef _LINUX_ION_H
+#define _LINUX_ION_H
+
+#include <linux/types.h>
+
+#define CONFIG_ION_EXYNOS
+
+/* This should be removed some day when phys_addr_t's are fully
+   plumbed in the kernel, and all instances of ion_phys_addr_t should
+   be converted to phys_addr_t.  For the time being many kernel interfaces
+   do not accept phys_addr_t's that would have to */
+#define ion_phys_addr_t unsigned long
+
+struct ion_handle;
+/**
+ * enum ion_heap_types - list of all possible types of heaps
+ * @ION_HEAP_TYPE_SYSTEM:	 memory allocated via vmalloc
+ * @ION_HEAP_TYPE_SYSTEM_CONTIG: memory allocated via kmalloc
+ * @ION_HEAP_TYPE_CARVEOUT:	 memory allocated from a prereserved
+ * 				 carveout heap, allocations are physically
+ * 				 contiguous
+ * @ION_HEAP_END:		 helper for iterating over heaps
+ */
+enum ion_heap_type {
+	ION_HEAP_TYPE_SYSTEM,
+	ION_HEAP_TYPE_SYSTEM_CONTIG,
+	ION_HEAP_TYPE_CARVEOUT,
+	ION_HEAP_TYPE_CUSTOM, /* must be last so device specific heaps always
+				 are at the end of this enum */
+#ifdef CONFIG_ION_EXYNOS
+	ION_HEAP_TYPE_EXYNOS_CONTIG,
+	ION_HEAP_TYPE_EXYNOS,
+	ION_HEAP_TYPE_EXYNOS_USER,
+#endif
+	ION_NUM_HEAPS,
+};
+
+#define ION_HEAP_SYSTEM_MASK		(1 << ION_HEAP_TYPE_SYSTEM)
+#define ION_HEAP_SYSTEM_CONTIG_MASK	(1 << ION_HEAP_TYPE_SYSTEM_CONTIG)
+#define ION_HEAP_CARVEOUT_MASK		(1 << ION_HEAP_TYPE_CARVEOUT)
+
+#ifdef CONFIG_ION_EXYNOS
+#define ION_HEAP_EXYNOS_MASK		(1 << ION_HEAP_TYPE_EXYNOS)
+#define ION_HEAP_EXYNOS_CONTIG_MASK	(1 << ION_HEAP_TYPE_EXYNOS_CONTIG)
+#define ION_HEAP_EXYNOS_USER_MASK	(1 << ION_HEAP_TYPE_EXYNOS_USER)
+#define ION_EXYNOS_NONCACHE_MASK	(1 << (BITS_PER_LONG - 2))
+#define ION_EXYNOS_WRITE_MASK		(1 << (BITS_PER_LONG - 1))
+#endif
+
+#ifdef __KERNEL__
+struct ion_device;
+struct ion_heap;
+struct ion_mapper;
+struct ion_client;
+struct ion_buffer;
+
+/**
+ * struct ion_platform_heap - defines a heap in the given platform
+ * @type:	type of the heap from ion_heap_type enum
+ * @id:		unique identifier for heap.  When allocating (lower numbers 
+ * 		will be allocated from first)
+ * @name:	used for debug purposes
+ * @base:	base address of heap in physical memory if applicable
+ * @size:	size of the heap in bytes if applicable
+ *
+ * Provided by the board file.
+ */
+struct ion_platform_heap {
+	enum ion_heap_type type;
+	unsigned int id;
+	const char *name;
+	ion_phys_addr_t base;
+	size_t size;
+};
+
+/**
+ * struct ion_platform_data - array of platform heaps passed from board file
+ * @nr:		number of structures in the array
+ * @heaps:	array of platform_heap structions
+ *
+ * Provided by the board file in the form of platform data to a platform device.
+ */
+struct ion_platform_data {
+	int nr;
+	struct ion_platform_heap heaps[];
+};
+
+/**
+ * ion_client_create() -  allocate a client and returns it
+ * @dev:	the global ion device
+ * @heap_mask:	mask of heaps this client can allocate from
+ * @name:	used for debugging
+ */
+struct ion_client *ion_client_create(struct ion_device *dev,
+				     unsigned int heap_mask, const char *name);
+
+/**
+ * ion_client_destroy() -  free's a client and all it's handles
+ * @client:	the client
+ *
+ * Free the provided client and all it's resources including
+ * any handles it is holding.
+ */
+void ion_client_destroy(struct ion_client *client);
+
+/**
+ * ion_get_client() - obtain a user client from file descriptor from user
+ * @fd:		the user client created by the request from user. This is
+ *		passed from user.
+ *
+ * This function is requested by the device drivers that implement V4L2 and VB2
+ * interfaces. Those device drivers just obtains virtual address of a buffer
+ * even though it is allocated and mapped by ION. While they can retrieve the
+ * handle of the buffer, they are unable to access it because they do not know
+ * what client the handle belongs to.
+ * Note that the client obtained by this function is not released until
+ * ion_put_client() is called and the client is given.
+ */
+struct ion_client *ion_get_user_client(unsigned int fd_client);
+
+/**
+ * ion_put_client() - release the user client obtained by ion_get_client()
+ * @client - The user client to release.
+ */
+void ion_put_user_client(struct ion_client *user_client);
+
+/**
+ * ion_alloc - allocate ion memory
+ * @client:	the client
+ * @len:	size of the allocation
+ * @align:	requested allocation alignment, lots of hardware blocks have
+ *		alignment requirements of some kind
+ * @flags:	mask of heaps to allocate from, if multiple bits are set
+ *		heaps will be tried in order from lowest to highest order bit
+ *
+ * Allocate memory in one of the heaps provided in heap mask and return
+ * an opaque handle to it.
+ */
+struct ion_handle *ion_alloc(struct ion_client *client, size_t len,
+			     size_t align, unsigned int flags);
+
+/**
+ * ion_free - free a handle
+ * @client:	the client
+ * @handle:	the handle to free
+ *
+ * Free the provided handle.
+ */
+void ion_free(struct ion_client *client, struct ion_handle *handle);
+
+/**
+ * ion_phys - returns the physical address and len of a handle
+ * @client:	the client
+ * @handle:	the handle
+ * @addr:	a pointer to put the address in
+ * @len:	a pointer to put the length in
+ *
+ * This function queries the heap for a particular handle to get the
+ * handle's physical address.  It't output is only correct if
+ * a heap returns physically contiguous memory -- in other cases
+ * this api should not be implemented -- ion_map_dma should be used
+ * instead.  Returns -EINVAL if the handle is invalid.  This has
+ * no implications on the reference counting of the handle --
+ * the returned value may not be valid if the caller is not
+ * holding a reference.
+ */
+int ion_phys(struct ion_client *client, struct ion_handle *handle,
+	     ion_phys_addr_t *addr, size_t *len);
+
+/**
+ * ion_map_kernel - create mapping for the given handle
+ * @client:	the client
+ * @handle:	handle to map
+ *
+ * Map the given handle into the kernel and return a kernel address that
+ * can be used to access this address.
+ */
+void *ion_map_kernel(struct ion_client *client, struct ion_handle *handle);
+
+/**
+ * ion_unmap_kernel() - destroy a kernel mapping for a handle
+ * @client:	the client
+ * @handle:	handle to unmap
+ */
+void ion_unmap_kernel(struct ion_client *client, struct ion_handle *handle);
+
+/**
+ * ion_map_dma - create a dma mapping for a given handle
+ * @client:	the client
+ * @handle:	handle to map
+ *
+ * Return an sglist describing the given handle
+ */
+struct scatterlist *ion_map_dma(struct ion_client *client,
+				struct ion_handle *handle);
+
+/**
+ * ion_unmap_dma() - destroy a dma mapping for a handle
+ * @client:	the client
+ * @handle:	handle to unmap
+ */
+void ion_unmap_dma(struct ion_client *client, struct ion_handle *handle);
+
+/**
+ * ion_share() - given a handle, obtain a buffer to pass to other clients
+ * @client:	the client
+ * @handle:	the handle to share
+ *
+ * Given a handle, return a buffer, which exists in a global name
+ * space, and can be passed to other clients.  Should be passed into ion_import
+ * to obtain a new handle for this buffer.
+ *
+ * NOTE: This function does do not an extra reference.  The burden is on the
+ * caller to make sure the buffer doesn't go away while it's being passed to
+ * another client.  That is, ion_free should not be called on this handle until
+ * the buffer has been imported into the other client.
+ */
+struct ion_buffer *ion_share(struct ion_client *client,
+			     struct ion_handle *handle);
+
+/**
+ * ion_import() - given an buffer in another client, import it
+ * @client:	this blocks client
+ * @buffer:	the buffer to import (as obtained from ion_share)
+ *
+ * Given a buffer, add it to the client and return the handle to use to refer
+ * to it further.  This is called to share a handle from one kernel client to
+ * another.
+ */
+struct ion_handle *ion_import(struct ion_client *client,
+			      struct ion_buffer *buffer);
+
+/**
+ * ion_share_fd() - given a handle, obtain a buffer(fd) to pass to userspace
+ * @client:	the client
+ * @handle:	the handle to share
+ *
+ * Given a handle, return a fd of a buffer which can be passed to userspace.
+ * Should be passed into userspace or ion_import_fd to obtain a new handle for
+ * this buffer.
+ */
+int ion_share_fd(struct ion_client *client, struct ion_handle *handle);
+
+/**
+ * ion_import_fd() - given an fd obtained via ION_IOC_SHARE ioctl, import it
+ * @client:	this blocks client
+ * @fd:		the fd
+ *
+ * A helper function for drivers that will be recieving ion buffers shared
+ * with them from userspace.  These buffers are represented by a file
+ * descriptor obtained as the return from the ION_IOC_SHARE ioctl.
+ * This function coverts that fd into the underlying buffer, and returns
+ * the handle to use to refer to it further.
+ */
+struct ion_handle *ion_import_fd(struct ion_client *client, int fd);
+
+/**
+ * ion_import_uva() - given a virtual address from user, that is mmapped on an
+ *                    fd obtained via ION_IOCTL_SHARE ioctl, import it
+ * @client:    this blocks client
+ * @uva:       virtual address in userspace.
+ * @offset:	How many bytes are distant from the beginning of the ION buffer
+ *
+ * A helper function for drivers that will be recieving ion buffers shared
+ * with them from userspace.  These buffers are represented by a virtual
+ * address that is mmaped on a file descriptor obtained as the return from the
+ * ION_IOC_SHARE ioctl.
+ * This function does same job with ion_import_fd().
+ */
+struct ion_handle *ion_import_uva(struct ion_client *client, unsigned long uva,
+								off_t *offset);
+
+#ifdef CONFIG_ION_EXYNOS
+struct ion_handle *ion_exynos_get_user_pages(struct ion_client *client,
+			unsigned long uvaddr, size_t len, unsigned int flags);
+#else
+#include <linux/err.h>
+static inline struct ion_handle *ion_exynos_get_user_pages(
+				struct ion_client *client, unsigned long uvaddr,
+				size_t len, unsigned int flags)
+{
+	return ERR_PTR(-ENOSYS);
+}
+#endif
+
+#endif /* __KERNEL__ */
+
+/**
+ * DOC: Ion Userspace API
+ *
+ * create a client by opening /dev/ion
+ * most operations handled via following ioctls
+ *
+ */
+
+/**
+ * struct ion_allocation_data - metadata passed from userspace for allocations
+ * @len:	size of the allocation
+ * @align:	required alignment of the allocation
+ * @flags:	flags passed to heap
+ * @handle:	pointer that will be populated with a cookie to use to refer
+ *		to this allocation
+ *
+ * Provided by userspace as an argument to the ioctl
+ */
+struct ion_allocation_data {
+	size_t len;
+	size_t align;
+	unsigned int flags;
+	struct ion_handle *handle;
+};
+
+/**
+ * struct ion_fd_data - metadata passed to/from userspace for a handle/fd pair
+ * @handle:	a handle
+ * @fd:		a file descriptor representing that handle
+ *
+ * For ION_IOC_SHARE or ION_IOC_MAP userspace populates the handle field with
+ * the handle returned from ion alloc, and the kernel returns the file
+ * descriptor to share or map in the fd field.  For ION_IOC_IMPORT, userspace
+ * provides the file descriptor and the kernel returns the handle.
+ */
+struct ion_fd_data {
+	struct ion_handle *handle;
+	int fd;
+};
+
+/**
+ * struct ion_handle_data - a handle passed to/from the kernel
+ * @handle:	a handle
+ */
+struct ion_handle_data {
+	struct ion_handle *handle;
+};
+
+/**
+ * struct ion_custom_data - metadata passed to/from userspace for a custom ioctl
+ * @cmd:	the custom ioctl function to call
+ * @arg:	additional data to pass to the custom ioctl, typically a user
+ *		pointer to a predefined structure
+ *
+ * This works just like the regular cmd and arg fields of an ioctl.
+ */
+struct ion_custom_data {
+	unsigned int cmd;
+	unsigned long arg;
+};
+
+enum ION_MSYNC_TYPE {
+	IMSYNC_DEV_TO_READ = 0,
+	IMSYNC_DEV_TO_WRITE = 1,
+	IMSYNC_DEV_TO_RW = 2,
+	IMSYNC_BUF_TYPES_MASK = 3,
+	IMSYNC_BUF_TYPES_NUM = 4,
+	IMSYNC_SYNC_FOR_DEV = 0x10000,
+	IMSYNC_SYNC_FOR_CPU = 0x20000,
+};
+
+struct ion_msync_data {
+	enum ION_MSYNC_TYPE dir;
+	int fd_buffer;
+	size_t size;
+	off_t offset;
+};
+
+struct ion_phys_data {
+	int fd_buffer;
+	ion_phys_addr_t phys;
+	size_t size;
+};
+
+enum ION_EXYNOS_CUSTOM_CMD {
+	ION_EXYNOS_CUSTOM_MSYNC,
+	ION_EXYNOS_CUSTOM_PHYS
+};
+
+#define ION_IOC_MAGIC		'I'
+
+/**
+ * DOC: ION_IOC_ALLOC - allocate memory
+ *
+ * Takes an ion_allocation_data struct and returns it with the handle field
+ * populated with the opaque handle for the allocation.
+ */
+#define ION_IOC_ALLOC		_IOWR(ION_IOC_MAGIC, 0, \
+				      struct ion_allocation_data)
+
+/**
+ * DOC: ION_IOC_FREE - free memory
+ *
+ * Takes an ion_handle_data struct and frees the handle.
+ */
+#define ION_IOC_FREE		_IOWR(ION_IOC_MAGIC, 1, struct ion_handle_data)
+
+/**
+ * DOC: ION_IOC_MAP - get a file descriptor to mmap
+ *
+ * Takes an ion_fd_data struct with the handle field populated with a valid
+ * opaque handle.  Returns the struct with the fd field set to a file
+ * descriptor open in the current address space.  This file descriptor
+ * can then be used as an argument to mmap.
+ */
+#define ION_IOC_MAP		_IOWR(ION_IOC_MAGIC, 2, struct ion_fd_data)
+
+/**
+ * DOC: ION_IOC_SHARE - creates a file descriptor to use to share an allocation
+ *
+ * Takes an ion_fd_data struct with the handle field populated with a valid
+ * opaque handle.  Returns the struct with the fd field set to a file
+ * descriptor open in the current address space.  This file descriptor
+ * can then be passed to another process.  The corresponding opaque handle can
+ * be retrieved via ION_IOC_IMPORT.
+ */
+#define ION_IOC_SHARE		_IOWR(ION_IOC_MAGIC, 4, struct ion_fd_data)
+
+/**
+ * DOC: ION_IOC_IMPORT - imports a shared file descriptor
+ *
+ * Takes an ion_fd_data struct with the fd field populated with a valid file
+ * descriptor obtained from ION_IOC_SHARE and returns the struct with the handle
+ * filed set to the corresponding opaque handle.
+ */
+#define ION_IOC_IMPORT		_IOWR(ION_IOC_MAGIC, 5, int)
+
+/**
+ * DOC: ION_IOC_CUSTOM - call architecture specific ion ioctl
+ *
+ * Takes the argument of the architecture specific ioctl to call and
+ * passes appropriate userdata for that ioctl
+ */
+#define ION_IOC_CUSTOM		_IOWR(ION_IOC_MAGIC, 6, struct ion_custom_data)
+
+#endif /* _LINUX_ION_H */
diff --git a/camera/include/linux/fimc.h b/camera/include/linux/fimc.h
new file mode 100644
index 0000000..40deab0
--- /dev/null
+++ b/camera/include/linux/fimc.h
@@ -0,0 +1,381 @@
+/* linux/drivers/media/video/samsung/fimc/fimc.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *		http://www.samsung.com/
+ *
+ * Header file for Samsung Camera Interface (FIMC) driver
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+
+#ifndef __FIMC_H
+#define __FIMC_H __FILE__
+
+typedef unsigned int dma_addr_t;
+typedef __u32  u32;
+typedef __s32  s32;
+
+#ifdef __KERNEL__
+#include <linux/wait.h>
+#include <linux/mutex.h>
+#include <linux/i2c.h>
+#include <linux/fb.h>
+#include <linux/videodev2.h>
+#include <linux/platform_device.h>
+#include <media/v4l2-common.h>
+#include <media/v4l2-device.h>
+#include <media/v4l2-ioctl.h>
+#include <media/videobuf-core.h>
+#include <media/v4l2-mediabus.h>
+#if defined(CONFIG_BUSFREQ_OPP) || defined(CONFIG_BUSFREQ_LOCK_WRAPPER)
+#include <mach/dev.h>
+#endif
+#include <plat/media.h>
+#include <plat/fimc.h>
+#include <plat/cpu.h>
+#endif
+
+#ifdef CONFIG_PM_RUNTIME
+#include <linux/pm_runtime.h>
+#endif
+
+#define FIMC_NAME		"s3c-fimc"
+#define FIMC_CMA_NAME		"fimc"
+
+#define FIMC_CORE_CLK		"sclk_fimc"
+#define FIMC_CLK_RATE		166750000
+#define EXYNOS_BUSFREQ_NAME	"exynos-busfreq"
+
+#if defined(CONFIG_ARCH_EXYNOS4)
+#define FIMC_DEVICES		4
+#define FIMC_PHYBUFS		32
+#define FIMC_MAXCAMS		7
+#else
+#define FIMC_DEVICES		3
+#define FIMC_PHYBUFS		4
+#define FIMC_MAXCAMS		5
+#endif
+
+#define FIMC_SUBDEVS		3
+#define FIMC_OUTBUFS		3
+#define FIMC_INQUEUES		10
+#define FIMC_MAX_CTXS		4
+#define FIMC_TPID		3
+#define FIMC_CAPBUFS		32
+#define FIMC_ONESHOT_TIMEOUT	200
+#define FIMC_DQUEUE_TIMEOUT	1000
+
+#define FIMC_FIFOOFF_CNT	1000000 /* Sufficiently big value for stop */
+
+#define FORMAT_FLAGS_PACKED	0x1
+#define FORMAT_FLAGS_PLANAR	0x2
+
+#define FIMC_ADDR_Y		0
+#define FIMC_ADDR_CB		1
+#define FIMC_ADDR_CR		2
+
+#define FIMC_HD_WIDTH		1280
+#define FIMC_HD_HEIGHT		720
+
+#define FIMC_FHD_WIDTH		1920
+#define FIMC_FHD_HEIGHT		1080
+
+#define FIMC_MMAP_IDX		-1
+#define FIMC_USERPTR_IDX	-2
+
+#define FIMC_HCLK		0
+#define FIMC_SCLK		1
+#define CSI_CH_0		0
+#define CSI_CH_1		1
+#if defined(CONFIG_VIDEO_FIMC_FIFO)
+#define FIMC_OVLY_MODE FIMC_OVLY_FIFO
+#elif defined(CONFIG_VIDEO_FIMC_DMA_AUTO)
+#define FIMC_OVLY_MODE FIMC_OVLY_DMA_AUTO
+#endif
+
+#define PINGPONG_2ADDR_MODE
+#if defined(PINGPONG_2ADDR_MODE)
+#define FIMC_PINGPONG 2
+#endif
+
+#define check_bit(data, loc)	((data) & (0x1<<(loc)))
+#define FRAME_SEQ		0xf
+
+#define fimc_cam_use		((pdata->use_cam) ? 1 : 0)
+
+#define L2_FLUSH_ALL	SZ_1M
+#define L1_FLUSH_ALL	SZ_64K
+
+/*
+ * ENUMERATIONS
+*/
+enum fimc_status {
+	FIMC_READY_OFF		= 0x00,
+	FIMC_STREAMOFF		= 0x01,
+	FIMC_READY_ON		= 0x02,
+	FIMC_STREAMON		= 0x03,
+	FIMC_STREAMON_IDLE	= 0x04, /* oneshot mode */
+	FIMC_OFF_SLEEP		= 0x05,
+	FIMC_ON_SLEEP		= 0x06,
+	FIMC_ON_IDLE_SLEEP	= 0x07, /* oneshot mode */
+	FIMC_READY_RESUME	= 0x08,
+	FIMC_BUFFER_STOP	= 0x09,
+	FIMC_BUFFER_START	= 0x0A,
+};
+
+enum fimc_fifo_state {
+	FIFO_CLOSE,
+	FIFO_SLEEP,
+};
+
+enum fimc_fimd_state {
+	FIMD_OFF,
+	FIMD_ON,
+};
+
+enum fimc_rot_flip {
+	FIMC_XFLIP	= 0x01,
+	FIMC_YFLIP	= 0x02,
+	FIMC_ROT	= 0x10,
+};
+
+enum fimc_input {
+	FIMC_SRC_CAM,
+	FIMC_SRC_MSDMA,
+};
+
+enum fimc_overlay_mode {
+	FIMC_OVLY_NOT_FIXED		= 0x0,	/* Overlay mode isn't fixed. */
+	FIMC_OVLY_FIFO			= 0x1,	/* Non-destructive Overlay with FIFO */
+	FIMC_OVLY_DMA_AUTO		= 0x2,	/* Non-destructive Overlay with DMA */
+	FIMC_OVLY_DMA_MANUAL		= 0x3,	/* Non-destructive Overlay with DMA */
+	FIMC_OVLY_NONE_SINGLE_BUF	= 0x4,	/* Destructive Overlay with DMA single destination buffer */
+	FIMC_OVLY_NONE_MULTI_BUF	= 0x5,	/* Destructive Overlay with DMA multiple dstination buffer */
+};
+
+enum fimc_autoload {
+	FIMC_AUTO_LOAD,
+	FIMC_ONE_SHOT,
+};
+
+enum fimc_log {
+	FIMC_LOG_DEBUG		= 0x1000,
+	FIMC_LOG_INFO_L2	= 0x0200,
+	FIMC_LOG_INFO_L1	= 0x0100,
+	FIMC_LOG_WARN		= 0x0010,
+	FIMC_LOG_ERR		= 0x0001,
+};
+
+enum fimc_range {
+	FIMC_RANGE_NARROW	= 0x0,
+	FIMC_RANGE_WIDE		= 0x1,
+};
+
+enum fimc_pixel_format_type{
+	FIMC_RGB,
+	FIMC_YUV420,
+	FIMC_YUV422,
+	FIMC_YUV444,
+};
+
+enum fimc_framecnt_seq {
+	FIMC_FRAMECNT_SEQ_DISABLE,
+	FIMC_FRAMECNT_SEQ_ENABLE,
+};
+
+enum fimc_sysmmu_flag {
+	FIMC_SYSMMU_OFF,
+	FIMC_SYSMMU_ON,
+};
+
+enum fimc_id {
+	FIMC0 = 0x0,
+	FIMC1 = 0x1,
+	FIMC2 = 0x2,
+	FIMC3 = 0x3,
+};
+
+enum fimc_power_status {
+	FIMC_POWER_OFF,
+	FIMC_POWER_ON,
+	FIMC_POWER_SUSPEND,
+};
+
+enum cam_mclk_status {
+	CAM_MCLK_OFF,
+	CAM_MCLK_ON,
+};
+
+/*
+ * STRUCTURES
+*/
+
+/* for reserved memory */
+struct fimc_meminfo {
+	dma_addr_t	base;		/* buffer base */
+	size_t		size;		/* total length */
+	dma_addr_t	curr;		/* current addr */
+	dma_addr_t	vaddr_base;		/* buffer base */
+	dma_addr_t	vaddr_curr;		/* current addr */
+};
+
+struct fimc_buf {
+	dma_addr_t	base[3];
+	size_t		length[3];
+};
+
+struct fimc_overlay_buf {
+	u32 vir_addr[3];
+	size_t size[3];
+	u32 phy_addr[3];
+};
+
+struct fimc_overlay {
+	enum fimc_overlay_mode mode;
+	struct fimc_overlay_buf buf;
+	s32 req_idx;
+};
+
+/* for output overlay device */
+struct fimc_idx {
+	int ctx;
+	int idx;
+};
+
+struct fimc_ctx_idx {
+	struct fimc_idx prev;
+	struct fimc_idx active;
+	struct fimc_idx next;
+};
+
+/* scaler abstraction: local use recommended */
+struct fimc_scaler {
+	u32 bypass;
+	u32 hfactor;
+	u32 vfactor;
+	u32 pre_hratio;
+	u32 pre_vratio;
+	u32 pre_dst_width;
+	u32 pre_dst_height;
+	u32 scaleup_h;
+	u32 scaleup_v;
+	u32 main_hratio;
+	u32 main_vratio;
+	u32 real_width;
+	u32 real_height;
+	u32 shfactor;
+	u32 skipline;
+};
+
+struct s3cfb_user_window {
+	int x;
+	int y;
+};
+
+enum s3cfb_data_path_t {
+	DATA_PATH_FIFO	= 0,
+	DATA_PATH_DMA	= 1,
+	DATA_PATH_IPC	= 2,
+};
+
+enum s3cfb_mem_owner_t {
+	DMA_MEM_NONE	= 0,
+	DMA_MEM_FIMD	= 1,
+	DMA_MEM_OTHER	= 2,
+};
+#define S3CFB_WIN_OFF_ALL	_IO('F', 202)
+#define S3CFB_WIN_POSITION	_IOW('F', 203, struct s3cfb_user_window)
+#define S3CFB_GET_LCD_WIDTH	_IOR('F', 302, int)
+#define S3CFB_GET_LCD_HEIGHT	_IOR('F', 303, int)
+#define S3CFB_SET_WRITEBACK	_IOW('F', 304, u32)
+#define S3CFB_SET_WIN_ON	_IOW('F', 305, u32)
+#define S3CFB_SET_WIN_OFF	_IOW('F', 306, u32)
+#define S3CFB_SET_WIN_PATH	_IOW('F', 307, enum s3cfb_data_path_t)
+#define S3CFB_SET_WIN_ADDR	_IOW('F', 308, unsigned long)
+#define S3CFB_SET_WIN_MEM	_IOW('F', 309, enum s3cfb_mem_owner_t)
+/* ------------------------------------------------------------------------ */
+
+struct fimc_fbinfo {
+	struct fb_fix_screeninfo	*fix;
+	struct fb_var_screeninfo	*var;
+	int				lcd_hres;
+	int				lcd_vres;
+	u32				is_enable;
+	/* lcd fifo control */
+
+	int (*open_fifo)(int id, int ch, int (*do_priv)(void *), void *param);
+	int (*close_fifo)(int id, int (*do_priv)(void *), void *param);
+};
+
+struct fimc_limit {
+	u32 pre_dst_w;
+	u32 bypass_w;
+	u32 trg_h_no_rot;
+	u32 trg_h_rot;
+	u32 real_w_no_rot;
+	u32 real_h_rot;
+};
+
+enum FIMC_EFFECT_FIN {
+	FIMC_EFFECT_FIN_BYPASS = 0,
+	FIMC_EFFECT_FIN_ARBITRARY_CBCR,
+	FIMC_EFFECT_FIN_NEGATIVE,
+	FIMC_EFFECT_FIN_ART_FREEZE,
+	FIMC_EFFECT_FIN_EMBOSSING,
+	FIMC_EFFECT_FIN_SILHOUETTE,
+};
+
+
+struct fimc_effect {
+	int ie_on;
+	int ie_after_sc;
+	enum FIMC_EFFECT_FIN fin;
+	int pat_cb;
+	int pat_cr;
+};
+
+/* debug macro */
+#define FIMC_LOG_DEFAULT	(FIMC_LOG_WARN | FIMC_LOG_ERR)
+
+#define FIMC_DEBUG(fmt, ...)						\
+	do {								\
+			printk(KERN_DEBUG FIMC_NAME "%d: "		\
+				fmt, ctrl->id, ##__VA_ARGS__);			\
+	} while (0)
+
+#define FIMC_INFO_L2(fmt, ...)						\
+	do {								\
+			printk(KERN_INFO FIMC_NAME "%d: "		\
+				fmt, ctrl->id, ##__VA_ARGS__);			\
+	} while (0)
+
+#define FIMC_INFO_L1(fmt, ...)						\
+	do {								\
+			printk(KERN_INFO FIMC_NAME "%d: "		\
+				fmt, ctrl->id, ##__VA_ARGS__);			\
+	} while (0)
+
+#define FIMC_WARN(fmt, ...)						\
+	do {								\
+			printk(KERN_WARNING FIMC_NAME "%d: "		\
+				fmt, ctrl->id, ##__VA_ARGS__);			\
+	} while (0)
+
+
+#define FIMC_ERROR(fmt, ...)						\
+	do {								\
+			printk(KERN_ERR FIMC_NAME "%d: "		\
+				fmt, ctrl->id, ##__VA_ARGS__);			\
+	} while (0)
+
+
+#define fimc_dbg(fmt, ...)		FIMC_DEBUG(fmt, ##__VA_ARGS__)
+#define fimc_info2(fmt, ...)		FIMC_INFO_L2(fmt, ##__VA_ARGS__)
+#define fimc_info1(fmt, ...)		FIMC_INFO_L1(fmt, ##__VA_ARGS__)
+#define fimc_warn(fmt, ...)		FIMC_WARN(fmt, ##__VA_ARGS__)
+#define fimc_err(fmt, ...)		FIMC_ERROR(fmt, ##__VA_ARGS__)
+
+#endif /* __FIMC_H */
diff --git a/camera/include/s5c73m3.h b/camera/include/s5c73m3.h
new file mode 100644
index 0000000..ffb582e
--- /dev/null
+++ b/camera/include/s5c73m3.h
@@ -0,0 +1,369 @@
+/*
+ * Driver for LSI S5C73M3 (ISP for 8MP Camera)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __S5C73M3_H
+#define __S5C73M3_H
+
+#define CONFIG_CAM_DEBUG	1
+/*#define FEATURE_DEBUG_DUMP*/
+
+#define cam_warn(fmt, ...)	\
+	do { \
+		printk(KERN_WARNING "%s: " fmt, __func__, ##__VA_ARGS__); \
+	} while (0)
+
+#define cam_err(fmt, ...)	\
+	do { \
+		printk(KERN_ERR "%s: " fmt, __func__, ##__VA_ARGS__); \
+	} while (0)
+
+#define cam_info(fmt, ...)	\
+	do { \
+		printk(KERN_INFO "%s: " fmt, __func__, ##__VA_ARGS__); \
+	} while (0)
+
+#ifdef CONFIG_CAM_DEBUG
+#define CAM_DEBUG	(1 << 0)
+#define CAM_TRACE	(1 << 1)
+#define CAM_I2C		(1 << 2)
+
+#define cam_dbg(fmt, ...)	\
+	do { \
+		if (to_state(sd)->dbg_level & CAM_DEBUG) \
+			printk(KERN_DEBUG "%s: " fmt, __func__, ##__VA_ARGS__); \
+	} while (0)
+
+#define cam_trace(fmt, ...)	\
+	do { \
+		if (to_state(sd)->dbg_level & CAM_TRACE) \
+			printk(KERN_DEBUG "%s: " fmt, __func__, ##__VA_ARGS__); \
+	} while (0)
+
+#define cam_i2c_dbg(fmt, ...)	\
+	do { \
+		if (to_state(sd)->dbg_level & CAM_I2C) \
+			printk(KERN_DEBUG "%s: " fmt, __func__, ##__VA_ARGS__); \
+	} while (0)
+#else
+#define cam_dbg(fmt, ...)
+#define cam_trace(fmt, ...)
+#define cam_i2c_dbg(fmt, ...)
+#endif
+
+enum s5c73m3_fw_path{
+	S5C73M3_SD_CARD,
+	S5C73M3_IN_DATA,
+	S5C73M3_IN_SYSTEM,
+	S5C73M3_PATH_MAX,
+};
+
+enum s5c73m3_prev_frmsize {
+	S5C73M3_PREVIEW_QVGA,
+	S5C73M3_PREVIEW_CIF,
+	S5C73M3_PREVIEW_VGA,
+	S5C73M3_PREVIEW_D1,
+	S5C73M3_PREVIEW_800X600,
+	S5C73M3_PREVIEW_880X720,
+	S5C73M3_PREVIEW_960X720,
+	S5C73M3_PREVIEW_1008X672,
+	S5C73M3_PREVIEW_1184X666,
+	S5C73M3_PREVIEW_720P,
+	S5C73M3_PREVIEW_1280X960,
+	S5C73M3_VDIS_720P,
+	S5C73M3_PREVIEW_1080P,
+	S5C73M3_VDIS_1080P,
+};
+
+enum s5c73m3_cap_frmsize {
+	S5C73M3_CAPTURE_VGA,	/* 640 x 480 */
+	S5C73M3_CAPTURE_960x540,	/* 960 x 540 */
+	S5C73M3_CAPTURE_960x720,	/* 960 x 720 */
+	S5C73M3_CAPTURE_1024X768,	/* 1024 x 768 */
+	S5C73M3_CAPTURE_HD,	/* 1280 x 720 */
+	S5C73M3_CAPTURE_2MP,	/* UXGA - 1600 x 1200 */
+	S5C73M3_CAPTURE_W2MP,	/* 2048 x 1232 */
+	S5C73M3_CAPTURE_3MP,	/* QXGA - 2048 x 1536 */
+	S5C73M3_CAPTURE_5MP,	/* 2560 x 1920 */
+	S5C73M3_CAPTURE_W6MP,	/* 3072 x 1856 */
+	S5C73M3_CAPTURE_3264X2176,	/* 3264 x 2176 */
+	S5C73M3_CAPTURE_8MP,	/* 3264 x 2448 */
+};
+
+enum s5c73m3_isneed_flash_tristate {
+	S5C73M3_ISNEED_FLASH_OFF = 0x00,
+	S5C73M3_ISNEED_FLASH_ON = 0x01,
+	S5C73M3_ISNEED_FLASH_UNDEFINED = 0x02,
+};
+
+#define S5C73M3_IMG_OUTPUT	0x0902
+#define S5C73M3_HDR_OUTPUT	0x0008
+#define S5C73M3_YUV_OUTPUT	0x0009
+#define S5C73M3_INTERLEAVED_OUTPUT	0x000D
+#define S5C73M3_HYBRID_OUTPUT	0x0016
+
+#define S5C73M3_STILL_PRE_FLASH			0x0A00
+#define S5C73M3_STILL_PRE_FLASH_FIRE		0x0000
+#define S5C73M3_STILL_PRE_FLASH_NON_FIRED	0x0000
+#define S5C73M3_STILL_PRE_FLASH_FIRED		0x0001
+
+#define S5C73M3_STILL_MAIN_FLASH		0x0A02
+#define S5C73M3_STILL_MAIN_FLASH_CANCEL		0x0001
+#define S5C73M3_STILL_MAIN_FLASH_FIRE		0x0002
+
+
+#define S5C73M3_ZOOM_STEP	0x0B00
+
+
+#define S5C73M3_IMAGE_EFFECT		0x0B0A
+#define S5C73M3_IMAGE_EFFECT_NONE	0x0001
+#define S5C73M3_IMAGE_EFFECT_NEGATIVE	0x0002
+#define S5C73M3_IMAGE_EFFECT_AQUA	0x0003
+#define S5C73M3_IMAGE_EFFECT_SEPIA	0x0004
+#define S5C73M3_IMAGE_EFFECT_MONO	0x0005
+#define S5C73M3_IMAGE_EFFECT_SKETCH	0x0006
+#define S5C73M3_IMAGE_EFFECT_WASHED	0x0007
+#define S5C73M3_IMAGE_EFFECT_VINTAGE_WARM	0x0008
+#define S5C73M3_IMAGE_EFFECT_VINTAGE_COLD	0x0009
+#define S5C73M3_IMAGE_EFFECT_SOLARIZE	0x000A
+#define S5C73M3_IMAGE_EFFECT_POSTERIZE	0x000B
+#define S5C73M3_IMAGE_EFFECT_POINT_BLUE	0x000C
+#define S5C73M3_IMAGE_EFFECT_POINT_RED_YELLOW	0x000D
+#define S5C73M3_IMAGE_EFFECT_POINT_COLOR_3	0x000E
+#define S5C73M3_IMAGE_EFFECT_POINT_GREEN	0x000F
+#define S5C73M3_IMAGE_EFFECT_CARTOONIZE	0x001A
+
+#define S5C73M3_IMAGE_QUALITY		0x0B0C
+#define S5C73M3_IMAGE_QUALITY_SUPERFINE	0x0000
+#define S5C73M3_IMAGE_QUALITY_FINE	0x0001
+#define S5C73M3_IMAGE_QUALITY_NORMAL	0x0002
+
+
+#define S5C73M3_FLASH_MODE		0x0B0E
+#define S5C73M3_FLASH_MODE_OFF		0x0000
+#define S5C73M3_FLASH_MODE_ON		0x0001
+#define S5C73M3_FLASH_MODE_AUTO		0x0002
+
+#define S5C73M3_FLASH_TORCH		0x0B12
+#define S5C73M3_FLASH_TORCH_OFF		0x0000
+#define S5C73M3_FLASH_TORCH_ON		0x0001
+
+#define S5C73M3_AE_ISNEEDFLASH		0x0CBA
+#define S5C73M3_AE_ISNEEDFLASH_OFF	0x0000
+#define S5C73M3_AE_ISNEEDFLASH_ON	0x0001
+
+
+#define S5C73M3_CHG_MODE		0x0B10
+#define S5C73M3_DEFAULT_MODE		0x8000
+#define S5C73M3_FAST_MODE_SUBSAMPLING_HALF	0xA000
+#define S5C73M3_FAST_MODE_SUBSAMPLING_QUARTER	0xC000
+
+#define S5C73M3_AF_CON			0x0E00
+#define S5C73M3_AF_CON_STOP		0x0000
+#define S5C73M3_AF_CON_SCAN		0x0001/*AF_SCAN:Full Search*/
+#define S5C73M3_AF_CON_START	0x0002/*AF_START:Fast Search*/
+
+#define S5C73M3_AF_STATUS		0x5E80
+
+#define S5C73M3_AF_TOUCH_AF		0x0E0A
+
+#define S5C73M3_AF_CAL			0x0E06
+
+#define S5C73M3_CAF_STATUS_FIND_SEARCHING_DIR	0x0001
+#define S5C73M3_CAF_STATUS_FOCUSING	0x0002
+#define S5C73M3_CAF_STATUS_FOCUSED	0x0003
+#define S5C73M3_CAF_STATUS_UNFOCUSED	0x0004
+
+#define S5C73M3_AF_STATUS_INVALID	0x0010
+#define S5C73M3_AF_STATUS_FOCUSING	0x0020
+#define S5C73M3_AF_STATUS_FOCUSED	0x0030/*SUCCESS*/
+#define S5C73M3_AF_STATUS_UNFOCUSED	0x0040/*FAIL*/
+
+#define S5C73M3_AF_TOUCH_POSITION	0x5E8E
+
+#define S5C73M3_AF_FACE_ZOOM	0x0E10
+
+#define S5C73M3_AF_MODE			0x0E02
+#define S5C73M3_AF_MODE_NORMAL		0x0000
+#define S5C73M3_AF_MODE_MACRO		0x0001
+#define S5C73M3_AF_MODE_MOVIE_CAF_START	0x0002
+#define S5C73M3_AF_MODE_MOVIE_CAF_STOP		0x0003
+#define S5C73M3_AF_MODE_PREVIEW_CAF_START	0x0004
+#define S5C73M3_AF_MODE_PREVIEW_CAF_STOP	0x0005
+
+#define S5C73M3_AF_SOFTLANDING		0x0E16
+#define S5C73M3_AF_SOFTLANDING_ON	0x0000
+
+#define S5C73M3_FACE_DET		0x0E0C
+#define S5C73M3_FACE_DET_OFF		0x0000
+#define S5C73M3_FACE_DET_ON		0x0001
+
+#define S5C73M3_FACE_DET_OSD		0x0E0E
+#define S5C73M3_FACE_DET_OSD_OFF	0x0000
+#define S5C73M3_FACE_DET_OSD_ON		0x0001
+
+#define S5C73M3_AE_CON		0x0C00
+#define S5C73M3_AE_STOP		0x0000/*LOCK*/
+#define S5C73M3_AE_START	0x0001/*UNLOCK*/
+
+#define S5C73M3_ISO		0x0C02
+#define S5C73M3_ISO_AUTO	0x0000
+#define S5C73M3_ISO_100		0x0001
+#define S5C73M3_ISO_200		0x0002
+#define S5C73M3_ISO_400		0x0003
+#define S5C73M3_ISO_800		0x0004
+#define S5C73M3_ISO_SPORTS	0x0005
+#define S5C73M3_ISO_NIGHT	0x0006
+#define S5C73M3_ISO_INDOOR	0x0007
+
+#define S5C73M3_EV		0x0C04
+#define S5C73M3_EV_M20		0x0000
+#define S5C73M3_EV_M15		0x0001
+#define S5C73M3_EV_M10		0x0002
+#define S5C73M3_EV_M05		0x0003
+#define S5C73M3_EV_ZERO		0x0004
+#define S5C73M3_EV_P05		0x0005
+#define S5C73M3_EV_P10		0x0006
+#define S5C73M3_EV_P15		0x0007
+#define S5C73M3_EV_P20		0x0008
+
+#define S5C73M3_METER		0x0C06
+#define S5C73M3_METER_CENTER	0x0000
+#define S5C73M3_METER_SPOT	0x0001
+#define S5C73M3_METER_AVERAGE	0x0002
+#define S5C73M3_METER_SMART	0x0003
+
+#define S5C73M3_WDR		0x0C08
+#define S5C73M3_WDR_OFF		0x0000
+#define S5C73M3_WDR_ON		0x0001
+
+#define S5C73M3_FLICKER_MODE	0x0C12
+#define S5C73M3_FLICKER_NONE	0x0000
+#define S5C73M3_FLICKER_MANUAL_50HZ	0x0001
+#define S5C73M3_FLICKER_MANUAL_60HZ	0x0002
+#define S5C73M3_FLICKER_AUTO	0x0003
+#define S5C73M3_FLICKER_AUTO_50HZ	0x0004
+#define S5C73M3_FLICKER_AUTO_60HZ	0x0005
+
+#define S5C73M3_AE_MODE	0x0C1E
+#define S5C73M3_AUTO_MODE_AE_SET	0x0000
+#define S5C73M3_FIXED_30FPS	0x0002
+#define S5C73M3_FIXED_20FPS	0x0003
+#define S5C73M3_FIXED_15FPS	0x0004
+#define S5C73M3_FIXED_60FPS	0x0007
+#define S5C73M3_FIXED_120FPS	0x0008
+#define S5C73M3_FIXED_7FPS	0x0009
+#define S5C73M3_FIXED_10FPS	0x000A
+#define S5C73M3_FIXED_90FPS	0x000B
+#define S5C73M3_ANTI_SHAKE	0x0013
+
+#define S5C73M3_SHARPNESS	0x0C14
+#define S5C73M3_SHARPNESS_0	0x0000
+#define S5C73M3_SHARPNESS_1	0x0001
+#define S5C73M3_SHARPNESS_2	0x0002
+#define S5C73M3_SHARPNESS_M1	0x0003
+#define S5C73M3_SHARPNESS_M2	0x0004
+
+#define S5C73M3_SATURATION	0x0C16
+#define S5C73M3_SATURATION_0	0x0000
+#define S5C73M3_SATURATION_1	0x0001
+#define S5C73M3_SATURATION_2	0x0002
+#define S5C73M3_SATURATION_M1	0x0003
+#define S5C73M3_SATURATION_M2	0x0004
+
+#define S5C73M3_CONTRAST	0x0C18
+#define S5C73M3_CONTRAST_0	0x0000
+#define S5C73M3_CONTRAST_1	0x0001
+#define S5C73M3_CONTRAST_2	0x0002
+#define S5C73M3_CONTRAST_M1	0x0003
+#define S5C73M3_CONTRAST_M2	0x0004
+
+#define S5C73M3_SCENE_MODE		0x0C1A
+#define S5C73M3_SCENE_MODE_NONE		0x0000
+#define S5C73M3_SCENE_MODE_PORTRAIT	0x0001
+#define S5C73M3_SCENE_MODE_LANDSCAPE	0x0002
+#define S5C73M3_SCENE_MODE_SPORTS	0x0003
+#define S5C73M3_SCENE_MODE_INDOOR	0x0004
+#define S5C73M3_SCENE_MODE_BEACH	0x0005
+#define S5C73M3_SCENE_MODE_SUNSET	0x0006
+#define S5C73M3_SCENE_MODE_DAWN		0x0007
+#define S5C73M3_SCENE_MODE_FALL		0x0008
+#define S5C73M3_SCENE_MODE_NIGHT	0x0009
+#define S5C73M3_SCENE_MODE_AGAINSTLIGHT	0x000A
+#define S5C73M3_SCENE_MODE_FIRE		0x000B
+#define S5C73M3_SCENE_MODE_TEXT		0x000C
+#define S5C73M3_SCENE_MODE_CANDLE	0x000D
+#define S5C73M3_SCENE_MODE_LOW_LIGHT	0x0020
+
+#define S5C73M3_FIREWORK_CAPTURE 0x0C20
+#define S5C73M3_NIGHTSHOT_CAPTURE 0x0C22
+
+#define S5C73M3_AE_LOW_LIGHT_MODE 0x0C2C
+
+#define S5C73M3_AE_AUTO_BRAKET		0x0B14
+#define S5C73M3_AE_AUTO_BRAKET_EV05	0x0080
+#define S5C73M3_AE_AUTO_BRAKET_EV10	0x0100
+#define S5C73M3_AE_AUTO_BRAKET_EV15	0x0180
+#define S5C73M3_AE_AUTO_BRAKET_EV20	0x0200
+
+#define S5C73M3_SENSOR_STREAMING	0x090A
+#define S5C73M3_SENSOR_STREAMING_OFF	0x0000
+#define S5C73M3_SENSOR_STREAMING_ON	0x0001
+
+#define S5C73M3_AWB_MODE		0x0D02
+#define S5C73M3_AWB_MODE_INCANDESCENT	0x0000
+#define S5C73M3_AWB_MODE_FLUORESCENT1	0x0001
+#define S5C73M3_AWB_MODE_FLUORESCENT2	0x0002
+#define S5C73M3_AWB_MODE_DAYLIGHT	0x0003
+#define S5C73M3_AWB_MODE_CLOUDY		0x0004
+#define S5C73M3_AWB_MODE_AUTO		0x0005
+
+#define S5C73M3_AWB_CON			0x0D00
+#define S5C73M3_AWB_STOP		0x0000/*LOCK*/
+#define S5C73M3_AWB_START		0x0001/*UNLOCK*/
+
+#define S5C73M3_HYBRID_CAPTURE	0x0996
+
+#define S5C73M3_STATUS			0x5080
+#define BOOT_SUB_MAIN_ENTER		0xFF01
+#define BOOT_SRAM_TIMING_OK		0xFF02
+#define BOOT_INTERRUPTS_ENABLE		0xFF03
+#define BOOT_R_PLL_DONE			0xFF04
+#define BOOT_R_PLL_LOCKTIME_DONE	0xFF05
+#define BOOT_DELAY_COUNT_DONE		0xFF06
+#define BOOT_I_PLL_DONE			0xFF07
+#define BOOT_I_PLL_LOCKTIME_DONE	0xFF08
+#define BOOT_PLL_INIT_OK		0xFF09
+#define BOOT_SENSOR_INIT_OK		0xFF0A
+#define BOOT_GPIO_SETTING_OK		0xFF0B
+#define BOOT_READ_CAL_DATA_OK		0xFF0C
+#define BOOT_STABLE_AE_AWB_OK		0xFF0D
+#define EXCEPTION_OCCURED		0xDEAD
+
+#define S5C73M3_I2C_SEQ_STATUS	0x59A6
+#define SEQ_END_PLL		(1<<0x0)
+#define SEQ_END_SENSOR		(1<<0x1)
+#define SEQ_END_GPIO		(1<<0x2)
+#define SEQ_END_FROM		(1<<0x3)
+#define SEQ_END_STABLE_AE_AWB	(1<<0x4)
+#define SEQ_END_READY_I2C_CMD	(1<<0x5)
+
+#define S5C73M3_I2C_ERR_STATUS		0x599E
+#define ERR_STATUS_CIS_I2C		(1<<0x0)
+#define ERR_STATUS_AF_INIT		(1<<0x1)
+#define ERR_STATUS_CAL_DATA		(1<<0x2)
+#define ERR_STATUS_FRAME_COUNT		(1<<0x3)
+#define ERR_STATUS_FROM_INIT		(1<<0x4)
+#define ERR_STATUS_I2C_CIS_STREAM_OFF	(1<<0x5)
+#define ERR_STATUS_I2C_N_CMD_OVER	(1<<0x6)
+#define ERROR_STATUS_I2C_N_CMD_MISMATCH    (1<<0x7)
+#define ERROR_STATUS_CHECK_BIN_CRC    (1<<0x8)
+#define ERROR_STATUS_EXCEPTION    (1<<0x9)
+#define ERROR_STATUS_INIF_INIT_STATE    (0x8)
+
+#endif /* __S5C73M3_H */