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| author | Kenny Root <kroot@google.com> | 2015-10-02 16:09:15 -0700 |
|---|---|---|
| committer | Kenny Root <kroot@google.com> | 2015-10-02 16:09:49 -0700 |
| commit | fe7305364c3369f9222a61646c5c9842eae9bceb (patch) | |
| tree | 360ada970b7bb1046ae069d253ba24d9622eb3ad /src/include/openssl/cpu.h | |
| parent | 691ef9d0ff0ece39ffd6a58960a7cd195ef584ae (diff) | |
| parent | b452bce3bf2034466cee6206ebf3994409468ee4 (diff) | |
| download | external_boringssl-fe7305364c3369f9222a61646c5c9842eae9bceb.zip external_boringssl-fe7305364c3369f9222a61646c5c9842eae9bceb.tar.gz external_boringssl-fe7305364c3369f9222a61646c5c9842eae9bceb.tar.bz2 | |
Merge mnc-dr-dev-plus-aosp into mnc-ub-dev
This pulls in the latest version of BoringSSL.
Change-Id: I0ab5c73d60f41a696c9a828fac87670aaca10dec
Diffstat (limited to 'src/include/openssl/cpu.h')
| -rw-r--r-- | src/include/openssl/cpu.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/include/openssl/cpu.h b/src/include/openssl/cpu.h index 83ec473..981d246 100644 --- a/src/include/openssl/cpu.h +++ b/src/include/openssl/cpu.h @@ -77,11 +77,16 @@ extern "C" { * * Index 0: * EDX for CPUID where EAX = 1 + * Bit 20 is always zero + * Bit 28 is adjusted to reflect whether the data cache is shared between + * multiple logical cores * Bit 30 is used to indicate an Intel CPU * Index 1: * ECX for CPUID where EAX = 1 + * Bit 11 is used to indicate AMD XOP support, not SDBG * Index 2: * EBX for CPUID where EAX = 7 + * Index 3 is set to zero. * * Note: the CPUID bits are pre-adjusted for the OSXSAVE bit and the YMM and XMM * bits in XCR0, so it is not necessary to check those. */ |