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-rw-r--r--src/include/openssl/cpu.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/include/openssl/cpu.h b/src/include/openssl/cpu.h
index 83ec473..981d246 100644
--- a/src/include/openssl/cpu.h
+++ b/src/include/openssl/cpu.h
@@ -77,11 +77,16 @@ extern "C" {
*
* Index 0:
* EDX for CPUID where EAX = 1
+ * Bit 20 is always zero
+ * Bit 28 is adjusted to reflect whether the data cache is shared between
+ * multiple logical cores
* Bit 30 is used to indicate an Intel CPU
* Index 1:
* ECX for CPUID where EAX = 1
+ * Bit 11 is used to indicate AMD XOP support, not SDBG
* Index 2:
* EBX for CPUID where EAX = 7
+ * Index 3 is set to zero.
*
* Note: the CPUID bits are pre-adjusted for the OSXSAVE bit and the YMM and XMM
* bits in XCR0, so it is not necessary to check those. */