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* Fix gralloc_drm_handle_t size mismatch on 32 and 64 bit builds, take 2Rob Herring2016-04-011-1/+1
| | | | | | | | | On x86 there was still a size mismatch due to x86-32 structs not following natural alignment for 64-bit values. Force the alignment of the union. Also, there appeared to be some padding on the end, so move the union to the end of the struct. Signed-off-by: Rob Herring <robh@kernel.org>
* Add gralloc_drm_get_prime_fd functionRob Herring2016-03-171-0/+3
| | | | | | Mesa EGL needs to retrieve prime fds from gralloc handles. Signed-off-by: Rob Herring <robh@kernel.org>
* add padding to gralloc_drm_handle_tWuZhen2016-01-061-1/+4
| | | | | | | gralloc_drm_handle_t size differs for 32/64 bit process. thus on x86_64, this will crash any 32bit app, add propper padding. Change-Id: I03663b36dd841bf69c84973fd2f5e99741317c15
* Merge remote-tracking branch 'x86/lollipop-x86' into marshmallow-x86Chih-Wei Huang2015-11-141-3/+6
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| * fix GRALLOC_DRM_HANDLE_NUM_INTS definition for 64-bitMauro Rossi2015-11-141-3/+6
| | | | | | | | | | | | | | | | | | As highlighted by pstglia current definition of GRALLOC_DRM_HANDLE_NUM_INTS causes issues with 64-bit, because a pointer is accounted as having size of an integer, which is not applicable to 64-bit pointer The same definition adopted in AOSP hardware/drm_gralloc master branch has been used, without changing the structure of gralloc_drm_handle_t.
* | Revert "gralloc: Remove localized hw specific pixel format"Chih-Wei Huang2015-10-101-1/+1
|/ | | | This reverts commit 3e00d3255ba6de08761a6b8f40b838680d502d0b.
* fix building issues of 64-bit targetsChih-Wei Huang2015-01-201-1/+3
| | | | | | | Just change the 'data' field of gralloc_drm_handle_t to be a pointer to struct gralloc_drm_bo_t. Fix some warnings as well.
* gralloc: Remove localized hw specific pixel formatSean V Kelley2013-05-011-1/+1
| | | | | | | | | Reduces need to build with drm_gralloc headers elsewhere in tree. Returning to system/graphics.h approach. Change-Id: I26717cfe0a9a83ab263c26803e2849eb55560696 Depends-Change-Id: I405398b172fab19949fef33c89a60132b1bd0ea9 Signed-off-by: Sean V Kelley <sean.v.kelley@intel.com>
* gralloc_drm: fix building errors with latest mesaChih-Wei Huang2013-04-111-0/+7
| | | | | Change-Id: Ifdf23b59542152c364d3ed010a4cc82bbf1a0103 Signed-off-by: Chih-Wei Huang <cwhuang@linux.org.tw>
* gralloc: set supported planes for buffers on allocationTapani Pälli2013-01-211-1/+3
| | | | | | | | | This is done so that we should not have to do it dynamically during composition. This information will be used later with hwcomposer module when using planes for composition. Change-Id: I2b6716fe9a8da81050645900c6c0955385946991 Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
* gralloc: implement yuv offset query as hw specific functionTapani Pälli2013-01-211-18/+0
| | | | | | | | | | This patch reverts earlier cca14cfd... and introduces a new hw specific hook to query yuv components offsets which can vary between different hw, decoders, cameras etc. Change-Id: Ib60bc8ee28df7bc9425b6d7934294fe36fc55354 Depends-Change-Id: I1aa5368b21e588d5d711c1005fff2a5296e143a0 Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
* gralloc: yuv offset calculation function for mesaTapani Pälli2012-12-141-0/+19
| | | | | | | | Patch adds add api for mesa to query component offsets for yuv buffer handles. Change-Id: Ib477627ad812f5b6352665d00fb2bb3b10fe5b8e Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
* protect against NULL handleChia-I Wu2011-07-301-4/+4
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* initial commitChia-I Wu2011-06-121-0/+63
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