diff options
| author | Chris Lattner <sabre@nondot.org> | 2008-01-07 07:46:23 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2008-01-07 07:46:23 +0000 |
| commit | 012442140c849d94a882e841149dfab3d843fce7 (patch) | |
| tree | f81d20ca92165c4ebf9f76c8cb92b8f94a8dd870 | |
| parent | 8eaa5a97f96678525911d3922561f6776966c138 (diff) | |
| download | external_llvm-012442140c849d94a882e841149dfab3d843fce7.zip external_llvm-012442140c849d94a882e841149dfab3d843fce7.tar.gz external_llvm-012442140c849d94a882e841149dfab3d843fce7.tar.bz2 | |
add a note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45698 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/README.txt | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/lib/Target/README.txt b/lib/Target/README.txt index 284be24..26bc5e8 100644 --- a/lib/Target/README.txt +++ b/lib/Target/README.txt @@ -2,6 +2,13 @@ Target Independent Opportunities: //===---------------------------------------------------------------------===// +We should make the various target's "IMPLICIT_DEF" instructions be a single +target-independent opcode like TargetInstrInfo::INLINEASM. This would allow +us to eliminate the TargetInstrDesc::isImplicitDef() method, and would allow +us to avoid having to define this for every target for every register class. + +//===---------------------------------------------------------------------===// + With the recent changes to make the implicit def/use set explicit in machineinstrs, we should change the target descriptions for 'call' instructions so that the .td files don't list all the call-clobbered registers as implicit |