Add support for functions with byval arguments on x86

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41953 91177308-0d34-0410-b5e6-96231b3b80d8

3 files changed, 27 insertions, 18 deletions

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 95450ac..b073887 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -694,6 +694,23 @@ static unsigned AddLiveIn(MachineFunction &MF, unsigned PReg,
   return VReg;
 }
 
+SDOperand X86TargetLowering::LowerMemArgument(SDOperand Op, SelectionDAG &DAG,
+                                              const CCValAssign &VA,
+                                              MachineFrameInfo *MFI,
+                                              SDOperand Root, unsigned i) {
+  // Create the nodes corresponding to a load from this parameter slot.
+  int FI = MFI->CreateFixedObject(MVT::getSizeInBits(VA.getValVT())/8,
+                                  VA.getLocMemOffset());
+  SDOperand FIN = DAG.getFrameIndex(FI, getPointerTy());
+
+  unsigned Flags =  cast<ConstantSDNode>(Op.getOperand(3 + i))->getValue();
+
+  if (Flags & ISD::ParamFlags::ByVal)
+    return FIN;
+  else
+    return DAG.getLoad(VA.getValVT(), Root, FIN, NULL, 0);
+}
+
 SDOperand X86TargetLowering::LowerCCCArguments(SDOperand Op, SelectionDAG &DAG,
                                                bool isStdCall) {
   unsigned NumArgs = Op.Val->getNumValues() - 1;
@@ -747,12 +764,7 @@ SDOperand X86TargetLowering::LowerCCCArguments(SDOperand Op, SelectionDAG &DAG,
       ArgValues.push_back(ArgValue);
     } else {
       assert(VA.isMemLoc());
-      
-      // Create the nodes corresponding to a load from this parameter slot.
-      int FI = MFI->CreateFixedObject(MVT::getSizeInBits(VA.getValVT())/8,
-                                      VA.getLocMemOffset());
-      SDOperand FIN = DAG.getFrameIndex(FI, getPointerTy());
-      ArgValues.push_back(DAG.getLoad(VA.getValVT(), Root, FIN, NULL, 0));
+      ArgValues.push_back(LowerMemArgument(Op, DAG, VA, MFI, Root, i));
     }
   }
   
@@ -1279,17 +1291,7 @@ X86TargetLowering::LowerX86_64CCCArguments(SDOperand Op, SelectionDAG &DAG) {
       ArgValues.push_back(ArgValue);
     } else {
       assert(VA.isMemLoc());
-    
-      // Create the nodes corresponding to a load from this parameter slot.
-      int FI = MFI->CreateFixedObject(MVT::getSizeInBits(VA.getValVT())/8,
-                                      VA.getLocMemOffset());
-      SDOperand FIN = DAG.getFrameIndex(FI, getPointerTy());
-
-      unsigned Flags =  cast<ConstantSDNode>(Op.getOperand(3 + i))->getValue();
-      if (Flags & ISD::ParamFlags::ByVal)
-        ArgValues.push_back(FIN);
-      else
-        ArgValues.push_back(DAG.getLoad(VA.getValVT(), Root, FIN, NULL, 0));
+      ArgValues.push_back(LowerMemArgument(Op, DAG, VA, MFI, Root, i));
     }
   }
   
diff --git a/lib/Target/X86/X86ISelLowering.h b/lib/Target/X86/X86ISelLowering.h
index 41eaec2..7dfc058 100644
--- a/lib/Target/X86/X86ISelLowering.h
+++ b/lib/Target/X86/X86ISelLowering.h
@@ -380,6 +380,10 @@ namespace llvm {
                             unsigned CallingConv, SelectionDAG &DAG);
         
 
+    SDOperand LowerMemArgument(SDOperand Op, SelectionDAG &DAG,
+                               const CCValAssign &VA,  MachineFrameInfo *MFI,
+                               SDOperand Root, unsigned i);
+
     SDOperand LowerMemOpCallTo(SDOperand Op, SelectionDAG &DAG,
                                const SDOperand &StackPtr,
                                const CCValAssign &VA, SDOperand Chain,
diff --git a/test/CodeGen/X86/byval.ll b/test/CodeGen/X86/byval.ll
index 7c0aeb8..a75214a 100644
--- a/test/CodeGen/X86/byval.ll
+++ b/test/CodeGen/X86/byval.ll
@@ -1,4 +1,7 @@
-; RUN: llvm-as < %s | llc -march=x86-64 | grep movq.*8.*rsp.*rax
+; RUN: llvm-as < %s | llc -march=x86-64 | grep {movq	8(%rsp), %rax}
+; RUN: llvm-as < %s | llc -march=x86 > %t
+; RUN: grep {movl	8(%esp), %edx} %t
+; RUN: grep {movl	4(%esp), %eax} %t
 
 %struct.s = type { i64, i64, i64 }