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authorMihai Popa <mihail.popa@gmail.com>2013-08-09 13:52:32 +0000
committerMihai Popa <mihail.popa@gmail.com>2013-08-09 13:52:32 +0000
commit04b03fac11f10c92cf7ce63ba2f548a42ee2c448 (patch)
treec36919a257fe03812da2f78b88907f1cc2bb99e6
parente921f323533ee751b3fa34bd00d10fa72096ffd3 (diff)
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This fixes the Thumb2 CPS assembly syntax.
In Thumb1, only one variant is supported: CPS{effect} {flags} Thumb2 supports three: CPS{effect}.W {flags} CPS{effect} {flags} {mode} CPS {mode} Canonically, .W should be used only when ambiguity is present between encodings of different width. The wide suffix is still accepted for the latter two forms via aliases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188071 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/ARM/ARMInstrThumb2.td6
-rw-r--r--test/MC/ARM/basic-thumb-instructions.s10
-rw-r--r--test/MC/ARM/basic-thumb2-instructions.s25
-rw-r--r--test/MC/Disassembler/ARM/thumb-tests.txt2
4 files changed, 41 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td
index ccca41a..5d04d21 100644
--- a/lib/Target/ARM/ARMInstrThumb2.td
+++ b/lib/Target/ARM/ARMInstrThumb2.td
@@ -3504,13 +3504,17 @@ class t2CPS<dag iops, string asm_op> : T2XI<(outs), iops, NoItinerary,
let M = 1 in
def t2CPS3p : t2CPS<(ins imod_op:$imod, iflags_op:$iflags, i32imm:$mode),
- "$imod.w\t$iflags, $mode">;
+ "$imod\t$iflags, $mode">;
let mode = 0, M = 0 in
def t2CPS2p : t2CPS<(ins imod_op:$imod, iflags_op:$iflags),
"$imod.w\t$iflags">;
let imod = 0, iflags = 0, M = 1 in
def t2CPS1p : t2CPS<(ins imm0_31:$mode), "\t$mode">;
+def : t2InstAlias<"cps$imod.w $iflags, $mode",
+ (t2CPS3p imod_op:$imod, iflags_op:$iflags, i32imm:$mode), 0>;
+def : t2InstAlias<"cps.w $mode", (t2CPS1p imm0_31:$mode), 0>;
+
// A6.3.4 Branches and miscellaneous control
// Table A6-14 Change Processor State, and hint instructions
def t2HINT : T2I<(outs), (ins imm0_4:$imm), NoItinerary, "hint", "\t$imm",[]> {
diff --git a/test/MC/ARM/basic-thumb-instructions.s b/test/MC/ARM/basic-thumb-instructions.s
index aba03f9..dec7f5b 100644
--- a/test/MC/ARM/basic-thumb-instructions.s
+++ b/test/MC/ARM/basic-thumb-instructions.s
@@ -216,6 +216,16 @@ _func:
@ CHECK: cmp r8, r1 @ encoding: [0x88,0x45]
@------------------------------------------------------------------------------
+@ CPS
+@------------------------------------------------------------------------------
+
+ cpsie f
+ cpsid a
+
+@ CHECK: cpsie f @ encoding: [0x61,0xb6]
+@ CHECK: cpsid a @ encoding: [0x74,0xb6]
+
+@------------------------------------------------------------------------------
@ EOR
@------------------------------------------------------------------------------
eors r4, r5
diff --git a/test/MC/ARM/basic-thumb2-instructions.s b/test/MC/ARM/basic-thumb2-instructions.s
index 4c51cd9..c7a3b1b 100644
--- a/test/MC/ARM/basic-thumb2-instructions.s
+++ b/test/MC/ARM/basic-thumb2-instructions.s
@@ -405,6 +405,31 @@ _func:
@ CHECK: cmn.w r2, #2 @ encoding: [0x12,0xf1,0x02,0x0f]
@ CHECK: cmp.w r9, #1 @ encoding: [0xb9,0xf1,0x01,0x0f]
+@------------------------------------------------------------------------------
+@ CPS
+@------------------------------------------------------------------------------
+
+ cpsie f
+ cpsid a
+ cpsie.w f
+ cpsid.w a
+ cpsie i, #3
+ cpsie.w i, #3
+ cpsid f, #9
+ cpsid.w f, #9
+ cps #0
+ cps.w #0
+
+@ CHECK: cpsie f @ encoding: [0x61,0xb6]
+@ CHECK: cpsid a @ encoding: [0x74,0xb6]
+@ CHECK: cpsie.w f @ encoding: [0xaf,0xf3,0x20,0x84]
+@ CHECK: cpsid.w a @ encoding: [0xaf,0xf3,0x80,0x86]
+@ CHECK: cpsie i, #3 @ encoding: [0xaf,0xf3,0x43,0x85]
+@ CHECK: cpsie i, #3 @ encoding: [0xaf,0xf3,0x43,0x85]
+@ CHECK: cpsid f, #9 @ encoding: [0xaf,0xf3,0x29,0x87]
+@ CHECK: cpsid f, #9 @ encoding: [0xaf,0xf3,0x29,0x87]
+@ CHECK: cps #0 @ encoding: [0xaf,0xf3,0x00,0x81]
+@ CHECK: cps #0 @ encoding: [0xaf,0xf3,0x00,0x81]
@------------------------------------------------------------------------------
@ DBG
diff --git a/test/MC/Disassembler/ARM/thumb-tests.txt b/test/MC/Disassembler/ARM/thumb-tests.txt
index 84dd075..df2bac1 100644
--- a/test/MC/Disassembler/ARM/thumb-tests.txt
+++ b/test/MC/Disassembler/ARM/thumb-tests.txt
@@ -125,7 +125,7 @@
# CHECK: cps #15
0xaf 0xf3 0x0f 0x81
-# CHECK: cpsie.w if, #10
+# CHECK: cpsie if, #10
0xaf 0xf3 0x6a 0x85
# CHECK: cpsie aif